sh: mach-r2d: add physmap-flash support for R2D+ boards.
[deliverable/linux.git] / arch / sh / boards / board-ap325rxa.c
1 /*
2 * Renesas - AP-325RXA
3 * (Compatible with Algo System ., LTD. - AP-320A)
4 *
5 * Copyright (C) 2008 Renesas Solutions Corp.
6 * Author : Yusuke Goda <goda.yuske@renesas.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/mtd/sh_flctl.h>
19 #include <linux/delay.h>
20 #include <linux/i2c.h>
21 #include <linux/smsc911x.h>
22 #include <linux/gpio.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/spi_gpio.h>
25 #include <media/ov772x.h>
26 #include <media/soc_camera.h>
27 #include <media/soc_camera_platform.h>
28 #include <media/sh_mobile_ceu.h>
29 #include <video/sh_mobile_lcdc.h>
30 #include <asm/io.h>
31 #include <asm/clock.h>
32 #include <cpu/sh7723.h>
33
34 static struct smsc911x_platform_config smsc911x_config = {
35 .phy_interface = PHY_INTERFACE_MODE_MII,
36 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
37 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
38 .flags = SMSC911X_USE_32BIT,
39 };
40
41 static struct resource smsc9118_resources[] = {
42 [0] = {
43 .start = 0xb6080000,
44 .end = 0xb60fffff,
45 .flags = IORESOURCE_MEM,
46 },
47 [1] = {
48 .start = 35,
49 .end = 35,
50 .flags = IORESOURCE_IRQ,
51 }
52 };
53
54 static struct platform_device smsc9118_device = {
55 .name = "smsc911x",
56 .id = -1,
57 .num_resources = ARRAY_SIZE(smsc9118_resources),
58 .resource = smsc9118_resources,
59 .dev = {
60 .platform_data = &smsc911x_config,
61 },
62 };
63
64 /*
65 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
66 * If this area erased, this board can not boot.
67 */
68 static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
69 {
70 .name = "uboot",
71 .offset = 0,
72 .size = (1 * 1024 * 1024),
73 .mask_flags = MTD_WRITEABLE, /* Read-only */
74 }, {
75 .name = "kernel",
76 .offset = MTDPART_OFS_APPEND,
77 .size = (2 * 1024 * 1024),
78 }, {
79 .name = "free-area0",
80 .offset = MTDPART_OFS_APPEND,
81 .size = ((7 * 1024 * 1024) + (512 * 1024)),
82 }, {
83 .name = "CPLD-Data",
84 .offset = MTDPART_OFS_APPEND,
85 .mask_flags = MTD_WRITEABLE, /* Read-only */
86 .size = (1024 * 128 * 2),
87 }, {
88 .name = "free-area1",
89 .offset = MTDPART_OFS_APPEND,
90 .size = MTDPART_SIZ_FULL,
91 },
92 };
93
94 static struct physmap_flash_data ap325rxa_nor_flash_data = {
95 .width = 2,
96 .parts = ap325rxa_nor_flash_partitions,
97 .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
98 };
99
100 static struct resource ap325rxa_nor_flash_resources[] = {
101 [0] = {
102 .name = "NOR Flash",
103 .start = 0x00000000,
104 .end = 0x00ffffff,
105 .flags = IORESOURCE_MEM,
106 }
107 };
108
109 static struct platform_device ap325rxa_nor_flash_device = {
110 .name = "physmap-flash",
111 .resource = ap325rxa_nor_flash_resources,
112 .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
113 .dev = {
114 .platform_data = &ap325rxa_nor_flash_data,
115 },
116 };
117
118 static struct mtd_partition nand_partition_info[] = {
119 {
120 .name = "nand_data",
121 .offset = 0,
122 .size = MTDPART_SIZ_FULL,
123 },
124 };
125
126 static struct resource nand_flash_resources[] = {
127 [0] = {
128 .start = 0xa4530000,
129 .end = 0xa45300ff,
130 .flags = IORESOURCE_MEM,
131 }
132 };
133
134 static struct sh_flctl_platform_data nand_flash_data = {
135 .parts = nand_partition_info,
136 .nr_parts = ARRAY_SIZE(nand_partition_info),
137 .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
138 .has_hwecc = 1,
139 };
140
141 static struct platform_device nand_flash_device = {
142 .name = "sh_flctl",
143 .resource = nand_flash_resources,
144 .num_resources = ARRAY_SIZE(nand_flash_resources),
145 .dev = {
146 .platform_data = &nand_flash_data,
147 },
148 };
149
150 #define FPGA_LCDREG 0xB4100180
151 #define FPGA_BKLREG 0xB4100212
152 #define FPGA_LCDREG_VAL 0x0018
153 #define PORT_MSELCRB 0xA4050182
154 #define PORT_HIZCRC 0xA405015C
155 #define PORT_DRVCRA 0xA405018A
156 #define PORT_DRVCRB 0xA405018C
157
158 static void ap320_wvga_power_on(void *board_data)
159 {
160 msleep(100);
161
162 /* ASD AP-320/325 LCD ON */
163 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
164
165 /* backlight */
166 gpio_set_value(GPIO_PTS3, 0);
167 ctrl_outw(0x100, FPGA_BKLREG);
168 }
169
170 static void ap320_wvga_power_off(void *board_data)
171 {
172 /* backlight */
173 ctrl_outw(0, FPGA_BKLREG);
174 gpio_set_value(GPIO_PTS3, 1);
175
176 /* ASD AP-320/325 LCD OFF */
177 ctrl_outw(0, FPGA_LCDREG);
178 }
179
180 static struct sh_mobile_lcdc_info lcdc_info = {
181 .clock_source = LCDC_CLK_EXTERNAL,
182 .ch[0] = {
183 .chan = LCDC_CHAN_MAINLCD,
184 .bpp = 16,
185 .interface_type = RGB18,
186 .clock_divider = 1,
187 .lcd_cfg = {
188 .name = "LB070WV1",
189 .xres = 800,
190 .yres = 480,
191 .left_margin = 40,
192 .right_margin = 160,
193 .hsync_len = 8,
194 .upper_margin = 63,
195 .lower_margin = 80,
196 .vsync_len = 1,
197 .sync = 0, /* hsync and vsync are active low */
198 },
199 .lcd_size_cfg = { /* 7.0 inch */
200 .width = 152,
201 .height = 91,
202 },
203 .board_cfg = {
204 .display_on = ap320_wvga_power_on,
205 .display_off = ap320_wvga_power_off,
206 },
207 }
208 };
209
210 static struct resource lcdc_resources[] = {
211 [0] = {
212 .name = "LCDC",
213 .start = 0xfe940000, /* P4-only space */
214 .end = 0xfe941fff,
215 .flags = IORESOURCE_MEM,
216 },
217 [1] = {
218 .start = 28,
219 .flags = IORESOURCE_IRQ,
220 },
221 };
222
223 static struct platform_device lcdc_device = {
224 .name = "sh_mobile_lcdc_fb",
225 .num_resources = ARRAY_SIZE(lcdc_resources),
226 .resource = lcdc_resources,
227 .dev = {
228 .platform_data = &lcdc_info,
229 },
230 };
231
232 static void camera_power(int val)
233 {
234 gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
235 mdelay(10);
236 }
237
238 #ifdef CONFIG_I2C
239 /* support for the old ncm03j camera */
240 static unsigned char camera_ncm03j_magic[] =
241 {
242 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
243 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
244 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
245 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
246 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
247 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
248 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
249 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
250 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
251 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
252 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
253 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
254 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
255 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
256 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
257 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
258 };
259
260 static int camera_probe(void)
261 {
262 struct i2c_adapter *a = i2c_get_adapter(0);
263 struct i2c_msg msg;
264 int ret;
265
266 camera_power(1);
267 msg.addr = 0x6e;
268 msg.buf = camera_ncm03j_magic;
269 msg.len = 2;
270 msg.flags = 0;
271 ret = i2c_transfer(a, &msg, 1);
272 camera_power(0);
273
274 return ret;
275 }
276
277 static int camera_set_capture(struct soc_camera_platform_info *info,
278 int enable)
279 {
280 struct i2c_adapter *a = i2c_get_adapter(0);
281 struct i2c_msg msg;
282 int ret = 0;
283 int i;
284
285 camera_power(0);
286 if (!enable)
287 return 0; /* no disable for now */
288
289 camera_power(1);
290 for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
291 u_int8_t buf[8];
292
293 msg.addr = 0x6e;
294 msg.buf = buf;
295 msg.len = 2;
296 msg.flags = 0;
297
298 buf[0] = camera_ncm03j_magic[i];
299 buf[1] = camera_ncm03j_magic[i + 1];
300
301 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
302 }
303
304 return ret;
305 }
306
307 static struct soc_camera_platform_info camera_info = {
308 .iface = 0,
309 .format_name = "UYVY",
310 .format_depth = 16,
311 .format = {
312 .pixelformat = V4L2_PIX_FMT_UYVY,
313 .colorspace = V4L2_COLORSPACE_SMPTE170M,
314 .width = 640,
315 .height = 480,
316 },
317 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
318 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
319 .set_capture = camera_set_capture,
320 };
321
322 static struct platform_device camera_device = {
323 .name = "soc_camera_platform",
324 .dev = {
325 .platform_data = &camera_info,
326 },
327 };
328
329 static int __init camera_setup(void)
330 {
331 if (camera_probe() > 0)
332 platform_device_register(&camera_device);
333
334 return 0;
335 }
336 late_initcall(camera_setup);
337
338 #endif /* CONFIG_I2C */
339
340 static int ov7725_power(struct device *dev, int mode)
341 {
342 camera_power(0);
343 if (mode)
344 camera_power(1);
345
346 return 0;
347 }
348
349 static struct ov772x_camera_info ov7725_info = {
350 .buswidth = SOCAM_DATAWIDTH_8,
351 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
352 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
353 .link = {
354 .power = ov7725_power,
355 },
356 };
357
358 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
359 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
360 };
361
362 static struct resource ceu_resources[] = {
363 [0] = {
364 .name = "CEU",
365 .start = 0xfe910000,
366 .end = 0xfe91009f,
367 .flags = IORESOURCE_MEM,
368 },
369 [1] = {
370 .start = 52,
371 .flags = IORESOURCE_IRQ,
372 },
373 [2] = {
374 /* place holder for contiguous memory */
375 },
376 };
377
378 static struct platform_device ceu_device = {
379 .name = "sh_mobile_ceu",
380 .id = 0, /* "ceu0" clock */
381 .num_resources = ARRAY_SIZE(ceu_resources),
382 .resource = ceu_resources,
383 .dev = {
384 .platform_data = &sh_mobile_ceu_info,
385 },
386 };
387
388 struct spi_gpio_platform_data sdcard_cn3_platform_data = {
389 .sck = GPIO_PTD0,
390 .mosi = GPIO_PTD1,
391 .miso = GPIO_PTD2,
392 .num_chipselect = 1,
393 };
394
395 static struct platform_device sdcard_cn3_device = {
396 .name = "spi_gpio",
397 .dev = {
398 .platform_data = &sdcard_cn3_platform_data,
399 },
400 };
401
402 static struct platform_device *ap325rxa_devices[] __initdata = {
403 &smsc9118_device,
404 &ap325rxa_nor_flash_device,
405 &lcdc_device,
406 &ceu_device,
407 &nand_flash_device,
408 &sdcard_cn3_device,
409 };
410
411 static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
412 {
413 I2C_BOARD_INFO("pcf8563", 0x51),
414 },
415 {
416 I2C_BOARD_INFO("ov772x", 0x21),
417 .platform_data = &ov7725_info,
418 },
419 };
420
421 static struct spi_board_info ap325rxa_spi_devices[] = {
422 {
423 .modalias = "mmc_spi",
424 .max_speed_hz = 5000000,
425 .chip_select = 0,
426 .controller_data = (void *) GPIO_PTD5,
427 },
428 };
429
430 static int __init ap325rxa_devices_setup(void)
431 {
432 /* LD3 and LD4 LEDs */
433 gpio_request(GPIO_PTX5, NULL); /* RUN */
434 gpio_direction_output(GPIO_PTX5, 1);
435 gpio_export(GPIO_PTX5, 0);
436
437 gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
438 gpio_direction_output(GPIO_PTX4, 0);
439 gpio_export(GPIO_PTX4, 0);
440
441 /* SW1 input */
442 gpio_request(GPIO_PTF7, NULL); /* MODE */
443 gpio_direction_input(GPIO_PTF7);
444 gpio_export(GPIO_PTF7, 0);
445
446 /* LCDC */
447 gpio_request(GPIO_FN_LCDD15, NULL);
448 gpio_request(GPIO_FN_LCDD14, NULL);
449 gpio_request(GPIO_FN_LCDD13, NULL);
450 gpio_request(GPIO_FN_LCDD12, NULL);
451 gpio_request(GPIO_FN_LCDD11, NULL);
452 gpio_request(GPIO_FN_LCDD10, NULL);
453 gpio_request(GPIO_FN_LCDD9, NULL);
454 gpio_request(GPIO_FN_LCDD8, NULL);
455 gpio_request(GPIO_FN_LCDD7, NULL);
456 gpio_request(GPIO_FN_LCDD6, NULL);
457 gpio_request(GPIO_FN_LCDD5, NULL);
458 gpio_request(GPIO_FN_LCDD4, NULL);
459 gpio_request(GPIO_FN_LCDD3, NULL);
460 gpio_request(GPIO_FN_LCDD2, NULL);
461 gpio_request(GPIO_FN_LCDD1, NULL);
462 gpio_request(GPIO_FN_LCDD0, NULL);
463 gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
464 gpio_request(GPIO_FN_LCDDCK, NULL);
465 gpio_request(GPIO_FN_LCDVEPWC, NULL);
466 gpio_request(GPIO_FN_LCDVCPWC, NULL);
467 gpio_request(GPIO_FN_LCDVSYN, NULL);
468 gpio_request(GPIO_FN_LCDHSYN, NULL);
469 gpio_request(GPIO_FN_LCDDISP, NULL);
470 gpio_request(GPIO_FN_LCDDON, NULL);
471
472 /* LCD backlight */
473 gpio_request(GPIO_PTS3, NULL);
474 gpio_direction_output(GPIO_PTS3, 1);
475
476 /* CEU */
477 gpio_request(GPIO_FN_VIO_CLK2, NULL);
478 gpio_request(GPIO_FN_VIO_VD2, NULL);
479 gpio_request(GPIO_FN_VIO_HD2, NULL);
480 gpio_request(GPIO_FN_VIO_FLD, NULL);
481 gpio_request(GPIO_FN_VIO_CKO, NULL);
482 gpio_request(GPIO_FN_VIO_D15, NULL);
483 gpio_request(GPIO_FN_VIO_D14, NULL);
484 gpio_request(GPIO_FN_VIO_D13, NULL);
485 gpio_request(GPIO_FN_VIO_D12, NULL);
486 gpio_request(GPIO_FN_VIO_D11, NULL);
487 gpio_request(GPIO_FN_VIO_D10, NULL);
488 gpio_request(GPIO_FN_VIO_D9, NULL);
489 gpio_request(GPIO_FN_VIO_D8, NULL);
490
491 gpio_request(GPIO_PTZ7, NULL);
492 gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
493 gpio_request(GPIO_PTZ6, NULL);
494 gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
495 gpio_request(GPIO_PTZ5, NULL);
496 gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
497 gpio_request(GPIO_PTZ4, NULL);
498 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
499
500 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
501
502 /* FLCTL */
503 gpio_request(GPIO_FN_FCE, NULL);
504 gpio_request(GPIO_FN_NAF7, NULL);
505 gpio_request(GPIO_FN_NAF6, NULL);
506 gpio_request(GPIO_FN_NAF5, NULL);
507 gpio_request(GPIO_FN_NAF4, NULL);
508 gpio_request(GPIO_FN_NAF3, NULL);
509 gpio_request(GPIO_FN_NAF2, NULL);
510 gpio_request(GPIO_FN_NAF1, NULL);
511 gpio_request(GPIO_FN_NAF0, NULL);
512 gpio_request(GPIO_FN_FCDE, NULL);
513 gpio_request(GPIO_FN_FOE, NULL);
514 gpio_request(GPIO_FN_FSC, NULL);
515 gpio_request(GPIO_FN_FWE, NULL);
516 gpio_request(GPIO_FN_FRB, NULL);
517
518 ctrl_outw(0, PORT_HIZCRC);
519 ctrl_outw(0xFFFF, PORT_DRVCRA);
520 ctrl_outw(0xFFFF, PORT_DRVCRB);
521
522 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
523
524 i2c_register_board_info(0, ap325rxa_i2c_devices,
525 ARRAY_SIZE(ap325rxa_i2c_devices));
526
527 spi_register_board_info(ap325rxa_spi_devices,
528 ARRAY_SIZE(ap325rxa_spi_devices));
529
530 return platform_add_devices(ap325rxa_devices,
531 ARRAY_SIZE(ap325rxa_devices));
532 }
533 device_initcall(ap325rxa_devices_setup);
534
535 static struct sh_machine_vector mv_ap325rxa __initmv = {
536 .mv_name = "AP-325RXA",
537 };
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