Merge branch 'fix/hda' into topic/hda
[deliverable/linux.git] / arch / sh / boards / mach-migor / setup.c
1 /*
2 * Renesas System Solutions Asia Pte. Ltd - Migo-R
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/interrupt.h>
13 #include <linux/input.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/mtd/nand.h>
16 #include <linux/i2c.h>
17 #include <linux/smc91x.h>
18 #include <linux/delay.h>
19 #include <linux/clk.h>
20 #include <linux/gpio.h>
21 #include <linux/spi/spi.h>
22 #include <linux/spi/spi_gpio.h>
23 #include <video/sh_mobile_lcdc.h>
24 #include <media/sh_mobile_ceu.h>
25 #include <media/ov772x.h>
26 #include <media/tw9910.h>
27 #include <asm/clock.h>
28 #include <asm/machvec.h>
29 #include <asm/io.h>
30 #include <asm/sh_keysc.h>
31 #include <mach/migor.h>
32 #include <cpu/sh7722.h>
33
34 /* Address IRQ Size Bus Description
35 * 0x00000000 64MB 16 NOR Flash (SP29PL256N)
36 * 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
37 * 0x10000000 IRQ0 16 Ethernet (SMC91C111)
38 * 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
39 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
40 */
41
42 static struct smc91x_platdata smc91x_info = {
43 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
44 };
45
46 static struct resource smc91x_eth_resources[] = {
47 [0] = {
48 .name = "SMC91C111" ,
49 .start = 0x10000300,
50 .end = 0x1000030f,
51 .flags = IORESOURCE_MEM,
52 },
53 [1] = {
54 .start = 32, /* IRQ0 */
55 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
56 },
57 };
58
59 static struct platform_device smc91x_eth_device = {
60 .name = "smc91x",
61 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
62 .resource = smc91x_eth_resources,
63 .dev = {
64 .platform_data = &smc91x_info,
65 },
66 };
67
68 static struct sh_keysc_info sh_keysc_info = {
69 .mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
70 .scan_timing = 3,
71 .delay = 5,
72 .keycodes = {
73 0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
74 0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
75 0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
76 0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
77 0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
78 },
79 };
80
81 static struct resource sh_keysc_resources[] = {
82 [0] = {
83 .start = 0x044b0000,
84 .end = 0x044b000f,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = {
88 .start = 79,
89 .flags = IORESOURCE_IRQ,
90 },
91 };
92
93 static struct platform_device sh_keysc_device = {
94 .name = "sh_keysc",
95 .id = 0, /* "keysc0" clock */
96 .num_resources = ARRAY_SIZE(sh_keysc_resources),
97 .resource = sh_keysc_resources,
98 .dev = {
99 .platform_data = &sh_keysc_info,
100 },
101 .archdata = {
102 .hwblk_id = HWBLK_KEYSC,
103 },
104 };
105
106 static struct mtd_partition migor_nor_flash_partitions[] =
107 {
108 {
109 .name = "uboot",
110 .offset = 0,
111 .size = (1 * 1024 * 1024),
112 .mask_flags = MTD_WRITEABLE, /* Read-only */
113 },
114 {
115 .name = "rootfs",
116 .offset = MTDPART_OFS_APPEND,
117 .size = (15 * 1024 * 1024),
118 },
119 {
120 .name = "other",
121 .offset = MTDPART_OFS_APPEND,
122 .size = MTDPART_SIZ_FULL,
123 },
124 };
125
126 static struct physmap_flash_data migor_nor_flash_data = {
127 .width = 2,
128 .parts = migor_nor_flash_partitions,
129 .nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
130 };
131
132 static struct resource migor_nor_flash_resources[] = {
133 [0] = {
134 .name = "NOR Flash",
135 .start = 0x00000000,
136 .end = 0x03ffffff,
137 .flags = IORESOURCE_MEM,
138 }
139 };
140
141 static struct platform_device migor_nor_flash_device = {
142 .name = "physmap-flash",
143 .resource = migor_nor_flash_resources,
144 .num_resources = ARRAY_SIZE(migor_nor_flash_resources),
145 .dev = {
146 .platform_data = &migor_nor_flash_data,
147 },
148 };
149
150 static struct mtd_partition migor_nand_flash_partitions[] = {
151 {
152 .name = "nanddata1",
153 .offset = 0x0,
154 .size = 512 * 1024 * 1024,
155 },
156 {
157 .name = "nanddata2",
158 .offset = MTDPART_OFS_APPEND,
159 .size = 512 * 1024 * 1024,
160 },
161 };
162
163 static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
164 unsigned int ctrl)
165 {
166 struct nand_chip *chip = mtd->priv;
167
168 if (cmd == NAND_CMD_NONE)
169 return;
170
171 if (ctrl & NAND_CLE)
172 writeb(cmd, chip->IO_ADDR_W + 0x00400000);
173 else if (ctrl & NAND_ALE)
174 writeb(cmd, chip->IO_ADDR_W + 0x00800000);
175 else
176 writeb(cmd, chip->IO_ADDR_W);
177 }
178
179 static int migor_nand_flash_ready(struct mtd_info *mtd)
180 {
181 return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
182 }
183
184 struct platform_nand_data migor_nand_flash_data = {
185 .chip = {
186 .nr_chips = 1,
187 .partitions = migor_nand_flash_partitions,
188 .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
189 .chip_delay = 20,
190 .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
191 },
192 .ctrl = {
193 .dev_ready = migor_nand_flash_ready,
194 .cmd_ctrl = migor_nand_flash_cmd_ctl,
195 },
196 };
197
198 static struct resource migor_nand_flash_resources[] = {
199 [0] = {
200 .name = "NAND Flash",
201 .start = 0x18000000,
202 .end = 0x18ffffff,
203 .flags = IORESOURCE_MEM,
204 },
205 };
206
207 static struct platform_device migor_nand_flash_device = {
208 .name = "gen_nand",
209 .resource = migor_nand_flash_resources,
210 .num_resources = ARRAY_SIZE(migor_nand_flash_resources),
211 .dev = {
212 .platform_data = &migor_nand_flash_data,
213 }
214 };
215
216 static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
217 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
218 .clock_source = LCDC_CLK_BUS,
219 .ch[0] = {
220 .chan = LCDC_CHAN_MAINLCD,
221 .bpp = 16,
222 .interface_type = RGB16,
223 .clock_divider = 2,
224 .lcd_cfg = {
225 .name = "LB070WV1",
226 .xres = 800,
227 .yres = 480,
228 .left_margin = 64,
229 .right_margin = 16,
230 .hsync_len = 120,
231 .upper_margin = 1,
232 .lower_margin = 17,
233 .vsync_len = 2,
234 .sync = 0,
235 },
236 .lcd_size_cfg = { /* 7.0 inch */
237 .width = 152,
238 .height = 91,
239 },
240 }
241 #endif
242 #ifdef CONFIG_SH_MIGOR_QVGA
243 .clock_source = LCDC_CLK_PERIPHERAL,
244 .ch[0] = {
245 .chan = LCDC_CHAN_MAINLCD,
246 .bpp = 16,
247 .interface_type = SYS16A,
248 .clock_divider = 10,
249 .lcd_cfg = {
250 .name = "PH240320T",
251 .xres = 320,
252 .yres = 240,
253 .left_margin = 0,
254 .right_margin = 16,
255 .hsync_len = 8,
256 .upper_margin = 1,
257 .lower_margin = 17,
258 .vsync_len = 2,
259 .sync = FB_SYNC_HOR_HIGH_ACT,
260 },
261 .lcd_size_cfg = { /* 2.4 inch */
262 .width = 49,
263 .height = 37,
264 },
265 .board_cfg = {
266 .setup_sys = migor_lcd_qvga_setup,
267 },
268 .sys_bus_cfg = {
269 .ldmt2r = 0x06000a09,
270 .ldmt3r = 0x180e3418,
271 /* set 1s delay to encourage fsync() */
272 .deferred_io_msec = 1000,
273 },
274 }
275 #endif
276 };
277
278 static struct resource migor_lcdc_resources[] = {
279 [0] = {
280 .name = "LCDC",
281 .start = 0xfe940000, /* P4-only space */
282 .end = 0xfe942fff,
283 .flags = IORESOURCE_MEM,
284 },
285 [1] = {
286 .start = 28,
287 .flags = IORESOURCE_IRQ,
288 },
289 };
290
291 static struct platform_device migor_lcdc_device = {
292 .name = "sh_mobile_lcdc_fb",
293 .num_resources = ARRAY_SIZE(migor_lcdc_resources),
294 .resource = migor_lcdc_resources,
295 .dev = {
296 .platform_data = &sh_mobile_lcdc_info,
297 },
298 .archdata = {
299 .hwblk_id = HWBLK_LCDC,
300 },
301 };
302
303 static struct clk *camera_clk;
304 static DEFINE_MUTEX(camera_lock);
305
306 static void camera_power_on(int is_tw)
307 {
308 mutex_lock(&camera_lock);
309
310 /* Use 10 MHz VIO_CKO instead of 24 MHz to work
311 * around signal quality issues on Panel Board V2.1.
312 */
313 camera_clk = clk_get(NULL, "video_clk");
314 clk_set_rate(camera_clk, 10000000);
315 clk_enable(camera_clk); /* start VIO_CKO */
316
317 /* use VIO_RST to take camera out of reset */
318 mdelay(10);
319 if (is_tw) {
320 gpio_set_value(GPIO_PTT2, 0);
321 gpio_set_value(GPIO_PTT0, 0);
322 } else {
323 gpio_set_value(GPIO_PTT0, 1);
324 }
325 gpio_set_value(GPIO_PTT3, 0);
326 mdelay(10);
327 gpio_set_value(GPIO_PTT3, 1);
328 mdelay(10); /* wait to let chip come out of reset */
329 }
330
331 static void camera_power_off(void)
332 {
333 clk_disable(camera_clk); /* stop VIO_CKO */
334 clk_put(camera_clk);
335
336 gpio_set_value(GPIO_PTT3, 0);
337 mutex_unlock(&camera_lock);
338 }
339
340 static int ov7725_power(struct device *dev, int mode)
341 {
342 if (mode)
343 camera_power_on(0);
344 else
345 camera_power_off();
346
347 return 0;
348 }
349
350 static int tw9910_power(struct device *dev, int mode)
351 {
352 if (mode)
353 camera_power_on(1);
354 else
355 camera_power_off();
356
357 return 0;
358 }
359
360 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
361 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
362 };
363
364 static struct resource migor_ceu_resources[] = {
365 [0] = {
366 .name = "CEU",
367 .start = 0xfe910000,
368 .end = 0xfe91009f,
369 .flags = IORESOURCE_MEM,
370 },
371 [1] = {
372 .start = 52,
373 .flags = IORESOURCE_IRQ,
374 },
375 [2] = {
376 /* place holder for contiguous memory */
377 },
378 };
379
380 static struct platform_device migor_ceu_device = {
381 .name = "sh_mobile_ceu",
382 .id = 0, /* "ceu0" clock */
383 .num_resources = ARRAY_SIZE(migor_ceu_resources),
384 .resource = migor_ceu_resources,
385 .dev = {
386 .platform_data = &sh_mobile_ceu_info,
387 },
388 .archdata = {
389 .hwblk_id = HWBLK_CEU,
390 },
391 };
392
393 struct spi_gpio_platform_data sdcard_cn9_platform_data = {
394 .sck = GPIO_PTD0,
395 .mosi = GPIO_PTD1,
396 .miso = GPIO_PTD2,
397 .num_chipselect = 1,
398 };
399
400 static struct platform_device sdcard_cn9_device = {
401 .name = "spi_gpio",
402 .dev = {
403 .platform_data = &sdcard_cn9_platform_data,
404 },
405 };
406
407 static struct i2c_board_info migor_i2c_devices[] = {
408 {
409 I2C_BOARD_INFO("rs5c372b", 0x32),
410 },
411 {
412 I2C_BOARD_INFO("migor_ts", 0x51),
413 .irq = 38, /* IRQ6 */
414 },
415 };
416
417 static struct i2c_board_info migor_i2c_camera[] = {
418 {
419 I2C_BOARD_INFO("ov772x", 0x21),
420 },
421 {
422 I2C_BOARD_INFO("tw9910", 0x45),
423 },
424 };
425
426 static struct ov772x_camera_info ov7725_info = {
427 .buswidth = SOCAM_DATAWIDTH_8,
428 .link = {
429 .power = ov7725_power,
430 .board_info = &migor_i2c_camera[0],
431 .i2c_adapter_id = 0,
432 .module_name = "ov772x",
433 },
434 };
435
436 static struct tw9910_video_info tw9910_info = {
437 .buswidth = SOCAM_DATAWIDTH_8,
438 .mpout = TW9910_MPO_FIELD,
439 .link = {
440 .power = tw9910_power,
441 .board_info = &migor_i2c_camera[1],
442 .i2c_adapter_id = 0,
443 .module_name = "tw9910",
444 }
445 };
446
447 static struct platform_device migor_camera[] = {
448 {
449 .name = "soc-camera-pdrv",
450 .id = 0,
451 .dev = {
452 .platform_data = &ov7725_info.link,
453 },
454 }, {
455 .name = "soc-camera-pdrv",
456 .id = 1,
457 .dev = {
458 .platform_data = &tw9910_info.link,
459 },
460 },
461 };
462
463 static struct platform_device *migor_devices[] __initdata = {
464 &smc91x_eth_device,
465 &sh_keysc_device,
466 &migor_lcdc_device,
467 &migor_ceu_device,
468 &migor_nor_flash_device,
469 &migor_nand_flash_device,
470 &sdcard_cn9_device,
471 &migor_camera[0],
472 &migor_camera[1],
473 };
474
475 static struct spi_board_info migor_spi_devices[] = {
476 {
477 .modalias = "mmc_spi",
478 .max_speed_hz = 5000000,
479 .chip_select = 0,
480 .controller_data = (void *) GPIO_PTD5,
481 },
482 };
483
484 static int __init migor_devices_setup(void)
485 {
486
487 #ifdef CONFIG_PM
488 /* Let D11 LED show STATUS0 */
489 gpio_request(GPIO_FN_STATUS0, NULL);
490
491 /* Lit D12 LED show PDSTATUS */
492 gpio_request(GPIO_FN_PDSTATUS, NULL);
493 #else
494 /* Lit D11 LED */
495 gpio_request(GPIO_PTJ7, NULL);
496 gpio_direction_output(GPIO_PTJ7, 1);
497 gpio_export(GPIO_PTJ7, 0);
498
499 /* Lit D12 LED */
500 gpio_request(GPIO_PTJ5, NULL);
501 gpio_direction_output(GPIO_PTJ5, 1);
502 gpio_export(GPIO_PTJ5, 0);
503 #endif
504
505 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
506 gpio_request(GPIO_FN_IRQ0, NULL);
507 ctrl_outl(0x00003400, BSC_CS4BCR);
508 ctrl_outl(0x00110080, BSC_CS4WCR);
509
510 /* KEYSC */
511 gpio_request(GPIO_FN_KEYOUT0, NULL);
512 gpio_request(GPIO_FN_KEYOUT1, NULL);
513 gpio_request(GPIO_FN_KEYOUT2, NULL);
514 gpio_request(GPIO_FN_KEYOUT3, NULL);
515 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
516 gpio_request(GPIO_FN_KEYIN1, NULL);
517 gpio_request(GPIO_FN_KEYIN2, NULL);
518 gpio_request(GPIO_FN_KEYIN3, NULL);
519 gpio_request(GPIO_FN_KEYIN4, NULL);
520 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
521
522 /* NAND Flash */
523 gpio_request(GPIO_FN_CS6A_CE2B, NULL);
524 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
525 gpio_request(GPIO_PTA1, NULL);
526 gpio_direction_input(GPIO_PTA1);
527
528 /* Touch Panel */
529 gpio_request(GPIO_FN_IRQ6, NULL);
530
531 /* LCD Panel */
532 #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
533 gpio_request(GPIO_FN_LCDD17, NULL);
534 gpio_request(GPIO_FN_LCDD16, NULL);
535 gpio_request(GPIO_FN_LCDD15, NULL);
536 gpio_request(GPIO_FN_LCDD14, NULL);
537 gpio_request(GPIO_FN_LCDD13, NULL);
538 gpio_request(GPIO_FN_LCDD12, NULL);
539 gpio_request(GPIO_FN_LCDD11, NULL);
540 gpio_request(GPIO_FN_LCDD10, NULL);
541 gpio_request(GPIO_FN_LCDD8, NULL);
542 gpio_request(GPIO_FN_LCDD7, NULL);
543 gpio_request(GPIO_FN_LCDD6, NULL);
544 gpio_request(GPIO_FN_LCDD5, NULL);
545 gpio_request(GPIO_FN_LCDD4, NULL);
546 gpio_request(GPIO_FN_LCDD3, NULL);
547 gpio_request(GPIO_FN_LCDD2, NULL);
548 gpio_request(GPIO_FN_LCDD1, NULL);
549 gpio_request(GPIO_FN_LCDRS, NULL);
550 gpio_request(GPIO_FN_LCDCS, NULL);
551 gpio_request(GPIO_FN_LCDRD, NULL);
552 gpio_request(GPIO_FN_LCDWR, NULL);
553 gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
554 gpio_direction_output(GPIO_PTH2, 1);
555 #endif
556 #ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
557 gpio_request(GPIO_FN_LCDD15, NULL);
558 gpio_request(GPIO_FN_LCDD14, NULL);
559 gpio_request(GPIO_FN_LCDD13, NULL);
560 gpio_request(GPIO_FN_LCDD12, NULL);
561 gpio_request(GPIO_FN_LCDD11, NULL);
562 gpio_request(GPIO_FN_LCDD10, NULL);
563 gpio_request(GPIO_FN_LCDD9, NULL);
564 gpio_request(GPIO_FN_LCDD8, NULL);
565 gpio_request(GPIO_FN_LCDD7, NULL);
566 gpio_request(GPIO_FN_LCDD6, NULL);
567 gpio_request(GPIO_FN_LCDD5, NULL);
568 gpio_request(GPIO_FN_LCDD4, NULL);
569 gpio_request(GPIO_FN_LCDD3, NULL);
570 gpio_request(GPIO_FN_LCDD2, NULL);
571 gpio_request(GPIO_FN_LCDD1, NULL);
572 gpio_request(GPIO_FN_LCDD0, NULL);
573 gpio_request(GPIO_FN_LCDLCLK, NULL);
574 gpio_request(GPIO_FN_LCDDCK, NULL);
575 gpio_request(GPIO_FN_LCDVEPWC, NULL);
576 gpio_request(GPIO_FN_LCDVCPWC, NULL);
577 gpio_request(GPIO_FN_LCDVSYN, NULL);
578 gpio_request(GPIO_FN_LCDHSYN, NULL);
579 gpio_request(GPIO_FN_LCDDISP, NULL);
580 gpio_request(GPIO_FN_LCDDON, NULL);
581 #endif
582
583 /* CEU */
584 gpio_request(GPIO_FN_VIO_CLK2, NULL);
585 gpio_request(GPIO_FN_VIO_VD2, NULL);
586 gpio_request(GPIO_FN_VIO_HD2, NULL);
587 gpio_request(GPIO_FN_VIO_FLD, NULL);
588 gpio_request(GPIO_FN_VIO_CKO, NULL);
589 gpio_request(GPIO_FN_VIO_D15, NULL);
590 gpio_request(GPIO_FN_VIO_D14, NULL);
591 gpio_request(GPIO_FN_VIO_D13, NULL);
592 gpio_request(GPIO_FN_VIO_D12, NULL);
593 gpio_request(GPIO_FN_VIO_D11, NULL);
594 gpio_request(GPIO_FN_VIO_D10, NULL);
595 gpio_request(GPIO_FN_VIO_D9, NULL);
596 gpio_request(GPIO_FN_VIO_D8, NULL);
597
598 gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
599 gpio_direction_output(GPIO_PTT3, 0);
600 gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
601 gpio_direction_output(GPIO_PTT2, 1);
602 gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
603 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
604 gpio_direction_output(GPIO_PTT0, 0);
605 #else
606 gpio_direction_output(GPIO_PTT0, 1);
607 #endif
608 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
609
610 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
611
612 i2c_register_board_info(0, migor_i2c_devices,
613 ARRAY_SIZE(migor_i2c_devices));
614
615 spi_register_board_info(migor_spi_devices,
616 ARRAY_SIZE(migor_spi_devices));
617
618 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
619 }
620 arch_initcall(migor_devices_setup);
621
622 /* Return the board specific boot mode pin configuration */
623 static int migor_mode_pins(void)
624 {
625 /* MD0=1, MD1=1, MD2=0: Clock Mode 3
626 * MD3=0: 16-bit Area0 Bus Width
627 * MD5=1: Little Endian
628 * TSTMD=1, MD8=0: Test Mode Disabled
629 */
630 return MODE_PIN0 | MODE_PIN1 | MODE_PIN5;
631 }
632
633 /*
634 * The Machine Vector
635 */
636 static struct sh_machine_vector mv_migor __initmv = {
637 .mv_name = "Migo-R",
638 .mv_mode_pins = migor_mode_pins,
639 };
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