arch/sh/drivers/pci/ops-se7780.c

   1 /*
   2  * linux/arch/sh/drivers/pci/ops-se7780.c
   3  *
   4  * Copyright (C) 2006  Nobuhiro Iwamatsu
   5  *
   6  * PCI initialization for the Hitachi UL Solution Engine 7780SE03
   7  *
   8  * May be copied or modified under the terms of the GNU General Public
   9  * License.  See linux/COPYING for more information.
  10  */
  11 #include <linux/kernel.h>
  12 #include <linux/types.h>
  13 #include <linux/init.h>
  14 #include <linux/delay.h>
  15 #include <linux/pci.h>
  16 #include <mach-se/mach/se7780.h>
  17 #include <asm/io.h>
  18 #include "pci-sh4.h"
  19
  20 /*
  21  * IDSEL = AD16  PCI slot
  22  * IDSEL = AD17  PCI slot
  23  * IDSEL = AD18  Serial ATA Controller (Silicon Image SiL3512A)
  24  * IDSEL = AD19  USB Host Controller (NEC uPD7210100A)
  25  */
  26
  27 /* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
  28 static char se7780_irq_tab[4][16] __initdata = {
  29         /* INTA */
  30         { 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  31         /* INTB */
  32         { 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  33         /* INTC */
  34         { 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  35         /* INTD */
  36         { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
  37 };
  38
  39 int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
  40 {
  41        return se7780_irq_tab[pin-1][slot];
  42 }
  43
  44 static struct resource se7780_io_resource = {
  45         .name   = "SH7780_IO",
  46         .start  = SH7780_PCI_IO_BASE,
  47         .end    = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
  48         .flags  = IORESOURCE_IO
  49 };
  50
  51 static struct resource se7780_mem_resource = {
  52         .name   = "SH7780_mem",
  53         .start  = SH7780_PCI_MEMORY_BASE,
  54         .end    = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
  55         .flags  = IORESOURCE_MEM
  56 };
  57
  58 extern struct pci_ops se7780_pci_ops;
  59
  60 struct pci_channel board_pci_channels[] = {
  61         { &sh4_pci_ops, &se7780_io_resource, &se7780_mem_resource, 0, 0xff },
  62         { NULL, NULL, NULL, 0, 0 },
  63 };
  64 EXPORT_SYMBOL(board_pci_channels);
  65
  66 static struct sh4_pci_address_map se7780_pci_map = {
  67         .window0        = {
  68                 .base   = SH7780_CS2_BASE_ADDR,
  69                 .size   = 0x04000000,
  70         },
  71         .flags  = SH4_PCIC_NO_RESET,
  72 };
  73
  74 int __init pcibios_init_platform(void)
  75 {
  76         printk("SH7780 PCI: Finished initialization of the PCI controller\n");
  77
  78         /*
  79          * FPGA PCISEL register initialize
  80          *
  81          *  CPU  || SLOT1 | SLOT2 | S-ATA | USB
  82          *  -------------------------------------
  83          *  INTA || INTA  | INTD  |  --   | INTB
  84          *  -------------------------------------
  85          *  INTB || INTB  | INTA  |  --   | INTC
  86          *  -------------------------------------
  87          *  INTC || INTC  | INTB  | INTA  |  --
  88          *  -------------------------------------
  89          *  INTD || INTD  | INTC  |  --   | INTA
  90          *  -------------------------------------
  91          */
  92         ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
  93         ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
  94
  95         return sh7780_pcic_init(&se7780_pci_map);
  96 }