arch/sh/include/asm/clock.h

   1 #ifndef __ASM_SH_CLOCK_H
   2 #define __ASM_SH_CLOCK_H
   3
   4 #include <linux/list.h>
   5 #include <linux/seq_file.h>
   6 #include <linux/cpufreq.h>
   7 #include <linux/clk.h>
   8 #include <linux/err.h>
   9
  10 struct clk;
  11
  12 struct clk_ops {
  13         void (*init)(struct clk *clk);
  14         int (*enable)(struct clk *clk);
  15         void (*disable)(struct clk *clk);
  16         unsigned long (*recalc)(struct clk *clk);
  17         int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
  18         int (*set_parent)(struct clk *clk, struct clk *parent);
  19         long (*round_rate)(struct clk *clk, unsigned long rate);
  20 };
  21
  22 struct clk {
  23         struct list_head        node;
  24         const char              *name;
  25         int                     id;
  26         struct module           *owner;
  27
  28         struct clk              *parent;
  29         struct clk_ops          *ops;
  30
  31         struct list_head        children;
  32         struct list_head        sibling;        /* node for children */
  33
  34         int                     usecount;
  35
  36         unsigned long           rate;
  37         unsigned long           flags;
  38
  39         void __iomem            *enable_reg;
  40         unsigned int            enable_bit;
  41
  42         unsigned long           arch_flags;
  43         void                    *priv;
  44         struct dentry           *dentry;
  45         struct cpufreq_frequency_table *freq_table;
  46 };
  47
  48 #define CLK_ENABLE_ON_INIT      (1 << 0)
  49
  50 /* Should be defined by processor-specific code */
  51 void __deprecated arch_init_clk_ops(struct clk_ops **, int type);
  52 int __init arch_clk_init(void);
  53
  54 /* arch/sh/kernel/cpu/clock.c */
  55 int clk_init(void);
  56 unsigned long followparent_recalc(struct clk *);
  57 void recalculate_root_clocks(void);
  58 void propagate_rate(struct clk *);
  59 int clk_reparent(struct clk *child, struct clk *parent);
  60 int clk_register(struct clk *);
  61 void clk_unregister(struct clk *);
  62
  63 /* arch/sh/kernel/cpu/clock-cpg.c */
  64 int __init __deprecated cpg_clk_init(void);
  65
  66 /* the exported API, in addition to clk_set_rate */
  67 /**
  68  * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
  69  * @clk: clock source
  70  * @rate: desired clock rate in Hz
  71  * @algo_id: algorithm id to be passed down to ops->set_rate
  72  *
  73  * Returns success (0) or negative errno.
  74  */
  75 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
  76
  77 enum clk_sh_algo_id {
  78         NO_CHANGE = 0,
  79
  80         IUS_N1_N1,
  81         IUS_322,
  82         IUS_522,
  83         IUS_N11,
  84
  85         SB_N1,
  86
  87         SB3_N1,
  88         SB3_32,
  89         SB3_43,
  90         SB3_54,
  91
  92         BP_N1,
  93
  94         IP_N1,
  95 };
  96
  97 struct clk_div_mult_table {
  98         unsigned int *divisors;
  99         unsigned int nr_divisors;
 100         unsigned int *multipliers;
 101         unsigned int nr_multipliers;
 102 };
 103
 104 struct cpufreq_frequency_table;
 105 void clk_rate_table_build(struct clk *clk,
 106                           struct cpufreq_frequency_table *freq_table,
 107                           int nr_freqs,
 108                           struct clk_div_mult_table *src_table,
 109                           unsigned long *bitmap);
 110
 111 long clk_rate_table_round(struct clk *clk,
 112                           struct cpufreq_frequency_table *freq_table,
 113                           unsigned long rate);
 114
 115 int clk_rate_table_find(struct clk *clk,
 116                         struct cpufreq_frequency_table *freq_table,
 117                         unsigned long rate);
 118
 119 #define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags)        \
 120 {                                                                       \
 121         .parent         = _parent,                                      \
 122         .enable_reg     = (void __iomem *)_enable_reg,                  \
 123         .enable_bit     = _enable_bit,                                  \
 124         .flags          = _flags,                                       \
 125 }
 126
 127 int sh_clk_mstp32_register(struct clk *clks, int nr);
 128
 129 #define SH_CLK_DIV4(_name, _parent, _reg, _shift, _div_bitmap, _flags)  \
 130 {                                                                       \
 131         .name = _name,                                                  \
 132         .parent = _parent,                                              \
 133         .enable_reg = (void __iomem *)_reg,                             \
 134         .enable_bit = _shift,                                           \
 135         .arch_flags = _div_bitmap,                                      \
 136         .flags = _flags,                                                \
 137 }
 138
 139 struct clk_div4_table {
 140         struct clk_div_mult_table *div_mult_table;
 141         void (*kick)(struct clk *clk);
 142 };
 143
 144 int sh_clk_div4_register(struct clk *clks, int nr,
 145                          struct clk_div4_table *table);
 146 int sh_clk_div4_enable_register(struct clk *clks, int nr,
 147                          struct clk_div4_table *table);
 148 int sh_clk_div4_reparent_register(struct clk *clks, int nr,
 149                          struct clk_div4_table *table);
 150
 151 #define SH_CLK_DIV6(_parent, _reg, _flags)      \
 152 {                                               \
 153         .parent = _parent,                      \
 154         .enable_reg = (void __iomem *)_reg,     \
 155         .flags = _flags,                        \
 156 }
 157
 158 int sh_clk_div6_register(struct clk *clks, int nr);
 159
 160 #endif /* __ASM_SH_CLOCK_H */