74ca576a7ce502984e26cf8511a7808acaf65c03
2 * Interrupt handling for INTC2-based IRQ.
4 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
5 * Copyright (C) 2005, 2006 Paul Mundt (lethal@linux-sh.org)
7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information.
10 * These are the "new Hitachi style" interrupts, as present on the
11 * Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780.
13 #include <linux/kernel.h>
14 #include <linux/irq.h>
16 #include <asm/system.h>
18 static void disable_intc2_irq(unsigned int irq
)
20 struct intc2_data
*p
= get_irq_chip_data(irq
);
21 ctrl_outl(1 << p
->msk_shift
,
22 INTC2_BASE
+ INTC2_INTMSK_OFFSET
+ p
->msk_offset
);
25 static void enable_intc2_irq(unsigned int irq
)
27 struct intc2_data
*p
= get_irq_chip_data(irq
);
28 ctrl_outl(1 << p
->msk_shift
,
29 INTC2_BASE
+ INTC2_INTMSKCLR_OFFSET
+ p
->msk_offset
);
32 static struct irq_chip intc2_irq_chip
= {
34 .mask
= disable_intc2_irq
,
35 .unmask
= enable_intc2_irq
,
36 .mask_ack
= disable_intc2_irq
,
40 * Setup an INTC2 style interrupt.
41 * NOTE: Unlike IPR interrupts, parameters are not shifted by this code,
42 * allowing the use of the numbers straight out of the datasheet.
44 * PIO1 which is INTPRI00[19,16] and INTMSK00[13]
47 * { 84, 0, 16, 0, 13 },
49 * in the intc2_data table.
51 void make_intc2_irq(struct intc2_data
*table
, unsigned int nr_irqs
)
55 for (i
= 0; i
< nr_irqs
; i
++) {
56 unsigned long ipr
, flags
;
57 struct intc2_data
*p
= table
+ i
;
59 disable_irq_nosync(p
->irq
);
61 /* Set the priority level */
62 local_irq_save(flags
);
64 ipr
= ctrl_inl(INTC2_BASE
+ INTC2_INTPRI_OFFSET
+
66 ipr
&= ~(0xf << p
->ipr_shift
);
67 ipr
|= p
->priority
<< p
->ipr_shift
;
68 ctrl_outl(ipr
, INTC2_BASE
+ INTC2_INTPRI_OFFSET
+
71 local_irq_restore(flags
);
73 set_irq_chip_and_handler_name(p
->irq
, &intc2_irq_chip
,
74 handle_level_irq
, "level");
75 set_irq_chip_data(p
->irq
, p
);
77 enable_intc2_irq(p
->irq
);
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