arch/sh/kernel/cpu/irq/intc2.c

   1 /*
   2  * Interrupt handling for INTC2-based IRQ.
   3  *
   4  * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
   5  * Copyright (C) 2005, 2006 Paul Mundt (lethal@linux-sh.org)
   6  *
   7  * May be copied or modified under the terms of the GNU General Public
   8  * License.  See linux/COPYING for more information.
   9  *
  10  * These are the "new Hitachi style" interrupts, as present on the
  11  * Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780.
  12  */
  13 #include <linux/kernel.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/io.h>
  16 #include <asm/smp.h>
  17
  18 static inline struct intc2_desc *get_intc2_desc(unsigned int irq)
  19 {
  20         struct irq_chip *chip = get_irq_chip(irq);
  21         return (void *)((char *)chip - offsetof(struct intc2_desc, chip));
  22 }
  23
  24 static void disable_intc2_irq(unsigned int irq)
  25 {
  26         struct intc2_data *p = get_irq_chip_data(irq);
  27         struct intc2_desc *d = get_intc2_desc(irq);
  28
  29         ctrl_outl(1 << p->msk_shift, d->msk_base + p->msk_offset +
  30                                      (hard_smp_processor_id() * 4));
  31 }
  32
  33 static void enable_intc2_irq(unsigned int irq)
  34 {
  35         struct intc2_data *p = get_irq_chip_data(irq);
  36         struct intc2_desc *d = get_intc2_desc(irq);
  37
  38         ctrl_outl(1 << p->msk_shift, d->mskclr_base + p->msk_offset +
  39                                      (hard_smp_processor_id() * 4));
  40 }
  41
  42 /*
  43  * Setup an INTC2 style interrupt.
  44  * NOTE: Unlike IPR interrupts, parameters are not shifted by this code,
  45  * allowing the use of the numbers straight out of the datasheet.
  46  * For example:
  47  *    PIO1 which is INTPRI00[19,16] and INTMSK00[13]
  48  * would be:               ^     ^             ^  ^
  49  *                         |     |             |  |
  50  *     { 84,               0,   16,            0, 13 },
  51  *
  52  * in the intc2_data table.
  53  */
  54 void register_intc2_controller(struct intc2_desc *desc)
  55 {
  56         int i;
  57
  58         desc->chip.mask = disable_intc2_irq;
  59         desc->chip.unmask = enable_intc2_irq;
  60         desc->chip.mask_ack = disable_intc2_irq;
  61
  62         for (i = 0; i < desc->nr_irqs; i++) {
  63                 unsigned long ipr, flags;
  64                 struct intc2_data *p = desc->intc2_data + i;
  65
  66                 disable_irq_nosync(p->irq);
  67
  68                 if (desc->prio_base) {
  69                         /* Set the priority level */
  70                         local_irq_save(flags);
  71
  72                         ipr = ctrl_inl(desc->prio_base + p->ipr_offset);
  73                         ipr &= ~(0xf << p->ipr_shift);
  74                         ipr |= p->priority << p->ipr_shift;
  75                         ctrl_outl(ipr, desc->prio_base + p->ipr_offset);
  76
  77                         local_irq_restore(flags);
  78                 }
  79
  80                 set_irq_chip_and_handler_name(p->irq, &desc->chip,
  81                                               handle_level_irq, "level");
  82                 set_irq_chip_data(p->irq, p);
  83
  84                 disable_intc2_irq(p->irq);
  85         }
  86 }