2 #include <asm/mmu_context.h>
3 #include <asm/cacheflush.h>
7 * Write back the dirty D-caches, but not invalidate them.
9 * START: Virtual Address (U0, P1, or P3)
10 * SIZE: Size of the region.
12 static void sh4__flush_wback_region(void *start
, int size
)
14 reg_size_t aligned_start
, v
, cnt
, end
;
16 aligned_start
= register_align(start
);
17 v
= aligned_start
& ~(L1_CACHE_BYTES
-1);
18 end
= (aligned_start
+ size
+ L1_CACHE_BYTES
-1)
19 & ~(L1_CACHE_BYTES
-1);
20 cnt
= (end
- v
) / L1_CACHE_BYTES
;
23 __ocbwb(v
); v
+= L1_CACHE_BYTES
;
24 __ocbwb(v
); v
+= L1_CACHE_BYTES
;
25 __ocbwb(v
); v
+= L1_CACHE_BYTES
;
26 __ocbwb(v
); v
+= L1_CACHE_BYTES
;
27 __ocbwb(v
); v
+= L1_CACHE_BYTES
;
28 __ocbwb(v
); v
+= L1_CACHE_BYTES
;
29 __ocbwb(v
); v
+= L1_CACHE_BYTES
;
30 __ocbwb(v
); v
+= L1_CACHE_BYTES
;
35 __ocbwb(v
); v
+= L1_CACHE_BYTES
;
41 * Write back the dirty D-caches and invalidate them.
43 * START: Virtual Address (U0, P1, or P3)
44 * SIZE: Size of the region.
46 static void sh4__flush_purge_region(void *start
, int size
)
48 reg_size_t aligned_start
, v
, cnt
, end
;
50 aligned_start
= register_align(start
);
51 v
= aligned_start
& ~(L1_CACHE_BYTES
-1);
52 end
= (aligned_start
+ size
+ L1_CACHE_BYTES
-1)
53 & ~(L1_CACHE_BYTES
-1);
54 cnt
= (end
- v
) / L1_CACHE_BYTES
;
57 __ocbp(v
); v
+= L1_CACHE_BYTES
;
58 __ocbp(v
); v
+= L1_CACHE_BYTES
;
59 __ocbp(v
); v
+= L1_CACHE_BYTES
;
60 __ocbp(v
); v
+= L1_CACHE_BYTES
;
61 __ocbp(v
); v
+= L1_CACHE_BYTES
;
62 __ocbp(v
); v
+= L1_CACHE_BYTES
;
63 __ocbp(v
); v
+= L1_CACHE_BYTES
;
64 __ocbp(v
); v
+= L1_CACHE_BYTES
;
68 __ocbp(v
); v
+= L1_CACHE_BYTES
;
74 * No write back please
76 static void sh4__flush_invalidate_region(void *start
, int size
)
78 reg_size_t aligned_start
, v
, cnt
, end
;
80 aligned_start
= register_align(start
);
81 v
= aligned_start
& ~(L1_CACHE_BYTES
-1);
82 end
= (aligned_start
+ size
+ L1_CACHE_BYTES
-1)
83 & ~(L1_CACHE_BYTES
-1);
84 cnt
= (end
- v
) / L1_CACHE_BYTES
;
87 __ocbi(v
); v
+= L1_CACHE_BYTES
;
88 __ocbi(v
); v
+= L1_CACHE_BYTES
;
89 __ocbi(v
); v
+= L1_CACHE_BYTES
;
90 __ocbi(v
); v
+= L1_CACHE_BYTES
;
91 __ocbi(v
); v
+= L1_CACHE_BYTES
;
92 __ocbi(v
); v
+= L1_CACHE_BYTES
;
93 __ocbi(v
); v
+= L1_CACHE_BYTES
;
94 __ocbi(v
); v
+= L1_CACHE_BYTES
;
99 __ocbi(v
); v
+= L1_CACHE_BYTES
;
104 void __init
sh4__flush_region_init(void)
106 __flush_wback_region
= sh4__flush_wback_region
;
107 __flush_invalidate_region
= sh4__flush_invalidate_region
;
108 __flush_purge_region
= sh4__flush_purge_region
;