arch/sh64/Kconfig

   1 #
   2 # For a description of the syntax of this configuration file,
   3 # see Documentation/kbuild/config-language.txt.
   4 #
   5
   6 mainmenu "Linux/SH64 Kernel Configuration"
   7
   8 config SUPERH
   9         bool
  10         default y
  11
  12 config SUPERH64
  13         bool
  14         default y
  15
  16 config MMU
  17         bool
  18         default y
  19
  20 config QUICKLIST
  21         def_bool y
  22
  23 config RWSEM_GENERIC_SPINLOCK
  24         bool
  25         default y
  26
  27 config GENERIC_FIND_NEXT_BIT
  28         bool
  29         default y
  30
  31 config GENERIC_HWEIGHT
  32         bool
  33         default y
  34
  35 config GENERIC_CALIBRATE_DELAY
  36         bool
  37         default y
  38
  39 config RWSEM_XCHGADD_ALGORITHM
  40         bool
  41
  42 config ARCH_HAS_ILOG2_U32
  43         bool
  44         default n
  45
  46 config ARCH_HAS_ILOG2_U64
  47         bool
  48         default n
  49
  50 config ARCH_NO_VIRT_TO_BUS
  51         def_bool y
  52
  53 source init/Kconfig
  54
  55 menu "System type"
  56
  57 choice
  58         prompt "SuperH system type"
  59         default SH_SIMULATOR
  60
  61 config SH_GENERIC
  62         bool "Generic"
  63
  64 config SH_SIMULATOR
  65         bool "Simulator"
  66
  67 config SH_CAYMAN
  68         bool "Cayman"
  69
  70 config SH_ROMRAM
  71         bool "ROM/RAM"
  72
  73 config SH_HARP
  74         bool "ST50-Harp"
  75
  76 endchoice
  77
  78 choice
  79         prompt "Processor family"
  80         default CPU_SH5
  81
  82 config CPU_SH5
  83         bool "SH-5"
  84
  85 endchoice
  86
  87 choice
  88         prompt "Processor type"
  89
  90 config CPU_SUBTYPE_SH5_101
  91         bool "SH5-101"
  92         depends on CPU_SH5
  93
  94 config CPU_SUBTYPE_SH5_103
  95         bool "SH5-103"
  96         depends on CPU_SH5
  97
  98 endchoice
  99
 100 choice
 101         prompt "Endianness"
 102         default LITTLE_ENDIAN
 103
 104 config LITTLE_ENDIAN
 105         bool "Little-Endian"
 106
 107 config BIG_ENDIAN
 108         bool "Big-Endian"
 109
 110 endchoice
 111
 112 config SH_FPU
 113         bool "FPU support"
 114         default y
 115
 116 config SH64_FPU_DENORM_FLUSH
 117         depends on SH_FPU
 118         bool "Flush floating point denorms to zero"
 119
 120 choice
 121         prompt "Page table levels"
 122         default SH64_PGTABLE_2_LEVEL
 123
 124 config SH64_PGTABLE_2_LEVEL
 125         bool "2"
 126
 127 config SH64_PGTABLE_3_LEVEL
 128         bool "3"
 129
 130 endchoice
 131
 132 choice
 133         prompt "HugeTLB page size"
 134         depends on HUGETLB_PAGE && MMU
 135         default HUGETLB_PAGE_SIZE_64K
 136
 137 config HUGETLB_PAGE_SIZE_64K
 138         bool "64K"
 139
 140 config HUGETLB_PAGE_SIZE_1MB
 141         bool "1MB"
 142
 143 config HUGETLB_PAGE_SIZE_512MB
 144         bool "512MB"
 145
 146 endchoice
 147
 148 config SH64_USER_MISALIGNED_FIXUP
 149         bool "Fixup misaligned loads/stores occurring in user mode"
 150
 151 comment "Memory options"
 152
 153 config CACHED_MEMORY_OFFSET
 154         hex "Cached Area Offset"
 155         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 156         default "20000000"
 157
 158 config MEMORY_START
 159         hex "Physical memory start address"
 160         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 161         default "80000000"
 162
 163 config MEMORY_SIZE_IN_MB
 164         int "Memory size (in MB)" if SH_HARP || SH_CAYMAN || SH_SIMULATOR
 165         default "64" if SH_HARP || SH_CAYMAN
 166         default "8" if SH_SIMULATOR
 167
 168 comment "Cache options"
 169
 170 config DCACHE_DISABLED
 171         bool "DCache Disabling"
 172         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 173
 174 choice
 175         prompt "DCache mode"
 176         depends on !DCACHE_DISABLED && !SH_SIMULATOR
 177         default DCACHE_WRITE_BACK
 178
 179 config DCACHE_WRITE_BACK
 180         bool "Write-back"
 181
 182 config DCACHE_WRITE_THROUGH
 183         bool "Write-through"
 184
 185 endchoice
 186
 187 config ICACHE_DISABLED
 188         bool "ICache Disabling"
 189         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 190
 191 config PCIDEVICE_MEMORY_START
 192         hex
 193         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 194         default "C0000000"
 195
 196 config DEVICE_MEMORY_START
 197         hex
 198         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 199         default "E0000000"
 200
 201 config FLASH_MEMORY_START
 202         hex "Flash memory/on-chip devices start address"
 203         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 204         default "00000000"
 205
 206 config PCI_BLOCK_START
 207         hex "PCI block start address"
 208         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 209         default "40000000"
 210
 211 comment "CPU Subtype specific options"
 212
 213 config SH64_ID2815_WORKAROUND
 214         bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
 215
 216 comment "Misc options"
 217 config HEARTBEAT
 218         bool "Heartbeat LED"
 219
 220 config HDSP253_LED
 221         bool "Support for HDSP-253 LED"
 222         depends on SH_CAYMAN
 223
 224 config SH_DMA
 225         tristate "DMA controller (DMAC) support"
 226
 227 config PREEMPT
 228         bool "Preemptible Kernel (EXPERIMENTAL)"
 229         depends on EXPERIMENTAL
 230
 231 source "mm/Kconfig"
 232
 233 endmenu
 234
 235 menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
 236
 237 config ISA
 238         bool
 239
 240 config SBUS
 241         bool
 242
 243 config PCI
 244         bool "PCI support"
 245         help
 246           Find out whether you have a PCI motherboard. PCI is the name of a
 247           bus system, i.e. the way the CPU talks to the other stuff inside
 248           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
 249           VESA. If you have PCI, say Y, otherwise N.
 250
 251           The PCI-HOWTO, available from
 252           <http://www.tldp.org/docs.html#howto>, contains valuable
 253           information about which PCI hardware does work under Linux and which
 254           doesn't.
 255
 256 config SH_PCIDMA_NONCOHERENT
 257         bool "Cache and PCI noncoherent"
 258         depends on PCI
 259         default y
 260         help
 261           Enable this option if your platform does not have a CPU cache which
 262           remains coherent with PCI DMA. It is safest to say 'Y', although you
 263           will see better performance if you can say 'N', because the PCI DMA
 264           code will not have to flush the CPU's caches. If you have a PCI host
 265           bridge integrated with your SH CPU, refer carefully to the chip specs
 266           to see if you can say 'N' here. Otherwise, leave it as 'Y'.
 267
 268 source "drivers/pci/Kconfig"
 269
 270 source "drivers/pcmcia/Kconfig"
 271
 272 source "drivers/pci/hotplug/Kconfig"
 273
 274 endmenu
 275
 276 menu "Executable file formats"
 277
 278 source "fs/Kconfig.binfmt"
 279
 280 endmenu
 281
 282 source "net/Kconfig"
 283
 284 source "drivers/Kconfig"
 285
 286 source "fs/Kconfig"
 287
 288 source "arch/sh64/oprofile/Kconfig"
 289
 290 source "arch/sh64/Kconfig.debug"
 291
 292 source "security/Kconfig"
 293
 294 source "crypto/Kconfig"
 295
 296 source "lib/Kconfig"
 297
 298 #
 299 # Use the generic interrupt handling code in kernel/irq/:
 300 #
 301 config GENERIC_HARDIRQS
 302         bool
 303         default y
 304
 305 config GENERIC_IRQ_PROBE
 306         bool
 307         default y
 308