arch/sparc/include/asm/dma-mapping.h

   1 #ifndef ___ASM_SPARC_DMA_MAPPING_H
   2 #define ___ASM_SPARC_DMA_MAPPING_H
   3
   4 #include <linux/scatterlist.h>
   5 #include <linux/mm.h>
   6 #include <linux/dma-debug.h>
   7
   8 #define DMA_ERROR_CODE  (~(dma_addr_t)0x0)
   9
  10 extern int dma_supported(struct device *dev, u64 mask);
  11 extern int dma_set_mask(struct device *dev, u64 dma_mask);
  12
  13 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
  14 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
  15 #define dma_is_consistent(d, h) (1)
  16
  17 extern struct dma_map_ops *dma_ops;
  18
  19 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
  20 {
  21         return dma_ops;
  22 }
  23
  24 #include <asm-generic/dma-mapping-common.h>
  25
  26 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  27                                        dma_addr_t *dma_handle, gfp_t flag)
  28 {
  29         struct dma_map_ops *ops = get_dma_ops(dev);
  30
  31         return ops->alloc_coherent(dev, size, dma_handle, flag);
  32 }
  33
  34 static inline void dma_free_coherent(struct device *dev, size_t size,
  35                                      void *cpu_addr, dma_addr_t dma_handle)
  36 {
  37         struct dma_map_ops *ops = get_dma_ops(dev);
  38
  39         ops->free_coherent(dev, size, cpu_addr, dma_handle);
  40 }
  41
  42 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  43 {
  44         return (dma_addr == DMA_ERROR_CODE);
  45 }
  46
  47 static inline int dma_get_cache_alignment(void)
  48 {
  49         /*
  50          * no easy way to get cache size on all processors, so return
  51          * the maximum possible, to be safe
  52          */
  53         return (1 << INTERNODE_CACHE_SHIFT);
  54 }
  55
  56 #endif