sparc64: Fix physical memory management regressions with large max_phys_bits.
[deliverable/linux.git] / arch / sparc / include / asm / page_64.h
1 #ifndef _SPARC64_PAGE_H
2 #define _SPARC64_PAGE_H
3
4 #include <linux/const.h>
5
6 #define PAGE_SHIFT 13
7
8 #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
9 #define PAGE_MASK (~(PAGE_SIZE-1))
10
11 /* Flushing for D-cache alias handling is only needed if
12 * the page size is smaller than 16K.
13 */
14 #if PAGE_SHIFT < 14
15 #define DCACHE_ALIASING_POSSIBLE
16 #endif
17
18 #define HPAGE_SHIFT 23
19 #define REAL_HPAGE_SHIFT 22
20
21 #define REAL_HPAGE_SIZE (_AC(1,UL) << REAL_HPAGE_SHIFT)
22
23 #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
24 #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
25 #define HPAGE_MASK (~(HPAGE_SIZE - 1UL))
26 #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
27 #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
28 #endif
29
30 #ifndef __ASSEMBLY__
31
32 #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
33 struct pt_regs;
34 void hugetlb_setup(struct pt_regs *regs);
35 #endif
36
37 #define WANT_PAGE_VIRTUAL
38
39 void _clear_page(void *page);
40 #define clear_page(X) _clear_page((void *)(X))
41 struct page;
42 void clear_user_page(void *addr, unsigned long vaddr, struct page *page);
43 #define copy_page(X,Y) memcpy((void *)(X), (void *)(Y), PAGE_SIZE)
44 void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage);
45
46 /* Unlike sparc32, sparc64's parameter passing API is more
47 * sane in that structures which as small enough are passed
48 * in registers instead of on the stack. Thus, setting
49 * STRICT_MM_TYPECHECKS does not generate worse code so
50 * let's enable it to get the type checking.
51 */
52
53 #define STRICT_MM_TYPECHECKS
54
55 #ifdef STRICT_MM_TYPECHECKS
56 /* These are used to make use of C type-checking.. */
57 typedef struct { unsigned long pte; } pte_t;
58 typedef struct { unsigned long iopte; } iopte_t;
59 typedef struct { unsigned long pmd; } pmd_t;
60 typedef struct { unsigned long pud; } pud_t;
61 typedef struct { unsigned long pgd; } pgd_t;
62 typedef struct { unsigned long pgprot; } pgprot_t;
63
64 #define pte_val(x) ((x).pte)
65 #define iopte_val(x) ((x).iopte)
66 #define pmd_val(x) ((x).pmd)
67 #define pud_val(x) ((x).pud)
68 #define pgd_val(x) ((x).pgd)
69 #define pgprot_val(x) ((x).pgprot)
70
71 #define __pte(x) ((pte_t) { (x) } )
72 #define __iopte(x) ((iopte_t) { (x) } )
73 #define __pmd(x) ((pmd_t) { (x) } )
74 #define __pud(x) ((pud_t) { (x) } )
75 #define __pgd(x) ((pgd_t) { (x) } )
76 #define __pgprot(x) ((pgprot_t) { (x) } )
77
78 #else
79 /* .. while these make it easier on the compiler */
80 typedef unsigned long pte_t;
81 typedef unsigned long iopte_t;
82 typedef unsigned long pmd_t;
83 typedef unsigned long pud_t;
84 typedef unsigned long pgd_t;
85 typedef unsigned long pgprot_t;
86
87 #define pte_val(x) (x)
88 #define iopte_val(x) (x)
89 #define pmd_val(x) (x)
90 #define pud_val(x) (x)
91 #define pgd_val(x) (x)
92 #define pgprot_val(x) (x)
93
94 #define __pte(x) (x)
95 #define __iopte(x) (x)
96 #define __pmd(x) (x)
97 #define __pud(x) (x)
98 #define __pgd(x) (x)
99 #define __pgprot(x) (x)
100
101 #endif /* (STRICT_MM_TYPECHECKS) */
102
103 typedef pte_t *pgtable_t;
104
105 extern unsigned long sparc64_va_hole_top;
106 extern unsigned long sparc64_va_hole_bottom;
107
108 /* The next two defines specify the actual exclusion region we
109 * enforce, wherein we use a 4GB red zone on each side of the VA hole.
110 */
111 #define VA_EXCLUDE_START (sparc64_va_hole_bottom - (1UL << 32UL))
112 #define VA_EXCLUDE_END (sparc64_va_hole_top + (1UL << 32UL))
113
114 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \
115 _AC(0x0000000070000000,UL) : \
116 VA_EXCLUDE_END)
117
118 #include <asm-generic/memory_model.h>
119
120 #define PAGE_OFFSET_BY_BITS(X) (-(_AC(1,UL) << (X)))
121 extern unsigned long PAGE_OFFSET;
122
123 #endif /* !(__ASSEMBLY__) */
124
125 /* The maximum number of physical memory address bits we support, this
126 * is used to size various tables used to manage kernel TLB misses and
127 * also the sparsemem code.
128 */
129 #define MAX_PHYS_ADDRESS_BITS 47
130
131 #define ILOG2_4MB 22
132 #define ILOG2_256MB 28
133
134 #ifndef __ASSEMBLY__
135
136 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
137 #define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
138
139 #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
140
141 #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr)>>PAGE_SHIFT)
142
143 #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
144
145 #define virt_to_phys __pa
146 #define phys_to_virt __va
147
148 #endif /* !(__ASSEMBLY__) */
149
150 #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
151 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
152
153 #include <asm-generic/getorder.h>
154
155 #endif /* _SPARC64_PAGE_H */
This page took 0.053872 seconds and 5 git commands to generate.