arch/sparc/include/asm/processor_64.h

   1 /*
   2  * include/asm/processor.h
   3  *
   4  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6
   7 #ifndef __ASM_SPARC64_PROCESSOR_H
   8 #define __ASM_SPARC64_PROCESSOR_H
   9
  10 /*
  11  * Sparc64 implementation of macro that returns current
  12  * instruction pointer ("program counter").
  13  */
  14 #define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
  15
  16 #include <asm/asi.h>
  17 #include <asm/pstate.h>
  18 #include <asm/ptrace.h>
  19 #include <asm/page.h>
  20
  21 /* Don't hold the runqueue lock over context switch */
  22 #define __ARCH_WANT_UNLOCKED_CTXSW
  23
  24 /* The sparc has no problems with write protection */
  25 #define wp_works_ok 1
  26 #define wp_works_ok__is_a_macro /* for versions in ksyms.c */
  27
  28 /*
  29  * User lives in his very own context, and cannot reference us. Note
  30  * that TASK_SIZE is a misnomer, it really gives maximum user virtual
  31  * address that the kernel will allocate out.
  32  *
  33  * XXX No longer using virtual page tables, kill this upper limit...
  34  */
  35 #define VA_BITS         44
  36 #ifndef __ASSEMBLY__
  37 #define VPTE_SIZE       (1UL << (VA_BITS - PAGE_SHIFT + 3))
  38 #else
  39 #define VPTE_SIZE       (1 << (VA_BITS - PAGE_SHIFT + 3))
  40 #endif
  41
  42 #define TASK_SIZE_OF(tsk) \
  43         (test_tsk_thread_flag(tsk,TIF_32BIT) ? \
  44          (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
  45 #define TASK_SIZE \
  46         (test_thread_flag(TIF_32BIT) ? \
  47          (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
  48 #ifdef __KERNEL__
  49
  50 #define STACK_TOP32     ((1UL << 32UL) - PAGE_SIZE)
  51 #define STACK_TOP64     (0x0000080000000000UL - (1UL << 32UL))
  52
  53 #define STACK_TOP       (test_thread_flag(TIF_32BIT) ? \
  54                          STACK_TOP32 : STACK_TOP64)
  55
  56 #define STACK_TOP_MAX   STACK_TOP64
  57
  58 #endif
  59
  60 #ifndef __ASSEMBLY__
  61
  62 typedef struct {
  63         unsigned char seg;
  64 } mm_segment_t;
  65
  66 /* The Sparc processor specific thread struct. */
  67 /* XXX This should die, everything can go into thread_info now. */
  68 struct thread_struct {
  69 #ifdef CONFIG_DEBUG_SPINLOCK
  70         /* How many spinlocks held by this thread.
  71          * Used with spin lock debugging to catch tasks
  72          * sleeping illegally with locks held.
  73          */
  74         int smp_lock_count;
  75         unsigned int smp_lock_pc;
  76 #else
  77         int dummy; /* f'in gcc bug... */
  78 #endif
  79 };
  80
  81 #endif /* !(__ASSEMBLY__) */
  82
  83 #ifndef CONFIG_DEBUG_SPINLOCK
  84 #define INIT_THREAD  {                  \
  85         0,                              \
  86 }
  87 #else /* CONFIG_DEBUG_SPINLOCK */
  88 #define INIT_THREAD  {                                  \
  89 /* smp_lock_count, smp_lock_pc, */                      \
  90    0,              0,                                   \
  91 }
  92 #endif /* !(CONFIG_DEBUG_SPINLOCK) */
  93
  94 #ifndef __ASSEMBLY__
  95
  96 #include <linux/types.h>
  97
  98 /* Return saved PC of a blocked thread. */
  99 struct task_struct;
 100 extern unsigned long thread_saved_pc(struct task_struct *);
 101
 102 /* On Uniprocessor, even in RMO processes see TSO semantics */
 103 #ifdef CONFIG_SMP
 104 #define TSTATE_INITIAL_MM       TSTATE_TSO
 105 #else
 106 #define TSTATE_INITIAL_MM       TSTATE_RMO
 107 #endif
 108
 109 /* Do necessary setup to start up a newly executed thread. */
 110 #define start_thread(regs, pc, sp) \
 111 do { \
 112         unsigned long __asi = ASI_PNF; \
 113         regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \
 114         regs->tpc = ((pc & (~3)) - 4); \
 115         regs->tnpc = regs->tpc + 4; \
 116         regs->y = 0; \
 117         set_thread_wstate(1 << 3); \
 118         if (current_thread_info()->utraps) { \
 119                 if (*(current_thread_info()->utraps) < 2) \
 120                         kfree(current_thread_info()->utraps); \
 121                 else \
 122                         (*(current_thread_info()->utraps))--; \
 123                 current_thread_info()->utraps = NULL; \
 124         } \
 125         __asm__ __volatile__( \
 126         "stx            %%g0, [%0 + %2 + 0x00]\n\t" \
 127         "stx            %%g0, [%0 + %2 + 0x08]\n\t" \
 128         "stx            %%g0, [%0 + %2 + 0x10]\n\t" \
 129         "stx            %%g0, [%0 + %2 + 0x18]\n\t" \
 130         "stx            %%g0, [%0 + %2 + 0x20]\n\t" \
 131         "stx            %%g0, [%0 + %2 + 0x28]\n\t" \
 132         "stx            %%g0, [%0 + %2 + 0x30]\n\t" \
 133         "stx            %%g0, [%0 + %2 + 0x38]\n\t" \
 134         "stx            %%g0, [%0 + %2 + 0x40]\n\t" \
 135         "stx            %%g0, [%0 + %2 + 0x48]\n\t" \
 136         "stx            %%g0, [%0 + %2 + 0x50]\n\t" \
 137         "stx            %%g0, [%0 + %2 + 0x58]\n\t" \
 138         "stx            %%g0, [%0 + %2 + 0x60]\n\t" \
 139         "stx            %%g0, [%0 + %2 + 0x68]\n\t" \
 140         "stx            %1,   [%0 + %2 + 0x70]\n\t" \
 141         "stx            %%g0, [%0 + %2 + 0x78]\n\t" \
 142         "wrpr           %%g0, (1 << 3), %%wstate\n\t" \
 143         : \
 144         : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
 145           "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
 146 } while (0)
 147
 148 #define start_thread32(regs, pc, sp) \
 149 do { \
 150         unsigned long __asi = ASI_PNF; \
 151         pc &= 0x00000000ffffffffUL; \
 152         sp &= 0x00000000ffffffffUL; \
 153         regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \
 154         regs->tpc = ((pc & (~3)) - 4); \
 155         regs->tnpc = regs->tpc + 4; \
 156         regs->y = 0; \
 157         set_thread_wstate(2 << 3); \
 158         if (current_thread_info()->utraps) { \
 159                 if (*(current_thread_info()->utraps) < 2) \
 160                         kfree(current_thread_info()->utraps); \
 161                 else \
 162                         (*(current_thread_info()->utraps))--; \
 163                 current_thread_info()->utraps = NULL; \
 164         } \
 165         __asm__ __volatile__( \
 166         "stx            %%g0, [%0 + %2 + 0x00]\n\t" \
 167         "stx            %%g0, [%0 + %2 + 0x08]\n\t" \
 168         "stx            %%g0, [%0 + %2 + 0x10]\n\t" \
 169         "stx            %%g0, [%0 + %2 + 0x18]\n\t" \
 170         "stx            %%g0, [%0 + %2 + 0x20]\n\t" \
 171         "stx            %%g0, [%0 + %2 + 0x28]\n\t" \
 172         "stx            %%g0, [%0 + %2 + 0x30]\n\t" \
 173         "stx            %%g0, [%0 + %2 + 0x38]\n\t" \
 174         "stx            %%g0, [%0 + %2 + 0x40]\n\t" \
 175         "stx            %%g0, [%0 + %2 + 0x48]\n\t" \
 176         "stx            %%g0, [%0 + %2 + 0x50]\n\t" \
 177         "stx            %%g0, [%0 + %2 + 0x58]\n\t" \
 178         "stx            %%g0, [%0 + %2 + 0x60]\n\t" \
 179         "stx            %%g0, [%0 + %2 + 0x68]\n\t" \
 180         "stx            %1,   [%0 + %2 + 0x70]\n\t" \
 181         "stx            %%g0, [%0 + %2 + 0x78]\n\t" \
 182         "wrpr           %%g0, (2 << 3), %%wstate\n\t" \
 183         : \
 184         : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
 185           "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
 186 } while (0)
 187
 188 /* Free all resources held by a thread. */
 189 #define release_thread(tsk)             do { } while (0)
 190
 191 extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 192
 193 extern unsigned long get_wchan(struct task_struct *task);
 194
 195 #define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
 196 #define KSTK_EIP(tsk)  (task_pt_regs(tsk)->tpc)
 197 #define KSTK_ESP(tsk)  (task_pt_regs(tsk)->u_regs[UREG_FP])
 198
 199 #define cpu_relax()     barrier()
 200
 201 /* Prefetch support.  This is tuned for UltraSPARC-III and later.
 202  * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
 203  * a shallower prefetch queue than later chips.
 204  */
 205 #define ARCH_HAS_PREFETCH
 206 #define ARCH_HAS_PREFETCHW
 207 #define ARCH_HAS_SPINLOCK_PREFETCH
 208
 209 static inline void prefetch(const void *x)
 210 {
 211         /* We do not use the read prefetch mnemonic because that
 212          * prefetches into the prefetch-cache which only is accessible
 213          * by floating point operations in UltraSPARC-III and later.
 214          * By contrast, "#one_write" prefetches into the L2 cache
 215          * in shared state.
 216          */
 217         __asm__ __volatile__("prefetch [%0], #one_write"
 218                              : /* no outputs */
 219                              : "r" (x));
 220 }
 221
 222 static inline void prefetchw(const void *x)
 223 {
 224         /* The most optimal prefetch to use for writes is
 225          * "#n_writes".  This brings the cacheline into the
 226          * L2 cache in "owned" state.
 227          */
 228         __asm__ __volatile__("prefetch [%0], #n_writes"
 229                              : /* no outputs */
 230                              : "r" (x));
 231 }
 232
 233 #define spin_lock_prefetch(x)   prefetchw(x)
 234
 235 #define HAVE_ARCH_PICK_MMAP_LAYOUT
 236
 237 #endif /* !(__ASSEMBLY__) */
 238
 239 #endif /* !(__ASM_SPARC64_PROCESSOR_H) */