MAINTAINERS: Add phy-miphy28lp.c and phy-miphy365x.c to ARCH/STI architecture
[deliverable/linux.git] / arch / sparc / kernel / entry.h
1 #ifndef _ENTRY_H
2 #define _ENTRY_H
3
4 #include <linux/kernel.h>
5 #include <linux/types.h>
6 #include <linux/init.h>
7
8 /* irq */
9 void handler_irq(int irq, struct pt_regs *regs);
10
11 #ifdef CONFIG_SPARC32
12 /* traps */
13 void do_hw_interrupt(struct pt_regs *regs, unsigned long type);
14 void do_illegal_instruction(struct pt_regs *regs, unsigned long pc,
15 unsigned long npc, unsigned long psr);
16
17 void do_priv_instruction(struct pt_regs *regs, unsigned long pc,
18 unsigned long npc, unsigned long psr);
19 void do_memaccess_unaligned(struct pt_regs *regs, unsigned long pc,
20 unsigned long npc, unsigned long psr);
21 void do_fpd_trap(struct pt_regs *regs, unsigned long pc,
22 unsigned long npc, unsigned long psr);
23 void do_fpe_trap(struct pt_regs *regs, unsigned long pc,
24 unsigned long npc, unsigned long psr);
25 void handle_tag_overflow(struct pt_regs *regs, unsigned long pc,
26 unsigned long npc, unsigned long psr);
27 void handle_watchpoint(struct pt_regs *regs, unsigned long pc,
28 unsigned long npc, unsigned long psr);
29 void handle_reg_access(struct pt_regs *regs, unsigned long pc,
30 unsigned long npc, unsigned long psr);
31 void handle_cp_disabled(struct pt_regs *regs, unsigned long pc,
32 unsigned long npc, unsigned long psr);
33 void handle_cp_exception(struct pt_regs *regs, unsigned long pc,
34 unsigned long npc, unsigned long psr);
35
36
37
38 /* entry.S */
39 void fpsave(unsigned long *fpregs, unsigned long *fsr,
40 void *fpqueue, unsigned long *fpqdepth);
41 void fpload(unsigned long *fpregs, unsigned long *fsr);
42
43 #else /* CONFIG_SPARC32 */
44
45 #include <asm/trap_block.h>
46
47 struct popc_3insn_patch_entry {
48 unsigned int addr;
49 unsigned int insns[3];
50 };
51 extern struct popc_3insn_patch_entry __popc_3insn_patch,
52 __popc_3insn_patch_end;
53
54 struct popc_6insn_patch_entry {
55 unsigned int addr;
56 unsigned int insns[6];
57 };
58 extern struct popc_6insn_patch_entry __popc_6insn_patch,
59 __popc_6insn_patch_end;
60
61 struct pause_patch_entry {
62 unsigned int addr;
63 unsigned int insns[3];
64 };
65 extern struct pause_patch_entry __pause_3insn_patch,
66 __pause_3insn_patch_end;
67
68 void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
69 struct sun4v_1insn_patch_entry *);
70 void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *,
71 struct sun4v_2insn_patch_entry *);
72 extern unsigned int dcache_parity_tl1_occurred;
73 extern unsigned int icache_parity_tl1_occurred;
74
75 asmlinkage void sparc_breakpoint(struct pt_regs *regs);
76 void timer_interrupt(int irq, struct pt_regs *regs);
77
78 void do_notify_resume(struct pt_regs *regs,
79 unsigned long orig_i0,
80 unsigned long thread_info_flags);
81
82 asmlinkage int syscall_trace_enter(struct pt_regs *regs);
83 asmlinkage void syscall_trace_leave(struct pt_regs *regs);
84
85 void bad_trap_tl1(struct pt_regs *regs, long lvl);
86
87 void do_fpieee(struct pt_regs *regs);
88 void do_fpother(struct pt_regs *regs);
89 void do_tof(struct pt_regs *regs);
90 void do_div0(struct pt_regs *regs);
91 void do_illegal_instruction(struct pt_regs *regs);
92 void mem_address_unaligned(struct pt_regs *regs,
93 unsigned long sfar,
94 unsigned long sfsr);
95 void sun4v_do_mna(struct pt_regs *regs,
96 unsigned long addr,
97 unsigned long type_ctx);
98 void do_privop(struct pt_regs *regs);
99 void do_privact(struct pt_regs *regs);
100 void do_cee(struct pt_regs *regs);
101 void do_cee_tl1(struct pt_regs *regs);
102 void do_dae_tl1(struct pt_regs *regs);
103 void do_iae_tl1(struct pt_regs *regs);
104 void do_div0_tl1(struct pt_regs *regs);
105 void do_fpdis_tl1(struct pt_regs *regs);
106 void do_fpieee_tl1(struct pt_regs *regs);
107 void do_fpother_tl1(struct pt_regs *regs);
108 void do_ill_tl1(struct pt_regs *regs);
109 void do_irq_tl1(struct pt_regs *regs);
110 void do_lddfmna_tl1(struct pt_regs *regs);
111 void do_stdfmna_tl1(struct pt_regs *regs);
112 void do_paw(struct pt_regs *regs);
113 void do_paw_tl1(struct pt_regs *regs);
114 void do_vaw(struct pt_regs *regs);
115 void do_vaw_tl1(struct pt_regs *regs);
116 void do_tof_tl1(struct pt_regs *regs);
117 void do_getpsr(struct pt_regs *regs);
118
119 void spitfire_insn_access_exception(struct pt_regs *regs,
120 unsigned long sfsr,
121 unsigned long sfar);
122 void spitfire_insn_access_exception_tl1(struct pt_regs *regs,
123 unsigned long sfsr,
124 unsigned long sfar);
125 void spitfire_data_access_exception(struct pt_regs *regs,
126 unsigned long sfsr,
127 unsigned long sfar);
128 void spitfire_data_access_exception_tl1(struct pt_regs *regs,
129 unsigned long sfsr,
130 unsigned long sfar);
131 void spitfire_access_error(struct pt_regs *regs,
132 unsigned long status_encoded,
133 unsigned long afar);
134
135 void cheetah_fecc_handler(struct pt_regs *regs,
136 unsigned long afsr,
137 unsigned long afar);
138 void cheetah_cee_handler(struct pt_regs *regs,
139 unsigned long afsr,
140 unsigned long afar);
141 void cheetah_deferred_handler(struct pt_regs *regs,
142 unsigned long afsr,
143 unsigned long afar);
144 void cheetah_plus_parity_error(int type, struct pt_regs *regs);
145
146 void sun4v_insn_access_exception(struct pt_regs *regs,
147 unsigned long addr,
148 unsigned long type_ctx);
149 void sun4v_insn_access_exception_tl1(struct pt_regs *regs,
150 unsigned long addr,
151 unsigned long type_ctx);
152 void sun4v_data_access_exception(struct pt_regs *regs,
153 unsigned long addr,
154 unsigned long type_ctx);
155 void sun4v_data_access_exception_tl1(struct pt_regs *regs,
156 unsigned long addr,
157 unsigned long type_ctx);
158 void sun4v_resum_error(struct pt_regs *regs,
159 unsigned long offset);
160 void sun4v_resum_overflow(struct pt_regs *regs);
161 void sun4v_nonresum_error(struct pt_regs *regs,
162 unsigned long offset);
163 void sun4v_nonresum_overflow(struct pt_regs *regs);
164
165 extern unsigned long sun4v_err_itlb_vaddr;
166 extern unsigned long sun4v_err_itlb_ctx;
167 extern unsigned long sun4v_err_itlb_pte;
168 extern unsigned long sun4v_err_itlb_error;
169
170 void sun4v_itlb_error_report(struct pt_regs *regs, int tl);
171
172 extern unsigned long sun4v_err_dtlb_vaddr;
173 extern unsigned long sun4v_err_dtlb_ctx;
174 extern unsigned long sun4v_err_dtlb_pte;
175 extern unsigned long sun4v_err_dtlb_error;
176
177 void sun4v_dtlb_error_report(struct pt_regs *regs, int tl);
178 void hypervisor_tlbop_error(unsigned long err,
179 unsigned long op);
180 void hypervisor_tlbop_error_xcall(unsigned long err,
181 unsigned long op);
182
183 /* WARNING: The error trap handlers in assembly know the precise
184 * layout of the following structure.
185 *
186 * C-level handlers in traps.c use this information to log the
187 * error and then determine how to recover (if possible).
188 */
189 struct cheetah_err_info {
190 /*0x00*/u64 afsr;
191 /*0x08*/u64 afar;
192
193 /* D-cache state */
194 /*0x10*/u64 dcache_data[4]; /* The actual data */
195 /*0x30*/u64 dcache_index; /* D-cache index */
196 /*0x38*/u64 dcache_tag; /* D-cache tag/valid */
197 /*0x40*/u64 dcache_utag; /* D-cache microtag */
198 /*0x48*/u64 dcache_stag; /* D-cache snooptag */
199
200 /* I-cache state */
201 /*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
202 /*0x90*/u64 icache_index; /* I-cache index */
203 /*0x98*/u64 icache_tag; /* I-cache phys tag */
204 /*0xa0*/u64 icache_utag; /* I-cache microtag */
205 /*0xa8*/u64 icache_stag; /* I-cache snooptag */
206 /*0xb0*/u64 icache_upper; /* I-cache upper-tag */
207 /*0xb8*/u64 icache_lower; /* I-cache lower-tag */
208
209 /* E-cache state */
210 /*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
211 /*0xe0*/u64 ecache_index; /* E-cache index */
212 /*0xe8*/u64 ecache_tag; /* E-cache tag/state */
213
214 /*0xf0*/u64 __pad[32 - 30];
215 };
216 #define CHAFSR_INVALID ((u64)-1L)
217
218 /* This is allocated at boot time based upon the largest hardware
219 * cpu ID in the system. We allocate two entries per cpu, one for
220 * TL==0 logging and one for TL >= 1 logging.
221 */
222 extern struct cheetah_err_info *cheetah_error_log;
223
224 /* UPA nodes send interrupt packet to UltraSparc with first data reg
225 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
226 * delivered. We must translate this into a non-vector IRQ so we can
227 * set the softint on this cpu.
228 *
229 * To make processing these packets efficient and race free we use
230 * an array of irq buckets below. The interrupt vector handler in
231 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
232 *
233 * If you make changes to ino_bucket, please update hand coded assembler
234 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
235 */
236 struct ino_bucket {
237 /*0x00*/unsigned long __irq_chain_pa;
238
239 /* Interrupt number assigned to this INO. */
240 /*0x08*/unsigned int __irq;
241 /*0x0c*/unsigned int __pad;
242 };
243
244 extern struct ino_bucket *ivector_table;
245 extern unsigned long ivector_table_pa;
246
247 void init_irqwork_curcpu(void);
248 void sun4v_register_mondo_queues(int this_cpu);
249
250 #endif /* CONFIG_SPARC32 */
251 #endif /* _ENTRY_H */
This page took 0.036868 seconds and 5 git commands to generate.