arch/sparc/kernel/sun4c_irq.c

   1 /*  sun4c_irq.c
   2  *  arch/sparc/kernel/sun4c_irq.c:
   3  *
   4  *  djhr: Hacked out of irq.c into a CPU dependent version.
   5  *
   6  *  Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   7  *  Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
   8  *  Copyright (C) 1995 Pete A. Zaitcev (zaitcev@yahoo.com)
   9  *  Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk)
  10  */
  11
  12 #include <linux/errno.h>
  13 #include <linux/linkage.h>
  14 #include <linux/kernel_stat.h>
  15 #include <linux/signal.h>
  16 #include <linux/sched.h>
  17 #include <linux/ptrace.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/slab.h>
  20 #include <linux/init.h>
  21 #include <linux/of.h>
  22 #include <linux/of_device.h>
  23 #include "irq.h"
  24
  25 #include <asm/ptrace.h>
  26 #include <asm/processor.h>
  27 #include <asm/system.h>
  28 #include <asm/psr.h>
  29 #include <asm/vaddrs.h>
  30 #include <asm/timer.h>
  31 #include <asm/openprom.h>
  32 #include <asm/oplib.h>
  33 #include <asm/traps.h>
  34 #include <asm/irq.h>
  35 #include <asm/io.h>
  36 #include <asm/idprom.h>
  37 #include <asm/machines.h>
  38
  39 #if 0
  40 static struct resource sun4c_timer_eb = { "sun4c_timer" };
  41 static struct resource sun4c_intr_eb = { "sun4c_intr" };
  42 #endif
  43
  44 /*
  45  * Bit field defines for the interrupt registers on various
  46  * Sparc machines.
  47  */
  48
  49 /* The sun4c interrupt register. */
  50 #define SUN4C_INT_ENABLE  0x01     /* Allow interrupts. */
  51 #define SUN4C_INT_E14     0x80     /* Enable level 14 IRQ. */
  52 #define SUN4C_INT_E10     0x20     /* Enable level 10 IRQ. */
  53 #define SUN4C_INT_E8      0x10     /* Enable level 8 IRQ. */
  54 #define SUN4C_INT_E6      0x08     /* Enable level 6 IRQ. */
  55 #define SUN4C_INT_E4      0x04     /* Enable level 4 IRQ. */
  56 #define SUN4C_INT_E1      0x02     /* Enable level 1 IRQ. */
  57
  58 /* Pointer to the interrupt enable byte
  59  *
  60  * Dave Redman (djhr@tadpole.co.uk)
  61  * What you may not be aware of is that entry.S requires this variable.
  62  *
  63  *  --- linux_trap_nmi_sun4c --
  64  *
  65  * so don't go making it static, like I tried. sigh.
  66  */
  67 unsigned char *interrupt_enable = NULL;
  68
  69 static void sun4c_disable_irq(unsigned int irq_nr)
  70 {
  71         unsigned long flags;
  72         unsigned char current_mask, new_mask;
  73
  74         local_irq_save(flags);
  75         irq_nr &= (NR_IRQS - 1);
  76         current_mask = *interrupt_enable;
  77         switch(irq_nr) {
  78         case 1:
  79                 new_mask = ((current_mask) & (~(SUN4C_INT_E1)));
  80                 break;
  81         case 8:
  82                 new_mask = ((current_mask) & (~(SUN4C_INT_E8)));
  83                 break;
  84         case 10:
  85                 new_mask = ((current_mask) & (~(SUN4C_INT_E10)));
  86                 break;
  87         case 14:
  88                 new_mask = ((current_mask) & (~(SUN4C_INT_E14)));
  89                 break;
  90         default:
  91                 local_irq_restore(flags);
  92                 return;
  93         }
  94         *interrupt_enable = new_mask;
  95         local_irq_restore(flags);
  96 }
  97
  98 static void sun4c_enable_irq(unsigned int irq_nr)
  99 {
 100         unsigned long flags;
 101         unsigned char current_mask, new_mask;
 102
 103         local_irq_save(flags);
 104         irq_nr &= (NR_IRQS - 1);
 105         current_mask = *interrupt_enable;
 106         switch(irq_nr) {
 107         case 1:
 108                 new_mask = ((current_mask) | SUN4C_INT_E1);
 109                 break;
 110         case 8:
 111                 new_mask = ((current_mask) | SUN4C_INT_E8);
 112                 break;
 113         case 10:
 114                 new_mask = ((current_mask) | SUN4C_INT_E10);
 115                 break;
 116         case 14:
 117                 new_mask = ((current_mask) | SUN4C_INT_E14);
 118                 break;
 119         default:
 120                 local_irq_restore(flags);
 121                 return;
 122         }
 123         *interrupt_enable = new_mask;
 124         local_irq_restore(flags);
 125 }
 126
 127 #define TIMER_IRQ       10    /* Also at level 14, but we ignore that one. */
 128 #define PROFILE_IRQ     14    /* Level14 ticker.. used by OBP for polling */
 129
 130 volatile struct sun4c_timer_info *sun4c_timers;
 131
 132 static void sun4c_clear_clock_irq(void)
 133 {
 134         volatile unsigned int clear_intr;
 135
 136         clear_intr = sun4c_timers->timer_limit10;
 137 }
 138
 139 static void sun4c_clear_profile_irq(int cpu)
 140 {
 141         /* Errm.. not sure how to do this.. */
 142 }
 143
 144 static void sun4c_load_profile_irq(int cpu, unsigned int limit)
 145 {
 146         /* Errm.. not sure how to do this.. */
 147 }
 148
 149 static void __init sun4c_init_timers(irq_handler_t counter_fn)
 150 {
 151         int irq;
 152
 153         /* Map the Timer chip, this is implemented in hardware inside
 154          * the cache chip on the sun4c.
 155          */
 156         sun4c_timers = ioremap(SUN_TIMER_PHYSADDR,
 157             sizeof(struct sun4c_timer_info));
 158
 159         /* Have the level 10 timer tick at 100HZ.  We don't touch the
 160          * level 14 timer limit since we are letting the prom handle
 161          * them until we have a real console driver so L1-A works.
 162          */
 163         sun4c_timers->timer_limit10 = (((1000000/HZ) + 1) << 10);
 164         master_l10_counter = &sun4c_timers->cur_count10;
 165         master_l10_limit = &sun4c_timers->timer_limit10;
 166
 167         irq = request_irq(TIMER_IRQ,
 168                           counter_fn,
 169                           (IRQF_DISABLED | SA_STATIC_ALLOC),
 170                           "timer", NULL);
 171         if (irq) {
 172                 prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ);
 173                 prom_halt();
 174         }
 175
 176 #if 0
 177         /* This does not work on 4/330 */
 178         sun4c_enable_irq(10);
 179 #endif
 180         claim_ticker14(NULL, PROFILE_IRQ, 0);
 181 }
 182
 183 #ifdef CONFIG_SMP
 184 static void sun4c_nop(void) {}
 185 #endif
 186
 187 void __init sun4c_init_IRQ(void)
 188 {
 189         struct linux_prom_registers int_regs[2];
 190         int ie_node;
 191         struct resource phyres;
 192
 193         ie_node = prom_searchsiblings (prom_getchild(prom_root_node),
 194                                        "interrupt-enable");
 195         if(ie_node == 0)
 196                 panic("Cannot find /interrupt-enable node");
 197
 198         /* Depending on the "address" property is bad news... */
 199         interrupt_enable = NULL;
 200         if (prom_getproperty(ie_node, "reg", (char *) int_regs,
 201                              sizeof(int_regs)) != -1) {
 202                 memset(&phyres, 0, sizeof(struct resource));
 203                 phyres.flags = int_regs[0].which_io;
 204                 phyres.start = int_regs[0].phys_addr;
 205                 interrupt_enable = (char *) of_ioremap(&phyres, 0,
 206                     int_regs[0].reg_size, "sun4c_intr");
 207         }
 208         if (!interrupt_enable)
 209                 panic("Cannot map interrupt_enable");
 210
 211         BTFIXUPSET_CALL(enable_irq, sun4c_enable_irq, BTFIXUPCALL_NORM);
 212         BTFIXUPSET_CALL(disable_irq, sun4c_disable_irq, BTFIXUPCALL_NORM);
 213         BTFIXUPSET_CALL(enable_pil_irq, sun4c_enable_irq, BTFIXUPCALL_NORM);
 214         BTFIXUPSET_CALL(disable_pil_irq, sun4c_disable_irq, BTFIXUPCALL_NORM);
 215         BTFIXUPSET_CALL(clear_clock_irq, sun4c_clear_clock_irq, BTFIXUPCALL_NORM);
 216         BTFIXUPSET_CALL(clear_profile_irq, sun4c_clear_profile_irq, BTFIXUPCALL_NOP);
 217         BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP);
 218         sparc_init_timers = sun4c_init_timers;
 219 #ifdef CONFIG_SMP
 220         BTFIXUPSET_CALL(set_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);
 221         BTFIXUPSET_CALL(clear_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);
 222         BTFIXUPSET_CALL(set_irq_udt, sun4c_nop, BTFIXUPCALL_NOP);
 223 #endif
 224         *interrupt_enable = (SUN4C_INT_ENABLE);
 225         /* Cannot enable interrupts until OBP ticker is disabled. */
 226 }