Merge branch 'linus' into x86/quirks
[deliverable/linux.git] / arch / sparc / kernel / sun4d_smp.c
1 /* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
2 *
3 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
4 *
5 * Based on sun4m's smp.c, which is:
6 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
7 */
8
9 #include <asm/head.h>
10
11 #include <linux/kernel.h>
12 #include <linux/sched.h>
13 #include <linux/threads.h>
14 #include <linux/smp.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel_stat.h>
17 #include <linux/init.h>
18 #include <linux/spinlock.h>
19 #include <linux/mm.h>
20 #include <linux/swap.h>
21 #include <linux/profile.h>
22 #include <linux/delay.h>
23 #include <linux/cpu.h>
24
25 #include <asm/ptrace.h>
26 #include <asm/atomic.h>
27 #include <asm/irq_regs.h>
28
29 #include <asm/irq.h>
30 #include <asm/page.h>
31 #include <asm/pgalloc.h>
32 #include <asm/pgtable.h>
33 #include <asm/oplib.h>
34 #include <asm/sbi.h>
35 #include <asm/tlbflush.h>
36 #include <asm/cacheflush.h>
37 #include <asm/cpudata.h>
38
39 #include "irq.h"
40 #define IRQ_CROSS_CALL 15
41
42 extern ctxd_t *srmmu_ctx_table_phys;
43
44 static volatile int smp_processors_ready = 0;
45 static int smp_highest_cpu;
46 extern volatile unsigned long cpu_callin_map[NR_CPUS];
47 extern cpuinfo_sparc cpu_data[NR_CPUS];
48 extern unsigned char boot_cpu_id;
49 extern volatile int smp_process_available;
50
51 extern cpumask_t smp_commenced_mask;
52
53 extern int __smp4d_processor_id(void);
54
55 /* #define SMP_DEBUG */
56
57 #ifdef SMP_DEBUG
58 #define SMP_PRINTK(x) printk x
59 #else
60 #define SMP_PRINTK(x)
61 #endif
62
63 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
64 {
65 __asm__ __volatile__("swap [%1], %0\n\t" :
66 "=&r" (val), "=&r" (ptr) :
67 "0" (val), "1" (ptr));
68 return val;
69 }
70
71 static void smp_setup_percpu_timer(void);
72 extern void cpu_probe(void);
73 extern void sun4d_distribute_irqs(void);
74
75 static unsigned char cpu_leds[32];
76
77 static inline void show_leds(int cpuid)
78 {
79 cpuid &= 0x1e;
80 __asm__ __volatile__ ("stba %0, [%1] %2" : :
81 "r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]),
82 "r" (ECSR_BASE(cpuid) | BB_LEDS),
83 "i" (ASI_M_CTL));
84 }
85
86 void __cpuinit smp4d_callin(void)
87 {
88 int cpuid = hard_smp4d_processor_id();
89 extern spinlock_t sun4d_imsk_lock;
90 unsigned long flags;
91
92 /* Show we are alive */
93 cpu_leds[cpuid] = 0x6;
94 show_leds(cpuid);
95
96 /* Enable level15 interrupt, disable level14 interrupt for now */
97 cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
98
99 local_flush_cache_all();
100 local_flush_tlb_all();
101
102 notify_cpu_starting(cpuid);
103 /*
104 * Unblock the master CPU _only_ when the scheduler state
105 * of all secondary CPUs will be up-to-date, so after
106 * the SMP initialization the master will be just allowed
107 * to call the scheduler code.
108 */
109 /* Get our local ticker going. */
110 smp_setup_percpu_timer();
111
112 calibrate_delay();
113 smp_store_cpu_info(cpuid);
114 local_flush_cache_all();
115 local_flush_tlb_all();
116
117 /* Allow master to continue. */
118 swap((unsigned long *)&cpu_callin_map[cpuid], 1);
119 local_flush_cache_all();
120 local_flush_tlb_all();
121
122 cpu_probe();
123
124 while((unsigned long)current_set[cpuid] < PAGE_OFFSET)
125 barrier();
126
127 while(current_set[cpuid]->cpu != cpuid)
128 barrier();
129
130 /* Fix idle thread fields. */
131 __asm__ __volatile__("ld [%0], %%g6\n\t"
132 : : "r" (&current_set[cpuid])
133 : "memory" /* paranoid */);
134
135 cpu_leds[cpuid] = 0x9;
136 show_leds(cpuid);
137
138 /* Attach to the address space of init_task. */
139 atomic_inc(&init_mm.mm_count);
140 current->active_mm = &init_mm;
141
142 local_flush_cache_all();
143 local_flush_tlb_all();
144
145 local_irq_enable(); /* We don't allow PIL 14 yet */
146
147 while (!cpu_isset(cpuid, smp_commenced_mask))
148 barrier();
149
150 spin_lock_irqsave(&sun4d_imsk_lock, flags);
151 cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
152 spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
153 cpu_set(cpuid, cpu_online_map);
154
155 }
156
157 extern void init_IRQ(void);
158 extern void cpu_panic(void);
159
160 /*
161 * Cycle through the processors asking the PROM to start each one.
162 */
163
164 extern struct linux_prom_registers smp_penguin_ctable;
165 extern unsigned long trapbase_cpu1[];
166 extern unsigned long trapbase_cpu2[];
167 extern unsigned long trapbase_cpu3[];
168
169 void __init smp4d_boot_cpus(void)
170 {
171 if (boot_cpu_id)
172 current_set[0] = NULL;
173 smp_setup_percpu_timer();
174 local_flush_cache_all();
175 }
176
177 int __cpuinit smp4d_boot_one_cpu(int i)
178 {
179 extern unsigned long sun4d_cpu_startup;
180 unsigned long *entry = &sun4d_cpu_startup;
181 struct task_struct *p;
182 int timeout;
183 int cpu_node;
184
185 cpu_find_by_instance(i, &cpu_node,NULL);
186 /* Cook up an idler for this guy. */
187 p = fork_idle(i);
188 current_set[i] = task_thread_info(p);
189
190 /*
191 * Initialize the contexts table
192 * Since the call to prom_startcpu() trashes the structure,
193 * we need to re-initialize it for each cpu
194 */
195 smp_penguin_ctable.which_io = 0;
196 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
197 smp_penguin_ctable.reg_size = 0;
198
199 /* whirrr, whirrr, whirrrrrrrrr... */
200 SMP_PRINTK(("Starting CPU %d at %p \n", i, entry));
201 local_flush_cache_all();
202 prom_startcpu(cpu_node,
203 &smp_penguin_ctable, 0, (char *)entry);
204
205 SMP_PRINTK(("prom_startcpu returned :)\n"));
206
207 /* wheee... it's going... */
208 for(timeout = 0; timeout < 10000; timeout++) {
209 if(cpu_callin_map[i])
210 break;
211 udelay(200);
212 }
213
214 if (!(cpu_callin_map[i])) {
215 printk("Processor %d is stuck.\n", i);
216 return -ENODEV;
217
218 }
219 local_flush_cache_all();
220 return 0;
221 }
222
223 void __init smp4d_smp_done(void)
224 {
225 int i, first;
226 int *prev;
227
228 /* setup cpu list for irq rotation */
229 first = 0;
230 prev = &first;
231 for (i = 0; i < NR_CPUS; i++)
232 if (cpu_online(i)) {
233 *prev = i;
234 prev = &cpu_data(i).next;
235 }
236 *prev = first;
237 local_flush_cache_all();
238
239 /* Free unneeded trap tables */
240 ClearPageReserved(virt_to_page(trapbase_cpu1));
241 init_page_count(virt_to_page(trapbase_cpu1));
242 free_page((unsigned long)trapbase_cpu1);
243 totalram_pages++;
244 num_physpages++;
245
246 ClearPageReserved(virt_to_page(trapbase_cpu2));
247 init_page_count(virt_to_page(trapbase_cpu2));
248 free_page((unsigned long)trapbase_cpu2);
249 totalram_pages++;
250 num_physpages++;
251
252 ClearPageReserved(virt_to_page(trapbase_cpu3));
253 init_page_count(virt_to_page(trapbase_cpu3));
254 free_page((unsigned long)trapbase_cpu3);
255 totalram_pages++;
256 num_physpages++;
257
258 /* Ok, they are spinning and ready to go. */
259 smp_processors_ready = 1;
260 sun4d_distribute_irqs();
261 }
262
263 static struct smp_funcall {
264 smpfunc_t func;
265 unsigned long arg1;
266 unsigned long arg2;
267 unsigned long arg3;
268 unsigned long arg4;
269 unsigned long arg5;
270 unsigned char processors_in[NR_CPUS]; /* Set when ipi entered. */
271 unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
272 } ccall_info __attribute__((aligned(8)));
273
274 static DEFINE_SPINLOCK(cross_call_lock);
275
276 /* Cross calls must be serialized, at least currently. */
277 static void smp4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
278 unsigned long arg2, unsigned long arg3,
279 unsigned long arg4)
280 {
281 if(smp_processors_ready) {
282 register int high = smp_highest_cpu;
283 unsigned long flags;
284
285 spin_lock_irqsave(&cross_call_lock, flags);
286
287 {
288 /* If you make changes here, make sure gcc generates proper code... */
289 register smpfunc_t f asm("i0") = func;
290 register unsigned long a1 asm("i1") = arg1;
291 register unsigned long a2 asm("i2") = arg2;
292 register unsigned long a3 asm("i3") = arg3;
293 register unsigned long a4 asm("i4") = arg4;
294 register unsigned long a5 asm("i5") = 0;
295
296 __asm__ __volatile__(
297 "std %0, [%6]\n\t"
298 "std %2, [%6 + 8]\n\t"
299 "std %4, [%6 + 16]\n\t" : :
300 "r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
301 "r" (&ccall_info.func));
302 }
303
304 /* Init receive/complete mapping, plus fire the IPI's off. */
305 {
306 register int i;
307
308 cpu_clear(smp_processor_id(), mask);
309 cpus_and(mask, cpu_online_map, mask);
310 for(i = 0; i <= high; i++) {
311 if (cpu_isset(i, mask)) {
312 ccall_info.processors_in[i] = 0;
313 ccall_info.processors_out[i] = 0;
314 sun4d_send_ipi(i, IRQ_CROSS_CALL);
315 }
316 }
317 }
318
319 {
320 register int i;
321
322 i = 0;
323 do {
324 if (!cpu_isset(i, mask))
325 continue;
326 while(!ccall_info.processors_in[i])
327 barrier();
328 } while(++i <= high);
329
330 i = 0;
331 do {
332 if (!cpu_isset(i, mask))
333 continue;
334 while(!ccall_info.processors_out[i])
335 barrier();
336 } while(++i <= high);
337 }
338
339 spin_unlock_irqrestore(&cross_call_lock, flags);
340 }
341 }
342
343 /* Running cross calls. */
344 void smp4d_cross_call_irq(void)
345 {
346 int i = hard_smp4d_processor_id();
347
348 ccall_info.processors_in[i] = 1;
349 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
350 ccall_info.arg4, ccall_info.arg5);
351 ccall_info.processors_out[i] = 1;
352 }
353
354 void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
355 {
356 struct pt_regs *old_regs;
357 int cpu = hard_smp4d_processor_id();
358 static int cpu_tick[NR_CPUS];
359 static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
360
361 old_regs = set_irq_regs(regs);
362 bw_get_prof_limit(cpu);
363 bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
364
365 cpu_tick[cpu]++;
366 if (!(cpu_tick[cpu] & 15)) {
367 if (cpu_tick[cpu] == 0x60)
368 cpu_tick[cpu] = 0;
369 cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
370 show_leds(cpu);
371 }
372
373 profile_tick(CPU_PROFILING);
374
375 if(!--prof_counter(cpu)) {
376 int user = user_mode(regs);
377
378 irq_enter();
379 update_process_times(user);
380 irq_exit();
381
382 prof_counter(cpu) = prof_multiplier(cpu);
383 }
384 set_irq_regs(old_regs);
385 }
386
387 extern unsigned int lvl14_resolution;
388
389 static void __cpuinit smp_setup_percpu_timer(void)
390 {
391 int cpu = hard_smp4d_processor_id();
392
393 prof_counter(cpu) = prof_multiplier(cpu) = 1;
394 load_profile_irq(cpu, lvl14_resolution);
395 }
396
397 void __init smp4d_blackbox_id(unsigned *addr)
398 {
399 int rd = *addr & 0x3e000000;
400
401 addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
402 addr[1] = 0x01000000; /* nop */
403 addr[2] = 0x01000000; /* nop */
404 }
405
406 void __init smp4d_blackbox_current(unsigned *addr)
407 {
408 int rd = *addr & 0x3e000000;
409
410 addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
411 addr[2] = 0x81282002 | rd | (rd >> 11); /* sll reg, 2, reg */
412 addr[4] = 0x01000000; /* nop */
413 }
414
415 void __init sun4d_init_smp(void)
416 {
417 int i;
418 extern unsigned int t_nmi[], linux_trap_ipi15_sun4d[], linux_trap_ipi15_sun4m[];
419
420 /* Patch ipi15 trap table */
421 t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
422
423 /* And set btfixup... */
424 BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
425 BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
426 BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
427 BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
428
429 for (i = 0; i < NR_CPUS; i++) {
430 ccall_info.processors_in[i] = 1;
431 ccall_info.processors_out[i] = 1;
432 }
433 }
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