arch/sparc/kernel/sun4m_smp.c

   1 /*
   2  *  sun4m SMP support.
   3  *
   4  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6
   7 #include <linux/clockchips.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/profile.h>
  10 #include <linux/delay.h>
  11 #include <linux/sched.h>
  12 #include <linux/cpu.h>
  13
  14 #include <asm/cacheflush.h>
  15 #include <asm/switch_to.h>
  16 #include <asm/tlbflush.h>
  17 #include <asm/timer.h>
  18 #include <asm/oplib.h>
  19
  20 #include "irq.h"
  21 #include "kernel.h"
  22
  23 #define IRQ_IPI_SINGLE          12
  24 #define IRQ_IPI_MASK            13
  25 #define IRQ_IPI_RESCHED         14
  26 #define IRQ_CROSS_CALL          15
  27
  28 static inline unsigned long
  29 swap_ulong(volatile unsigned long *ptr, unsigned long val)
  30 {
  31         __asm__ __volatile__("swap [%1], %0\n\t" :
  32                              "=&r" (val), "=&r" (ptr) :
  33                              "0" (val), "1" (ptr));
  34         return val;
  35 }
  36
  37 void __cpuinit smp4m_callin(void)
  38 {
  39         int cpuid = hard_smp_processor_id();
  40
  41         local_ops->cache_all();
  42         local_ops->tlb_all();
  43
  44         notify_cpu_starting(cpuid);
  45
  46         register_percpu_ce(cpuid);
  47
  48         calibrate_delay();
  49         smp_store_cpu_info(cpuid);
  50
  51         local_ops->cache_all();
  52         local_ops->tlb_all();
  53
  54         /*
  55          * Unblock the master CPU _only_ when the scheduler state
  56          * of all secondary CPUs will be up-to-date, so after
  57          * the SMP initialization the master will be just allowed
  58          * to call the scheduler code.
  59          */
  60         /* Allow master to continue. */
  61         swap_ulong(&cpu_callin_map[cpuid], 1);
  62
  63         /* XXX: What's up with all the flushes? */
  64         local_ops->cache_all();
  65         local_ops->tlb_all();
  66
  67         /* Fix idle thread fields. */
  68         __asm__ __volatile__("ld [%0], %%g6\n\t"
  69                              : : "r" (&current_set[cpuid])
  70                              : "memory" /* paranoid */);
  71
  72         /* Attach to the address space of init_task. */
  73         atomic_inc(&init_mm.mm_count);
  74         current->active_mm = &init_mm;
  75
  76         while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
  77                 mb();
  78
  79         local_irq_enable();
  80
  81         set_cpu_online(cpuid, true);
  82 }
  83
  84 /*
  85  *      Cycle through the processors asking the PROM to start each one.
  86  */
  87 void __init smp4m_boot_cpus(void)
  88 {
  89         sun4m_unmask_profile_irq();
  90         local_ops->cache_all();
  91 }
  92
  93 int __cpuinit smp4m_boot_one_cpu(int i)
  94 {
  95         unsigned long *entry = &sun4m_cpu_startup;
  96         struct task_struct *p;
  97         int timeout;
  98         int cpu_node;
  99
 100         cpu_find_by_mid(i, &cpu_node);
 101
 102         /* Cook up an idler for this guy. */
 103         p = fork_idle(i);
 104         current_set[i] = task_thread_info(p);
 105         /* See trampoline.S for details... */
 106         entry += ((i - 1) * 3);
 107
 108         /*
 109          * Initialize the contexts table
 110          * Since the call to prom_startcpu() trashes the structure,
 111          * we need to re-initialize it for each cpu
 112          */
 113         smp_penguin_ctable.which_io = 0;
 114         smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
 115         smp_penguin_ctable.reg_size = 0;
 116
 117         /* whirrr, whirrr, whirrrrrrrrr... */
 118         printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);
 119         local_ops->cache_all();
 120         prom_startcpu(cpu_node, &smp_penguin_ctable, 0, (char *)entry);
 121
 122         /* wheee... it's going... */
 123         for (timeout = 0; timeout < 10000; timeout++) {
 124                 if (cpu_callin_map[i])
 125                         break;
 126                 udelay(200);
 127         }
 128
 129         if (!(cpu_callin_map[i])) {
 130                 printk(KERN_ERR "Processor %d is stuck.\n", i);
 131                 return -ENODEV;
 132         }
 133
 134         local_ops->cache_all();
 135         return 0;
 136 }
 137
 138 void __init smp4m_smp_done(void)
 139 {
 140         int i, first;
 141         int *prev;
 142
 143         /* setup cpu list for irq rotation */
 144         first = 0;
 145         prev = &first;
 146         for_each_online_cpu(i) {
 147                 *prev = i;
 148                 prev = &cpu_data(i).next;
 149         }
 150         *prev = first;
 151         local_ops->cache_all();
 152
 153         /* Ok, they are spinning and ready to go. */
 154 }
 155
 156 static void sun4m_send_ipi(int cpu, int level)
 157 {
 158         sbus_writel(SUN4M_SOFT_INT(level), &sun4m_irq_percpu[cpu]->set);
 159 }
 160
 161 static void sun4m_ipi_resched(int cpu)
 162 {
 163         sun4m_send_ipi(cpu, IRQ_IPI_RESCHED);
 164 }
 165
 166 static void sun4m_ipi_single(int cpu)
 167 {
 168         sun4m_send_ipi(cpu, IRQ_IPI_SINGLE);
 169 }
 170
 171 static void sun4m_ipi_mask_one(int cpu)
 172 {
 173         sun4m_send_ipi(cpu, IRQ_IPI_MASK);
 174 }
 175
 176 static struct smp_funcall {
 177         smpfunc_t func;
 178         unsigned long arg1;
 179         unsigned long arg2;
 180         unsigned long arg3;
 181         unsigned long arg4;
 182         unsigned long arg5;
 183         unsigned long processors_in[SUN4M_NCPUS];  /* Set when ipi entered. */
 184         unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */
 185 } ccall_info;
 186
 187 static DEFINE_SPINLOCK(cross_call_lock);
 188
 189 /* Cross calls must be serialized, at least currently. */
 190 static void sun4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
 191                              unsigned long arg2, unsigned long arg3,
 192                              unsigned long arg4)
 193 {
 194                 register int ncpus = SUN4M_NCPUS;
 195                 unsigned long flags;
 196
 197                 spin_lock_irqsave(&cross_call_lock, flags);
 198
 199                 /* Init function glue. */
 200                 ccall_info.func = func;
 201                 ccall_info.arg1 = arg1;
 202                 ccall_info.arg2 = arg2;
 203                 ccall_info.arg3 = arg3;
 204                 ccall_info.arg4 = arg4;
 205                 ccall_info.arg5 = 0;
 206
 207                 /* Init receive/complete mapping, plus fire the IPI's off. */
 208                 {
 209                         register int i;
 210
 211                         cpumask_clear_cpu(smp_processor_id(), &mask);
 212                         cpumask_and(&mask, cpu_online_mask, &mask);
 213                         for (i = 0; i < ncpus; i++) {
 214                                 if (cpumask_test_cpu(i, &mask)) {
 215                                         ccall_info.processors_in[i] = 0;
 216                                         ccall_info.processors_out[i] = 0;
 217                                         sun4m_send_ipi(i, IRQ_CROSS_CALL);
 218                                 } else {
 219                                         ccall_info.processors_in[i] = 1;
 220                                         ccall_info.processors_out[i] = 1;
 221                                 }
 222                         }
 223                 }
 224
 225                 {
 226                         register int i;
 227
 228                         i = 0;
 229                         do {
 230                                 if (!cpumask_test_cpu(i, &mask))
 231                                         continue;
 232                                 while (!ccall_info.processors_in[i])
 233                                         barrier();
 234                         } while (++i < ncpus);
 235
 236                         i = 0;
 237                         do {
 238                                 if (!cpumask_test_cpu(i, &mask))
 239                                         continue;
 240                                 while (!ccall_info.processors_out[i])
 241                                         barrier();
 242                         } while (++i < ncpus);
 243                 }
 244                 spin_unlock_irqrestore(&cross_call_lock, flags);
 245 }
 246
 247 /* Running cross calls. */
 248 void smp4m_cross_call_irq(void)
 249 {
 250         int i = smp_processor_id();
 251
 252         ccall_info.processors_in[i] = 1;
 253         ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
 254                         ccall_info.arg4, ccall_info.arg5);
 255         ccall_info.processors_out[i] = 1;
 256 }
 257
 258 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
 259 {
 260         struct pt_regs *old_regs;
 261         struct clock_event_device *ce;
 262         int cpu = smp_processor_id();
 263
 264         old_regs = set_irq_regs(regs);
 265
 266         ce = &per_cpu(sparc32_clockevent, cpu);
 267
 268         if (ce->mode & CLOCK_EVT_MODE_PERIODIC)
 269                 sun4m_clear_profile_irq(cpu);
 270         else
 271                 sparc_config.load_profile_irq(cpu, 0); /* Is this needless? */
 272
 273         irq_enter();
 274         ce->event_handler(ce);
 275         irq_exit();
 276
 277         set_irq_regs(old_regs);
 278 }
 279
 280 static const struct sparc32_ipi_ops sun4m_ipi_ops = {
 281         .cross_call = sun4m_cross_call,
 282         .resched    = sun4m_ipi_resched,
 283         .single     = sun4m_ipi_single,
 284         .mask_one   = sun4m_ipi_mask_one,
 285 };
 286
 287 void __init sun4m_init_smp(void)
 288 {
 289         sparc32_ipi_ops = &sun4m_ipi_ops;
 290 }