Merge git://git.infradead.org/iommu-2.6
[deliverable/linux.git] / arch / sparc / kernel / sun4m_smp.c
1 /* sun4m_smp.c: Sparc SUN4M SMP support.
2 *
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4 */
5
6 #include <asm/head.h>
7
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/threads.h>
11 #include <linux/smp.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel_stat.h>
14 #include <linux/init.h>
15 #include <linux/spinlock.h>
16 #include <linux/mm.h>
17 #include <linux/swap.h>
18 #include <linux/profile.h>
19 #include <linux/delay.h>
20 #include <linux/cpu.h>
21
22 #include <asm/cacheflush.h>
23 #include <asm/tlbflush.h>
24 #include <asm/irq_regs.h>
25
26 #include <asm/ptrace.h>
27 #include <asm/atomic.h>
28
29 #include <asm/irq.h>
30 #include <asm/page.h>
31 #include <asm/pgalloc.h>
32 #include <asm/pgtable.h>
33 #include <asm/oplib.h>
34 #include <asm/cpudata.h>
35
36 #include "irq.h"
37
38 #define IRQ_CROSS_CALL 15
39
40 extern ctxd_t *srmmu_ctx_table_phys;
41
42 extern volatile unsigned long cpu_callin_map[NR_CPUS];
43 extern unsigned char boot_cpu_id;
44
45 extern cpumask_t smp_commenced_mask;
46
47 extern int __smp4m_processor_id(void);
48
49 /*#define SMP_DEBUG*/
50
51 #ifdef SMP_DEBUG
52 #define SMP_PRINTK(x) printk x
53 #else
54 #define SMP_PRINTK(x)
55 #endif
56
57 static inline unsigned long
58 swap_ulong(volatile unsigned long *ptr, unsigned long val)
59 {
60 __asm__ __volatile__("swap [%1], %0\n\t" :
61 "=&r" (val), "=&r" (ptr) :
62 "0" (val), "1" (ptr));
63 return val;
64 }
65
66 static void smp_setup_percpu_timer(void);
67 extern void cpu_probe(void);
68
69 void __cpuinit smp4m_callin(void)
70 {
71 int cpuid = hard_smp_processor_id();
72
73 local_flush_cache_all();
74 local_flush_tlb_all();
75
76 notify_cpu_starting(cpuid);
77
78 /* Get our local ticker going. */
79 smp_setup_percpu_timer();
80
81 calibrate_delay();
82 smp_store_cpu_info(cpuid);
83
84 local_flush_cache_all();
85 local_flush_tlb_all();
86
87 /*
88 * Unblock the master CPU _only_ when the scheduler state
89 * of all secondary CPUs will be up-to-date, so after
90 * the SMP initialization the master will be just allowed
91 * to call the scheduler code.
92 */
93 /* Allow master to continue. */
94 swap_ulong(&cpu_callin_map[cpuid], 1);
95
96 /* XXX: What's up with all the flushes? */
97 local_flush_cache_all();
98 local_flush_tlb_all();
99
100 cpu_probe();
101
102 /* Fix idle thread fields. */
103 __asm__ __volatile__("ld [%0], %%g6\n\t"
104 : : "r" (&current_set[cpuid])
105 : "memory" /* paranoid */);
106
107 /* Attach to the address space of init_task. */
108 atomic_inc(&init_mm.mm_count);
109 current->active_mm = &init_mm;
110
111 while (!cpu_isset(cpuid, smp_commenced_mask))
112 mb();
113
114 local_irq_enable();
115
116 set_cpu_online(cpuid, true);
117 }
118
119 /*
120 * Cycle through the processors asking the PROM to start each one.
121 */
122
123 extern struct linux_prom_registers smp_penguin_ctable;
124
125 void __init smp4m_boot_cpus(void)
126 {
127 smp_setup_percpu_timer();
128 local_flush_cache_all();
129 }
130
131 int __cpuinit smp4m_boot_one_cpu(int i)
132 {
133 extern unsigned long sun4m_cpu_startup;
134 unsigned long *entry = &sun4m_cpu_startup;
135 struct task_struct *p;
136 int timeout;
137 int cpu_node;
138
139 cpu_find_by_mid(i, &cpu_node);
140
141 /* Cook up an idler for this guy. */
142 p = fork_idle(i);
143 current_set[i] = task_thread_info(p);
144 /* See trampoline.S for details... */
145 entry += ((i-1) * 3);
146
147 /*
148 * Initialize the contexts table
149 * Since the call to prom_startcpu() trashes the structure,
150 * we need to re-initialize it for each cpu
151 */
152 smp_penguin_ctable.which_io = 0;
153 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
154 smp_penguin_ctable.reg_size = 0;
155
156 /* whirrr, whirrr, whirrrrrrrrr... */
157 printk("Starting CPU %d at %p\n", i, entry);
158 local_flush_cache_all();
159 prom_startcpu(cpu_node,
160 &smp_penguin_ctable, 0, (char *)entry);
161
162 /* wheee... it's going... */
163 for(timeout = 0; timeout < 10000; timeout++) {
164 if(cpu_callin_map[i])
165 break;
166 udelay(200);
167 }
168
169 if (!(cpu_callin_map[i])) {
170 printk("Processor %d is stuck.\n", i);
171 return -ENODEV;
172 }
173
174 local_flush_cache_all();
175 return 0;
176 }
177
178 void __init smp4m_smp_done(void)
179 {
180 int i, first;
181 int *prev;
182
183 /* setup cpu list for irq rotation */
184 first = 0;
185 prev = &first;
186 for_each_online_cpu(i) {
187 *prev = i;
188 prev = &cpu_data(i).next;
189 }
190 *prev = first;
191 local_flush_cache_all();
192
193 /* Ok, they are spinning and ready to go. */
194 }
195
196 /* At each hardware IRQ, we get this called to forward IRQ reception
197 * to the next processor. The caller must disable the IRQ level being
198 * serviced globally so that there are no double interrupts received.
199 *
200 * XXX See sparc64 irq.c.
201 */
202 void smp4m_irq_rotate(int cpu)
203 {
204 int next = cpu_data(cpu).next;
205 if (next != cpu)
206 set_irq_udt(next);
207 }
208
209 static struct smp_funcall {
210 smpfunc_t func;
211 unsigned long arg1;
212 unsigned long arg2;
213 unsigned long arg3;
214 unsigned long arg4;
215 unsigned long arg5;
216 unsigned long processors_in[SUN4M_NCPUS]; /* Set when ipi entered. */
217 unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */
218 } ccall_info;
219
220 static DEFINE_SPINLOCK(cross_call_lock);
221
222 /* Cross calls must be serialized, at least currently. */
223 static void smp4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
224 unsigned long arg2, unsigned long arg3,
225 unsigned long arg4)
226 {
227 register int ncpus = SUN4M_NCPUS;
228 unsigned long flags;
229
230 spin_lock_irqsave(&cross_call_lock, flags);
231
232 /* Init function glue. */
233 ccall_info.func = func;
234 ccall_info.arg1 = arg1;
235 ccall_info.arg2 = arg2;
236 ccall_info.arg3 = arg3;
237 ccall_info.arg4 = arg4;
238 ccall_info.arg5 = 0;
239
240 /* Init receive/complete mapping, plus fire the IPI's off. */
241 {
242 register int i;
243
244 cpu_clear(smp_processor_id(), mask);
245 cpus_and(mask, cpu_online_map, mask);
246 for(i = 0; i < ncpus; i++) {
247 if (cpu_isset(i, mask)) {
248 ccall_info.processors_in[i] = 0;
249 ccall_info.processors_out[i] = 0;
250 set_cpu_int(i, IRQ_CROSS_CALL);
251 } else {
252 ccall_info.processors_in[i] = 1;
253 ccall_info.processors_out[i] = 1;
254 }
255 }
256 }
257
258 {
259 register int i;
260
261 i = 0;
262 do {
263 if (!cpu_isset(i, mask))
264 continue;
265 while(!ccall_info.processors_in[i])
266 barrier();
267 } while(++i < ncpus);
268
269 i = 0;
270 do {
271 if (!cpu_isset(i, mask))
272 continue;
273 while(!ccall_info.processors_out[i])
274 barrier();
275 } while(++i < ncpus);
276 }
277
278 spin_unlock_irqrestore(&cross_call_lock, flags);
279 }
280
281 /* Running cross calls. */
282 void smp4m_cross_call_irq(void)
283 {
284 int i = smp_processor_id();
285
286 ccall_info.processors_in[i] = 1;
287 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
288 ccall_info.arg4, ccall_info.arg5);
289 ccall_info.processors_out[i] = 1;
290 }
291
292 extern void sun4m_clear_profile_irq(int cpu);
293
294 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
295 {
296 struct pt_regs *old_regs;
297 int cpu = smp_processor_id();
298
299 old_regs = set_irq_regs(regs);
300
301 sun4m_clear_profile_irq(cpu);
302
303 profile_tick(CPU_PROFILING);
304
305 if(!--prof_counter(cpu)) {
306 int user = user_mode(regs);
307
308 irq_enter();
309 update_process_times(user);
310 irq_exit();
311
312 prof_counter(cpu) = prof_multiplier(cpu);
313 }
314 set_irq_regs(old_regs);
315 }
316
317 extern unsigned int lvl14_resolution;
318
319 static void __cpuinit smp_setup_percpu_timer(void)
320 {
321 int cpu = smp_processor_id();
322
323 prof_counter(cpu) = prof_multiplier(cpu) = 1;
324 load_profile_irq(cpu, lvl14_resolution);
325
326 if(cpu == boot_cpu_id)
327 enable_pil_irq(14);
328 }
329
330 static void __init smp4m_blackbox_id(unsigned *addr)
331 {
332 int rd = *addr & 0x3e000000;
333 int rs1 = rd >> 11;
334
335 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
336 addr[1] = 0x8130200c | rd | rs1; /* srl reg, 0xc, reg */
337 addr[2] = 0x80082003 | rd | rs1; /* and reg, 3, reg */
338 }
339
340 static void __init smp4m_blackbox_current(unsigned *addr)
341 {
342 int rd = *addr & 0x3e000000;
343 int rs1 = rd >> 11;
344
345 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
346 addr[2] = 0x8130200a | rd | rs1; /* srl reg, 0xa, reg */
347 addr[4] = 0x8008200c | rd | rs1; /* and reg, 0xc, reg */
348 }
349
350 void __init sun4m_init_smp(void)
351 {
352 BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
353 BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
354 BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
355 BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
356 }
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