/spare/repo/netdev-2.6 branch 'master'
[deliverable/linux.git] / arch / sparc / kernel / time.c
1 /* $Id: time.c,v 1.60 2002/01/23 14:33:55 davem Exp $
2 * linux/arch/sparc/kernel/time.c
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
6 *
7 * Chris Davis (cdavis@cois.on.ca) 03/27/1998
8 * Added support for the intersil on the sun4/4200
9 *
10 * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
11 * Support for MicroSPARC-IIep, PCI CPU.
12 *
13 * This file handles the Sparc specific time handling details.
14 *
15 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
16 * "A Kernel Model for Precision Timekeeping" by Dave Mills
17 */
18 #include <linux/config.h>
19 #include <linux/errno.h>
20 #include <linux/module.h>
21 #include <linux/sched.h>
22 #include <linux/kernel.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/mm.h>
26 #include <linux/interrupt.h>
27 #include <linux/time.h>
28 #include <linux/timex.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/ioport.h>
32 #include <linux/profile.h>
33
34 #include <asm/oplib.h>
35 #include <asm/timer.h>
36 #include <asm/mostek.h>
37 #include <asm/system.h>
38 #include <asm/irq.h>
39 #include <asm/io.h>
40 #include <asm/idprom.h>
41 #include <asm/machines.h>
42 #include <asm/sun4paddr.h>
43 #include <asm/page.h>
44 #include <asm/pcic.h>
45
46 extern unsigned long wall_jiffies;
47
48 u64 jiffies_64 = INITIAL_JIFFIES;
49
50 EXPORT_SYMBOL(jiffies_64);
51
52 DEFINE_SPINLOCK(rtc_lock);
53 enum sparc_clock_type sp_clock_typ;
54 DEFINE_SPINLOCK(mostek_lock);
55 void __iomem *mstk48t02_regs = NULL;
56 static struct mostek48t08 *mstk48t08_regs = NULL;
57 static int set_rtc_mmss(unsigned long);
58 static int sbus_do_settimeofday(struct timespec *tv);
59
60 #ifdef CONFIG_SUN4
61 struct intersil *intersil_clock;
62 #define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
63 (intsil_cmd)
64
65 #define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
66 (intsil_cmd)
67
68 #define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
69 ( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
70 INTERSIL_INTR_ENABLE))
71
72 #define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
73 ( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
74 INTERSIL_INTR_ENABLE))
75
76 #define intersil_read_intr(intersil_reg, towhere) towhere = \
77 intersil_reg->int_intr_reg
78
79 #endif
80
81 unsigned long profile_pc(struct pt_regs *regs)
82 {
83 extern char __copy_user_begin[], __copy_user_end[];
84 extern char __atomic_begin[], __atomic_end[];
85 extern char __bzero_begin[], __bzero_end[];
86 extern char __bitops_begin[], __bitops_end[];
87
88 unsigned long pc = regs->pc;
89
90 if (in_lock_functions(pc) ||
91 (pc >= (unsigned long) __copy_user_begin &&
92 pc < (unsigned long) __copy_user_end) ||
93 (pc >= (unsigned long) __atomic_begin &&
94 pc < (unsigned long) __atomic_end) ||
95 (pc >= (unsigned long) __bzero_begin &&
96 pc < (unsigned long) __bzero_end) ||
97 (pc >= (unsigned long) __bitops_begin &&
98 pc < (unsigned long) __bitops_end))
99 pc = regs->u_regs[UREG_RETPC];
100 return pc;
101 }
102
103 __volatile__ unsigned int *master_l10_counter;
104 __volatile__ unsigned int *master_l10_limit;
105
106 /*
107 * timer_interrupt() needs to keep up the real-time clock,
108 * as well as call the "do_timer()" routine every clocktick
109 */
110
111 #define TICK_SIZE (tick_nsec / 1000)
112
113 irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
114 {
115 /* last time the cmos clock got updated */
116 static long last_rtc_update;
117
118 #ifndef CONFIG_SMP
119 profile_tick(CPU_PROFILING, regs);
120 #endif
121
122 /* Protect counter clear so that do_gettimeoffset works */
123 write_seqlock(&xtime_lock);
124 #ifdef CONFIG_SUN4
125 if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
126 (idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
127 int temp;
128 intersil_read_intr(intersil_clock, temp);
129 /* re-enable the irq */
130 enable_pil_irq(10);
131 }
132 #endif
133 clear_clock_irq();
134
135 do_timer(regs);
136 #ifndef CONFIG_SMP
137 update_process_times(user_mode(regs));
138 #endif
139
140
141 /* Determine when to update the Mostek clock. */
142 if ((time_status & STA_UNSYNC) == 0 &&
143 xtime.tv_sec > last_rtc_update + 660 &&
144 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
145 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
146 if (set_rtc_mmss(xtime.tv_sec) == 0)
147 last_rtc_update = xtime.tv_sec;
148 else
149 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
150 }
151 write_sequnlock(&xtime_lock);
152
153 return IRQ_HANDLED;
154 }
155
156 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
157 static void __init kick_start_clock(void)
158 {
159 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
160 unsigned char sec;
161 int i, count;
162
163 prom_printf("CLOCK: Clock was stopped. Kick start ");
164
165 spin_lock_irq(&mostek_lock);
166
167 /* Turn on the kick start bit to start the oscillator. */
168 regs->creg |= MSTK_CREG_WRITE;
169 regs->sec &= ~MSTK_STOP;
170 regs->hour |= MSTK_KICK_START;
171 regs->creg &= ~MSTK_CREG_WRITE;
172
173 spin_unlock_irq(&mostek_lock);
174
175 /* Delay to allow the clock oscillator to start. */
176 sec = MSTK_REG_SEC(regs);
177 for (i = 0; i < 3; i++) {
178 while (sec == MSTK_REG_SEC(regs))
179 for (count = 0; count < 100000; count++)
180 /* nothing */ ;
181 prom_printf(".");
182 sec = regs->sec;
183 }
184 prom_printf("\n");
185
186 spin_lock_irq(&mostek_lock);
187
188 /* Turn off kick start and set a "valid" time and date. */
189 regs->creg |= MSTK_CREG_WRITE;
190 regs->hour &= ~MSTK_KICK_START;
191 MSTK_SET_REG_SEC(regs,0);
192 MSTK_SET_REG_MIN(regs,0);
193 MSTK_SET_REG_HOUR(regs,0);
194 MSTK_SET_REG_DOW(regs,5);
195 MSTK_SET_REG_DOM(regs,1);
196 MSTK_SET_REG_MONTH(regs,8);
197 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
198 regs->creg &= ~MSTK_CREG_WRITE;
199
200 spin_unlock_irq(&mostek_lock);
201
202 /* Ensure the kick start bit is off. If it isn't, turn it off. */
203 while (regs->hour & MSTK_KICK_START) {
204 prom_printf("CLOCK: Kick start still on!\n");
205
206 spin_lock_irq(&mostek_lock);
207 regs->creg |= MSTK_CREG_WRITE;
208 regs->hour &= ~MSTK_KICK_START;
209 regs->creg &= ~MSTK_CREG_WRITE;
210 spin_unlock_irq(&mostek_lock);
211 }
212
213 prom_printf("CLOCK: Kick start procedure successful.\n");
214 }
215
216 /* Return nonzero if the clock chip battery is low. */
217 static __inline__ int has_low_battery(void)
218 {
219 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
220 unsigned char data1, data2;
221
222 spin_lock_irq(&mostek_lock);
223 data1 = regs->eeprom[0]; /* Read some data. */
224 regs->eeprom[0] = ~data1; /* Write back the complement. */
225 data2 = regs->eeprom[0]; /* Read back the complement. */
226 regs->eeprom[0] = data1; /* Restore the original value. */
227 spin_unlock_irq(&mostek_lock);
228
229 return (data1 == data2); /* Was the write blocked? */
230 }
231
232 /* Probe for the real time clock chip on Sun4 */
233 static __inline__ void sun4_clock_probe(void)
234 {
235 #ifdef CONFIG_SUN4
236 int temp;
237 struct resource r;
238
239 memset(&r, 0, sizeof(r));
240 if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
241 sp_clock_typ = MSTK48T02;
242 r.start = sun4_clock_physaddr;
243 mstk48t02_regs = sbus_ioremap(&r, 0,
244 sizeof(struct mostek48t02), NULL);
245 mstk48t08_regs = NULL; /* To catch weirdness */
246 intersil_clock = NULL; /* just in case */
247
248 /* Kick start the clock if it is completely stopped. */
249 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
250 kick_start_clock();
251 } else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
252 /* intersil setup code */
253 printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
254 sp_clock_typ = INTERSIL;
255 r.start = sun4_clock_physaddr;
256 intersil_clock = (struct intersil *)
257 sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
258 mstk48t02_regs = 0; /* just be sure */
259 mstk48t08_regs = NULL; /* ditto */
260 /* initialise the clock */
261
262 intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
263
264 intersil_start(intersil_clock);
265
266 intersil_read_intr(intersil_clock, temp);
267 while (!(temp & 0x80))
268 intersil_read_intr(intersil_clock, temp);
269
270 intersil_read_intr(intersil_clock, temp);
271 while (!(temp & 0x80))
272 intersil_read_intr(intersil_clock, temp);
273
274 intersil_stop(intersil_clock);
275
276 }
277 #endif
278 }
279
280 /* Probe for the mostek real time clock chip. */
281 static __inline__ void clock_probe(void)
282 {
283 struct linux_prom_registers clk_reg[2];
284 char model[128];
285 register int node, cpuunit, bootbus;
286 struct resource r;
287
288 cpuunit = bootbus = 0;
289 memset(&r, 0, sizeof(r));
290
291 /* Determine the correct starting PROM node for the probe. */
292 node = prom_getchild(prom_root_node);
293 switch (sparc_cpu_model) {
294 case sun4c:
295 break;
296 case sun4m:
297 node = prom_getchild(prom_searchsiblings(node, "obio"));
298 break;
299 case sun4d:
300 node = prom_getchild(bootbus = prom_searchsiblings(prom_getchild(cpuunit = prom_searchsiblings(node, "cpu-unit")), "bootbus"));
301 break;
302 default:
303 prom_printf("CLOCK: Unsupported architecture!\n");
304 prom_halt();
305 }
306
307 /* Find the PROM node describing the real time clock. */
308 sp_clock_typ = MSTK_INVALID;
309 node = prom_searchsiblings(node,"eeprom");
310 if (!node) {
311 prom_printf("CLOCK: No clock found!\n");
312 prom_halt();
313 }
314
315 /* Get the model name and setup everything up. */
316 model[0] = '\0';
317 prom_getstring(node, "model", model, sizeof(model));
318 if (strcmp(model, "mk48t02") == 0) {
319 sp_clock_typ = MSTK48T02;
320 if (prom_getproperty(node, "reg", (char *) clk_reg, sizeof(clk_reg)) == -1) {
321 prom_printf("clock_probe: FAILED!\n");
322 prom_halt();
323 }
324 if (sparc_cpu_model == sun4d)
325 prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
326 else
327 prom_apply_obio_ranges(clk_reg, 1);
328 /* Map the clock register io area read-only */
329 r.flags = clk_reg[0].which_io;
330 r.start = clk_reg[0].phys_addr;
331 mstk48t02_regs = sbus_ioremap(&r, 0,
332 sizeof(struct mostek48t02), "mk48t02");
333 mstk48t08_regs = NULL; /* To catch weirdness */
334 } else if (strcmp(model, "mk48t08") == 0) {
335 sp_clock_typ = MSTK48T08;
336 if(prom_getproperty(node, "reg", (char *) clk_reg,
337 sizeof(clk_reg)) == -1) {
338 prom_printf("clock_probe: FAILED!\n");
339 prom_halt();
340 }
341 if (sparc_cpu_model == sun4d)
342 prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
343 else
344 prom_apply_obio_ranges(clk_reg, 1);
345 /* Map the clock register io area read-only */
346 /* XXX r/o attribute is somewhere in r.flags */
347 r.flags = clk_reg[0].which_io;
348 r.start = clk_reg[0].phys_addr;
349 mstk48t08_regs = (struct mostek48t08 *) sbus_ioremap(&r, 0,
350 sizeof(struct mostek48t08), "mk48t08");
351
352 mstk48t02_regs = &mstk48t08_regs->regs;
353 } else {
354 prom_printf("CLOCK: Unknown model name '%s'\n",model);
355 prom_halt();
356 }
357
358 /* Report a low battery voltage condition. */
359 if (has_low_battery())
360 printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
361
362 /* Kick start the clock if it is completely stopped. */
363 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
364 kick_start_clock();
365 }
366
367 void __init sbus_time_init(void)
368 {
369 unsigned int year, mon, day, hour, min, sec;
370 struct mostek48t02 *mregs;
371
372 #ifdef CONFIG_SUN4
373 int temp;
374 struct intersil *iregs;
375 #endif
376
377 BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
378 btfixup();
379
380 if (ARCH_SUN4)
381 sun4_clock_probe();
382 else
383 clock_probe();
384
385 sparc_init_timers(timer_interrupt);
386
387 #ifdef CONFIG_SUN4
388 if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
389 #endif
390 mregs = (struct mostek48t02 *)mstk48t02_regs;
391 if(!mregs) {
392 prom_printf("Something wrong, clock regs not mapped yet.\n");
393 prom_halt();
394 }
395 spin_lock_irq(&mostek_lock);
396 mregs->creg |= MSTK_CREG_READ;
397 sec = MSTK_REG_SEC(mregs);
398 min = MSTK_REG_MIN(mregs);
399 hour = MSTK_REG_HOUR(mregs);
400 day = MSTK_REG_DOM(mregs);
401 mon = MSTK_REG_MONTH(mregs);
402 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
403 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
404 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
405 set_normalized_timespec(&wall_to_monotonic,
406 -xtime.tv_sec, -xtime.tv_nsec);
407 mregs->creg &= ~MSTK_CREG_READ;
408 spin_unlock_irq(&mostek_lock);
409 #ifdef CONFIG_SUN4
410 } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
411 /* initialise the intersil on sun4 */
412
413 iregs=intersil_clock;
414 if(!iregs) {
415 prom_printf("Something wrong, clock regs not mapped yet.\n");
416 prom_halt();
417 }
418
419 intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
420 disable_pil_irq(10);
421 intersil_stop(iregs);
422 intersil_read_intr(intersil_clock, temp);
423
424 temp = iregs->clk.int_csec;
425
426 sec = iregs->clk.int_sec;
427 min = iregs->clk.int_min;
428 hour = iregs->clk.int_hour;
429 day = iregs->clk.int_day;
430 mon = iregs->clk.int_month;
431 year = MSTK_CVT_YEAR(iregs->clk.int_year);
432
433 enable_pil_irq(10);
434 intersil_start(iregs);
435
436 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
437 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
438 set_normalized_timespec(&wall_to_monotonic,
439 -xtime.tv_sec, -xtime.tv_nsec);
440 printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
441 }
442 #endif
443
444 /* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
445 local_irq_enable();
446 }
447
448 void __init time_init(void)
449 {
450 #ifdef CONFIG_PCI
451 extern void pci_time_init(void);
452 if (pcic_present()) {
453 pci_time_init();
454 return;
455 }
456 #endif
457 sbus_time_init();
458 }
459
460 extern __inline__ unsigned long do_gettimeoffset(void)
461 {
462 return (*master_l10_counter >> 10) & 0x1fffff;
463 }
464
465 /*
466 * Returns nanoseconds
467 * XXX This is a suboptimal implementation.
468 */
469 unsigned long long sched_clock(void)
470 {
471 return (unsigned long long)jiffies * (1000000000 / HZ);
472 }
473
474 /* Ok, my cute asm atomicity trick doesn't work anymore.
475 * There are just too many variables that need to be protected
476 * now (both members of xtime, wall_jiffies, et al.)
477 */
478 void do_gettimeofday(struct timeval *tv)
479 {
480 unsigned long flags;
481 unsigned long seq;
482 unsigned long usec, sec;
483 unsigned long max_ntp_tick = tick_usec - tickadj;
484
485 do {
486 unsigned long lost;
487
488 seq = read_seqbegin_irqsave(&xtime_lock, flags);
489 usec = do_gettimeoffset();
490 lost = jiffies - wall_jiffies;
491
492 /*
493 * If time_adjust is negative then NTP is slowing the clock
494 * so make sure not to go into next possible interval.
495 * Better to lose some accuracy than have time go backwards..
496 */
497 if (unlikely(time_adjust < 0)) {
498 usec = min(usec, max_ntp_tick);
499
500 if (lost)
501 usec += lost * max_ntp_tick;
502 }
503 else if (unlikely(lost))
504 usec += lost * tick_usec;
505
506 sec = xtime.tv_sec;
507 usec += (xtime.tv_nsec / 1000);
508 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
509
510 while (usec >= 1000000) {
511 usec -= 1000000;
512 sec++;
513 }
514
515 tv->tv_sec = sec;
516 tv->tv_usec = usec;
517 }
518
519 EXPORT_SYMBOL(do_gettimeofday);
520
521 int do_settimeofday(struct timespec *tv)
522 {
523 int ret;
524
525 write_seqlock_irq(&xtime_lock);
526 ret = bus_do_settimeofday(tv);
527 write_sequnlock_irq(&xtime_lock);
528 clock_was_set();
529 return ret;
530 }
531
532 EXPORT_SYMBOL(do_settimeofday);
533
534 static int sbus_do_settimeofday(struct timespec *tv)
535 {
536 time_t wtm_sec, sec = tv->tv_sec;
537 long wtm_nsec, nsec = tv->tv_nsec;
538
539 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
540 return -EINVAL;
541
542 /*
543 * This is revolting. We need to set "xtime" correctly. However, the
544 * value in this location is the value at the most recent update of
545 * wall time. Discover what correction gettimeofday() would have
546 * made, and then undo it!
547 */
548 nsec -= 1000 * (do_gettimeoffset() +
549 (jiffies - wall_jiffies) * (USEC_PER_SEC / HZ));
550
551 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
552 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
553
554 set_normalized_timespec(&xtime, sec, nsec);
555 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
556
557 time_adjust = 0; /* stop active adjtime() */
558 time_status |= STA_UNSYNC;
559 time_maxerror = NTP_PHASE_LIMIT;
560 time_esterror = NTP_PHASE_LIMIT;
561 return 0;
562 }
563
564 /*
565 * BUG: This routine does not handle hour overflow properly; it just
566 * sets the minutes. Usually you won't notice until after reboot!
567 */
568 static int set_rtc_mmss(unsigned long nowtime)
569 {
570 int real_seconds, real_minutes, mostek_minutes;
571 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
572 unsigned long flags;
573 #ifdef CONFIG_SUN4
574 struct intersil *iregs = intersil_clock;
575 int temp;
576 #endif
577
578 /* Not having a register set can lead to trouble. */
579 if (!regs) {
580 #ifdef CONFIG_SUN4
581 if(!iregs)
582 return -1;
583 else {
584 temp = iregs->clk.int_csec;
585
586 mostek_minutes = iregs->clk.int_min;
587
588 real_seconds = nowtime % 60;
589 real_minutes = nowtime / 60;
590 if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
591 real_minutes += 30; /* correct for half hour time zone */
592 real_minutes %= 60;
593
594 if (abs(real_minutes - mostek_minutes) < 30) {
595 intersil_stop(iregs);
596 iregs->clk.int_sec=real_seconds;
597 iregs->clk.int_min=real_minutes;
598 intersil_start(iregs);
599 } else {
600 printk(KERN_WARNING
601 "set_rtc_mmss: can't update from %d to %d\n",
602 mostek_minutes, real_minutes);
603 return -1;
604 }
605
606 return 0;
607 }
608 #endif
609 }
610
611 spin_lock_irqsave(&mostek_lock, flags);
612 /* Read the current RTC minutes. */
613 regs->creg |= MSTK_CREG_READ;
614 mostek_minutes = MSTK_REG_MIN(regs);
615 regs->creg &= ~MSTK_CREG_READ;
616
617 /*
618 * since we're only adjusting minutes and seconds,
619 * don't interfere with hour overflow. This avoids
620 * messing with unknown time zones but requires your
621 * RTC not to be off by more than 15 minutes
622 */
623 real_seconds = nowtime % 60;
624 real_minutes = nowtime / 60;
625 if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
626 real_minutes += 30; /* correct for half hour time zone */
627 real_minutes %= 60;
628
629 if (abs(real_minutes - mostek_minutes) < 30) {
630 regs->creg |= MSTK_CREG_WRITE;
631 MSTK_SET_REG_SEC(regs,real_seconds);
632 MSTK_SET_REG_MIN(regs,real_minutes);
633 regs->creg &= ~MSTK_CREG_WRITE;
634 spin_unlock_irqrestore(&mostek_lock, flags);
635 return 0;
636 } else {
637 spin_unlock_irqrestore(&mostek_lock, flags);
638 return -1;
639 }
640 }
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