[PATCH] simplify update_times (avoid jiffies/jiffies_64 aliasing problem)
[deliverable/linux.git] / arch / sparc / kernel / time.c
1 /* $Id: time.c,v 1.60 2002/01/23 14:33:55 davem Exp $
2 * linux/arch/sparc/kernel/time.c
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
6 *
7 * Chris Davis (cdavis@cois.on.ca) 03/27/1998
8 * Added support for the intersil on the sun4/4200
9 *
10 * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
11 * Support for MicroSPARC-IIep, PCI CPU.
12 *
13 * This file handles the Sparc specific time handling details.
14 *
15 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
16 * "A Kernel Model for Precision Timekeeping" by Dave Mills
17 */
18 #include <linux/errno.h>
19 #include <linux/module.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/mm.h>
25 #include <linux/interrupt.h>
26 #include <linux/time.h>
27 #include <linux/timex.h>
28 #include <linux/init.h>
29 #include <linux/pci.h>
30 #include <linux/ioport.h>
31 #include <linux/profile.h>
32
33 #include <asm/oplib.h>
34 #include <asm/timer.h>
35 #include <asm/mostek.h>
36 #include <asm/system.h>
37 #include <asm/irq.h>
38 #include <asm/io.h>
39 #include <asm/idprom.h>
40 #include <asm/machines.h>
41 #include <asm/sun4paddr.h>
42 #include <asm/page.h>
43 #include <asm/pcic.h>
44 #include <asm/of_device.h>
45
46 extern unsigned long wall_jiffies;
47
48 DEFINE_SPINLOCK(rtc_lock);
49 enum sparc_clock_type sp_clock_typ;
50 DEFINE_SPINLOCK(mostek_lock);
51 void __iomem *mstk48t02_regs = NULL;
52 static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
53 static int set_rtc_mmss(unsigned long);
54 static int sbus_do_settimeofday(struct timespec *tv);
55
56 #ifdef CONFIG_SUN4
57 struct intersil *intersil_clock;
58 #define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
59 (intsil_cmd)
60
61 #define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
62 (intsil_cmd)
63
64 #define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
65 ( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
66 INTERSIL_INTR_ENABLE))
67
68 #define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
69 ( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
70 INTERSIL_INTR_ENABLE))
71
72 #define intersil_read_intr(intersil_reg, towhere) towhere = \
73 intersil_reg->int_intr_reg
74
75 #endif
76
77 unsigned long profile_pc(struct pt_regs *regs)
78 {
79 extern char __copy_user_begin[], __copy_user_end[];
80 extern char __atomic_begin[], __atomic_end[];
81 extern char __bzero_begin[], __bzero_end[];
82 extern char __bitops_begin[], __bitops_end[];
83
84 unsigned long pc = regs->pc;
85
86 if (in_lock_functions(pc) ||
87 (pc >= (unsigned long) __copy_user_begin &&
88 pc < (unsigned long) __copy_user_end) ||
89 (pc >= (unsigned long) __atomic_begin &&
90 pc < (unsigned long) __atomic_end) ||
91 (pc >= (unsigned long) __bzero_begin &&
92 pc < (unsigned long) __bzero_end) ||
93 (pc >= (unsigned long) __bitops_begin &&
94 pc < (unsigned long) __bitops_end))
95 pc = regs->u_regs[UREG_RETPC];
96 return pc;
97 }
98
99 __volatile__ unsigned int *master_l10_counter;
100 __volatile__ unsigned int *master_l10_limit;
101
102 /*
103 * timer_interrupt() needs to keep up the real-time clock,
104 * as well as call the "do_timer()" routine every clocktick
105 */
106
107 #define TICK_SIZE (tick_nsec / 1000)
108
109 irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
110 {
111 /* last time the cmos clock got updated */
112 static long last_rtc_update;
113
114 #ifndef CONFIG_SMP
115 profile_tick(CPU_PROFILING, regs);
116 #endif
117
118 /* Protect counter clear so that do_gettimeoffset works */
119 write_seqlock(&xtime_lock);
120 #ifdef CONFIG_SUN4
121 if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
122 (idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
123 int temp;
124 intersil_read_intr(intersil_clock, temp);
125 /* re-enable the irq */
126 enable_pil_irq(10);
127 }
128 #endif
129 clear_clock_irq();
130
131 do_timer(1);
132 #ifndef CONFIG_SMP
133 update_process_times(user_mode(regs));
134 #endif
135
136
137 /* Determine when to update the Mostek clock. */
138 if (ntp_synced() &&
139 xtime.tv_sec > last_rtc_update + 660 &&
140 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
141 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
142 if (set_rtc_mmss(xtime.tv_sec) == 0)
143 last_rtc_update = xtime.tv_sec;
144 else
145 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
146 }
147 write_sequnlock(&xtime_lock);
148
149 return IRQ_HANDLED;
150 }
151
152 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
153 static void __init kick_start_clock(void)
154 {
155 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
156 unsigned char sec;
157 int i, count;
158
159 prom_printf("CLOCK: Clock was stopped. Kick start ");
160
161 spin_lock_irq(&mostek_lock);
162
163 /* Turn on the kick start bit to start the oscillator. */
164 regs->creg |= MSTK_CREG_WRITE;
165 regs->sec &= ~MSTK_STOP;
166 regs->hour |= MSTK_KICK_START;
167 regs->creg &= ~MSTK_CREG_WRITE;
168
169 spin_unlock_irq(&mostek_lock);
170
171 /* Delay to allow the clock oscillator to start. */
172 sec = MSTK_REG_SEC(regs);
173 for (i = 0; i < 3; i++) {
174 while (sec == MSTK_REG_SEC(regs))
175 for (count = 0; count < 100000; count++)
176 /* nothing */ ;
177 prom_printf(".");
178 sec = regs->sec;
179 }
180 prom_printf("\n");
181
182 spin_lock_irq(&mostek_lock);
183
184 /* Turn off kick start and set a "valid" time and date. */
185 regs->creg |= MSTK_CREG_WRITE;
186 regs->hour &= ~MSTK_KICK_START;
187 MSTK_SET_REG_SEC(regs,0);
188 MSTK_SET_REG_MIN(regs,0);
189 MSTK_SET_REG_HOUR(regs,0);
190 MSTK_SET_REG_DOW(regs,5);
191 MSTK_SET_REG_DOM(regs,1);
192 MSTK_SET_REG_MONTH(regs,8);
193 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
194 regs->creg &= ~MSTK_CREG_WRITE;
195
196 spin_unlock_irq(&mostek_lock);
197
198 /* Ensure the kick start bit is off. If it isn't, turn it off. */
199 while (regs->hour & MSTK_KICK_START) {
200 prom_printf("CLOCK: Kick start still on!\n");
201
202 spin_lock_irq(&mostek_lock);
203 regs->creg |= MSTK_CREG_WRITE;
204 regs->hour &= ~MSTK_KICK_START;
205 regs->creg &= ~MSTK_CREG_WRITE;
206 spin_unlock_irq(&mostek_lock);
207 }
208
209 prom_printf("CLOCK: Kick start procedure successful.\n");
210 }
211
212 /* Return nonzero if the clock chip battery is low. */
213 static __inline__ int has_low_battery(void)
214 {
215 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
216 unsigned char data1, data2;
217
218 spin_lock_irq(&mostek_lock);
219 data1 = regs->eeprom[0]; /* Read some data. */
220 regs->eeprom[0] = ~data1; /* Write back the complement. */
221 data2 = regs->eeprom[0]; /* Read back the complement. */
222 regs->eeprom[0] = data1; /* Restore the original value. */
223 spin_unlock_irq(&mostek_lock);
224
225 return (data1 == data2); /* Was the write blocked? */
226 }
227
228 static void __init mostek_set_system_time(void)
229 {
230 unsigned int year, mon, day, hour, min, sec;
231 struct mostek48t02 *mregs;
232
233 mregs = (struct mostek48t02 *)mstk48t02_regs;
234 if(!mregs) {
235 prom_printf("Something wrong, clock regs not mapped yet.\n");
236 prom_halt();
237 }
238 spin_lock_irq(&mostek_lock);
239 mregs->creg |= MSTK_CREG_READ;
240 sec = MSTK_REG_SEC(mregs);
241 min = MSTK_REG_MIN(mregs);
242 hour = MSTK_REG_HOUR(mregs);
243 day = MSTK_REG_DOM(mregs);
244 mon = MSTK_REG_MONTH(mregs);
245 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
246 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
247 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
248 set_normalized_timespec(&wall_to_monotonic,
249 -xtime.tv_sec, -xtime.tv_nsec);
250 mregs->creg &= ~MSTK_CREG_READ;
251 spin_unlock_irq(&mostek_lock);
252 }
253
254 /* Probe for the real time clock chip on Sun4 */
255 static __inline__ void sun4_clock_probe(void)
256 {
257 #ifdef CONFIG_SUN4
258 int temp;
259 struct resource r;
260
261 memset(&r, 0, sizeof(r));
262 if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
263 sp_clock_typ = MSTK48T02;
264 r.start = sun4_clock_physaddr;
265 mstk48t02_regs = sbus_ioremap(&r, 0,
266 sizeof(struct mostek48t02), NULL);
267 mstk48t08_regs = NULL; /* To catch weirdness */
268 intersil_clock = NULL; /* just in case */
269
270 /* Kick start the clock if it is completely stopped. */
271 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
272 kick_start_clock();
273 } else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
274 /* intersil setup code */
275 printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
276 sp_clock_typ = INTERSIL;
277 r.start = sun4_clock_physaddr;
278 intersil_clock = (struct intersil *)
279 sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
280 mstk48t02_regs = 0; /* just be sure */
281 mstk48t08_regs = NULL; /* ditto */
282 /* initialise the clock */
283
284 intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
285
286 intersil_start(intersil_clock);
287
288 intersil_read_intr(intersil_clock, temp);
289 while (!(temp & 0x80))
290 intersil_read_intr(intersil_clock, temp);
291
292 intersil_read_intr(intersil_clock, temp);
293 while (!(temp & 0x80))
294 intersil_read_intr(intersil_clock, temp);
295
296 intersil_stop(intersil_clock);
297
298 }
299 #endif
300 }
301
302 #ifndef CONFIG_SUN4
303 static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
304 {
305 struct device_node *dp = op->node;
306 char *model = of_get_property(dp, "model", NULL);
307
308 if (!model)
309 return -ENODEV;
310
311 if (!strcmp(model, "mk48t02")) {
312 sp_clock_typ = MSTK48T02;
313
314 /* Map the clock register io area read-only */
315 mstk48t02_regs = of_ioremap(&op->resource[0], 0,
316 sizeof(struct mostek48t02),
317 "mk48t02");
318 mstk48t08_regs = NULL; /* To catch weirdness */
319 } else if (!strcmp(model, "mk48t08")) {
320 sp_clock_typ = MSTK48T08;
321 mstk48t08_regs = of_ioremap(&op->resource[0], 0,
322 sizeof(struct mostek48t08),
323 "mk48t08");
324
325 mstk48t02_regs = &mstk48t08_regs->regs;
326 } else
327 return -ENODEV;
328
329 /* Report a low battery voltage condition. */
330 if (has_low_battery())
331 printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
332
333 /* Kick start the clock if it is completely stopped. */
334 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
335 kick_start_clock();
336
337 mostek_set_system_time();
338
339 return 0;
340 }
341
342 static struct of_device_id clock_match[] = {
343 {
344 .name = "eeprom",
345 },
346 {},
347 };
348
349 static struct of_platform_driver clock_driver = {
350 .name = "clock",
351 .match_table = clock_match,
352 .probe = clock_probe,
353 };
354
355
356 /* Probe for the mostek real time clock chip. */
357 static int __init clock_init(void)
358 {
359 return of_register_driver(&clock_driver, &of_bus_type);
360 }
361
362 /* Must be after subsys_initcall() so that busses are probed. Must
363 * be before device_initcall() because things like the RTC driver
364 * need to see the clock registers.
365 */
366 fs_initcall(clock_init);
367 #endif /* !CONFIG_SUN4 */
368
369 void __init sbus_time_init(void)
370 {
371
372 BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
373 btfixup();
374
375 if (ARCH_SUN4)
376 sun4_clock_probe();
377
378 sparc_init_timers(timer_interrupt);
379
380 #ifdef CONFIG_SUN4
381 if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
382 mostek_set_system_time();
383 } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
384 /* initialise the intersil on sun4 */
385 unsigned int year, mon, day, hour, min, sec;
386 int temp;
387 struct intersil *iregs;
388
389 iregs=intersil_clock;
390 if(!iregs) {
391 prom_printf("Something wrong, clock regs not mapped yet.\n");
392 prom_halt();
393 }
394
395 intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
396 disable_pil_irq(10);
397 intersil_stop(iregs);
398 intersil_read_intr(intersil_clock, temp);
399
400 temp = iregs->clk.int_csec;
401
402 sec = iregs->clk.int_sec;
403 min = iregs->clk.int_min;
404 hour = iregs->clk.int_hour;
405 day = iregs->clk.int_day;
406 mon = iregs->clk.int_month;
407 year = MSTK_CVT_YEAR(iregs->clk.int_year);
408
409 enable_pil_irq(10);
410 intersil_start(iregs);
411
412 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
413 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
414 set_normalized_timespec(&wall_to_monotonic,
415 -xtime.tv_sec, -xtime.tv_nsec);
416 printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
417 }
418 #endif
419
420 /* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
421 local_irq_enable();
422 }
423
424 void __init time_init(void)
425 {
426 #ifdef CONFIG_PCI
427 extern void pci_time_init(void);
428 if (pcic_present()) {
429 pci_time_init();
430 return;
431 }
432 #endif
433 sbus_time_init();
434 }
435
436 static inline unsigned long do_gettimeoffset(void)
437 {
438 return (*master_l10_counter >> 10) & 0x1fffff;
439 }
440
441 /*
442 * Returns nanoseconds
443 * XXX This is a suboptimal implementation.
444 */
445 unsigned long long sched_clock(void)
446 {
447 return (unsigned long long)jiffies * (1000000000 / HZ);
448 }
449
450 /* Ok, my cute asm atomicity trick doesn't work anymore.
451 * There are just too many variables that need to be protected
452 * now (both members of xtime, wall_jiffies, et al.)
453 */
454 void do_gettimeofday(struct timeval *tv)
455 {
456 unsigned long flags;
457 unsigned long seq;
458 unsigned long usec, sec;
459 unsigned long max_ntp_tick = tick_usec - tickadj;
460
461 do {
462 unsigned long lost;
463
464 seq = read_seqbegin_irqsave(&xtime_lock, flags);
465 usec = do_gettimeoffset();
466 lost = jiffies - wall_jiffies;
467
468 /*
469 * If time_adjust is negative then NTP is slowing the clock
470 * so make sure not to go into next possible interval.
471 * Better to lose some accuracy than have time go backwards..
472 */
473 if (unlikely(time_adjust < 0)) {
474 usec = min(usec, max_ntp_tick);
475
476 if (lost)
477 usec += lost * max_ntp_tick;
478 }
479 else if (unlikely(lost))
480 usec += lost * tick_usec;
481
482 sec = xtime.tv_sec;
483 usec += (xtime.tv_nsec / 1000);
484 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
485
486 while (usec >= 1000000) {
487 usec -= 1000000;
488 sec++;
489 }
490
491 tv->tv_sec = sec;
492 tv->tv_usec = usec;
493 }
494
495 EXPORT_SYMBOL(do_gettimeofday);
496
497 int do_settimeofday(struct timespec *tv)
498 {
499 int ret;
500
501 write_seqlock_irq(&xtime_lock);
502 ret = bus_do_settimeofday(tv);
503 write_sequnlock_irq(&xtime_lock);
504 clock_was_set();
505 return ret;
506 }
507
508 EXPORT_SYMBOL(do_settimeofday);
509
510 static int sbus_do_settimeofday(struct timespec *tv)
511 {
512 time_t wtm_sec, sec = tv->tv_sec;
513 long wtm_nsec, nsec = tv->tv_nsec;
514
515 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
516 return -EINVAL;
517
518 /*
519 * This is revolting. We need to set "xtime" correctly. However, the
520 * value in this location is the value at the most recent update of
521 * wall time. Discover what correction gettimeofday() would have
522 * made, and then undo it!
523 */
524 nsec -= 1000 * (do_gettimeoffset() +
525 (jiffies - wall_jiffies) * (USEC_PER_SEC / HZ));
526
527 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
528 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
529
530 set_normalized_timespec(&xtime, sec, nsec);
531 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
532
533 ntp_clear();
534 return 0;
535 }
536
537 /*
538 * BUG: This routine does not handle hour overflow properly; it just
539 * sets the minutes. Usually you won't notice until after reboot!
540 */
541 static int set_rtc_mmss(unsigned long nowtime)
542 {
543 int real_seconds, real_minutes, mostek_minutes;
544 struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
545 unsigned long flags;
546 #ifdef CONFIG_SUN4
547 struct intersil *iregs = intersil_clock;
548 int temp;
549 #endif
550
551 /* Not having a register set can lead to trouble. */
552 if (!regs) {
553 #ifdef CONFIG_SUN4
554 if(!iregs)
555 return -1;
556 else {
557 temp = iregs->clk.int_csec;
558
559 mostek_minutes = iregs->clk.int_min;
560
561 real_seconds = nowtime % 60;
562 real_minutes = nowtime / 60;
563 if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
564 real_minutes += 30; /* correct for half hour time zone */
565 real_minutes %= 60;
566
567 if (abs(real_minutes - mostek_minutes) < 30) {
568 intersil_stop(iregs);
569 iregs->clk.int_sec=real_seconds;
570 iregs->clk.int_min=real_minutes;
571 intersil_start(iregs);
572 } else {
573 printk(KERN_WARNING
574 "set_rtc_mmss: can't update from %d to %d\n",
575 mostek_minutes, real_minutes);
576 return -1;
577 }
578
579 return 0;
580 }
581 #endif
582 }
583
584 spin_lock_irqsave(&mostek_lock, flags);
585 /* Read the current RTC minutes. */
586 regs->creg |= MSTK_CREG_READ;
587 mostek_minutes = MSTK_REG_MIN(regs);
588 regs->creg &= ~MSTK_CREG_READ;
589
590 /*
591 * since we're only adjusting minutes and seconds,
592 * don't interfere with hour overflow. This avoids
593 * messing with unknown time zones but requires your
594 * RTC not to be off by more than 15 minutes
595 */
596 real_seconds = nowtime % 60;
597 real_minutes = nowtime / 60;
598 if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
599 real_minutes += 30; /* correct for half hour time zone */
600 real_minutes %= 60;
601
602 if (abs(real_minutes - mostek_minutes) < 30) {
603 regs->creg |= MSTK_CREG_WRITE;
604 MSTK_SET_REG_SEC(regs,real_seconds);
605 MSTK_SET_REG_MIN(regs,real_minutes);
606 regs->creg &= ~MSTK_CREG_WRITE;
607 spin_unlock_irqrestore(&mostek_lock, flags);
608 return 0;
609 } else {
610 spin_unlock_irqrestore(&mostek_lock, flags);
611 return -1;
612 }
613 }
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