[SPARC64]: constify of_get_property return: arch/sparc64
[deliverable/linux.git] / arch / sparc64 / kernel / central.c
1 /* $Id: central.c,v 1.15 2001/12/19 00:29:51 davem Exp $
2 * central.c: Central FHC driver for Sunfire/Starfire/Wildfire.
3 *
4 * Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com)
5 */
6
7 #include <linux/kernel.h>
8 #include <linux/types.h>
9 #include <linux/string.h>
10 #include <linux/timer.h>
11 #include <linux/sched.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/bootmem.h>
15
16 #include <asm/page.h>
17 #include <asm/fhc.h>
18 #include <asm/starfire.h>
19
20 struct linux_central *central_bus = NULL;
21 struct linux_fhc *fhc_list = NULL;
22
23 #define IS_CENTRAL_FHC(__fhc) ((__fhc) == central_bus->child)
24
25 static void central_probe_failure(int line)
26 {
27 prom_printf("CENTRAL: Critical device probe failure at central.c:%d\n",
28 line);
29 prom_halt();
30 }
31
32 static void central_ranges_init(struct linux_central *central)
33 {
34 struct device_node *dp = central->prom_node;
35 const void *pval;
36 int len;
37
38 central->num_central_ranges = 0;
39 pval = of_get_property(dp, "ranges", &len);
40 if (pval) {
41 memcpy(central->central_ranges, pval, len);
42 central->num_central_ranges =
43 (len / sizeof(struct linux_prom_ranges));
44 }
45 }
46
47 static void fhc_ranges_init(struct linux_fhc *fhc)
48 {
49 struct device_node *dp = fhc->prom_node;
50 const void *pval;
51 int len;
52
53 fhc->num_fhc_ranges = 0;
54 pval = of_get_property(dp, "ranges", &len);
55 if (pval) {
56 memcpy(fhc->fhc_ranges, pval, len);
57 fhc->num_fhc_ranges =
58 (len / sizeof(struct linux_prom_ranges));
59 }
60 }
61
62 /* Range application routines are exported to various drivers,
63 * so do not __init this.
64 */
65 static void adjust_regs(struct linux_prom_registers *regp, int nregs,
66 struct linux_prom_ranges *rangep, int nranges)
67 {
68 int regc, rngc;
69
70 for (regc = 0; regc < nregs; regc++) {
71 for (rngc = 0; rngc < nranges; rngc++)
72 if (regp[regc].which_io == rangep[rngc].ot_child_space)
73 break; /* Fount it */
74 if (rngc == nranges) /* oops */
75 central_probe_failure(__LINE__);
76 regp[regc].which_io = rangep[rngc].ot_parent_space;
77 regp[regc].phys_addr -= rangep[rngc].ot_child_base;
78 regp[regc].phys_addr += rangep[rngc].ot_parent_base;
79 }
80 }
81
82 /* Apply probed fhc ranges to registers passed, if no ranges return. */
83 void apply_fhc_ranges(struct linux_fhc *fhc,
84 struct linux_prom_registers *regs,
85 int nregs)
86 {
87 if (fhc->num_fhc_ranges)
88 adjust_regs(regs, nregs, fhc->fhc_ranges,
89 fhc->num_fhc_ranges);
90 }
91
92 /* Apply probed central ranges to registers passed, if no ranges return. */
93 void apply_central_ranges(struct linux_central *central,
94 struct linux_prom_registers *regs, int nregs)
95 {
96 if (central->num_central_ranges)
97 adjust_regs(regs, nregs, central->central_ranges,
98 central->num_central_ranges);
99 }
100
101 void * __init central_alloc_bootmem(unsigned long size)
102 {
103 void *ret;
104
105 ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
106 if (ret != NULL)
107 memset(ret, 0, size);
108
109 return ret;
110 }
111
112 static unsigned long prom_reg_to_paddr(struct linux_prom_registers *r)
113 {
114 unsigned long ret = ((unsigned long) r->which_io) << 32;
115
116 return ret | (unsigned long) r->phys_addr;
117 }
118
119 static void probe_other_fhcs(void)
120 {
121 struct device_node *dp;
122 const struct linux_prom64_registers *fpregs;
123
124 for_each_node_by_name(dp, "fhc") {
125 struct linux_fhc *fhc;
126 int board;
127 u32 tmp;
128
129 if (dp->parent &&
130 dp->parent->parent != NULL)
131 continue;
132
133 fhc = (struct linux_fhc *)
134 central_alloc_bootmem(sizeof(struct linux_fhc));
135 if (fhc == NULL)
136 central_probe_failure(__LINE__);
137
138 /* Link it into the FHC chain. */
139 fhc->next = fhc_list;
140 fhc_list = fhc;
141
142 /* Toplevel FHCs have no parent. */
143 fhc->parent = NULL;
144
145 fhc->prom_node = dp;
146 fhc_ranges_init(fhc);
147
148 /* Non-central FHC's have 64-bit OBP format registers. */
149 fpregs = of_get_property(dp, "reg", NULL);
150 if (!fpregs)
151 central_probe_failure(__LINE__);
152
153 /* Only central FHC needs special ranges applied. */
154 fhc->fhc_regs.pregs = fpregs[0].phys_addr;
155 fhc->fhc_regs.ireg = fpregs[1].phys_addr;
156 fhc->fhc_regs.ffregs = fpregs[2].phys_addr;
157 fhc->fhc_regs.sregs = fpregs[3].phys_addr;
158 fhc->fhc_regs.uregs = fpregs[4].phys_addr;
159 fhc->fhc_regs.tregs = fpregs[5].phys_addr;
160
161 board = of_getintprop_default(dp, "board#", -1);
162 fhc->board = board;
163
164 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_JCTRL);
165 if ((tmp & FHC_JTAG_CTRL_MENAB) != 0)
166 fhc->jtag_master = 1;
167 else
168 fhc->jtag_master = 0;
169
170 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_ID);
171 printk("FHC(board %d): Version[%x] PartID[%x] Manuf[%x] %s\n",
172 board,
173 (tmp & FHC_ID_VERS) >> 28,
174 (tmp & FHC_ID_PARTID) >> 12,
175 (tmp & FHC_ID_MANUF) >> 1,
176 (fhc->jtag_master ? "(JTAG Master)" : ""));
177
178 /* This bit must be set in all non-central FHC's in
179 * the system. When it is clear, this identifies
180 * the central board.
181 */
182 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
183 tmp |= FHC_CONTROL_IXIST;
184 upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
185 }
186 }
187
188 static void probe_clock_board(struct linux_central *central,
189 struct linux_fhc *fhc,
190 struct device_node *fp)
191 {
192 struct device_node *dp;
193 struct linux_prom_registers cregs[3];
194 const struct linux_prom_registers *pr;
195 int nslots, tmp, nregs;
196
197 dp = fp->child;
198 while (dp) {
199 if (!strcmp(dp->name, "clock-board"))
200 break;
201 dp = dp->sibling;
202 }
203 if (!dp)
204 central_probe_failure(__LINE__);
205
206 pr = of_get_property(dp, "reg", &nregs);
207 if (!pr)
208 central_probe_failure(__LINE__);
209
210 memcpy(cregs, pr, nregs);
211 nregs /= sizeof(struct linux_prom_registers);
212
213 apply_fhc_ranges(fhc, &cregs[0], nregs);
214 apply_central_ranges(central, &cregs[0], nregs);
215 central->cfreg = prom_reg_to_paddr(&cregs[0]);
216 central->clkregs = prom_reg_to_paddr(&cregs[1]);
217
218 if (nregs == 2)
219 central->clkver = 0UL;
220 else
221 central->clkver = prom_reg_to_paddr(&cregs[2]);
222
223 tmp = upa_readb(central->clkregs + CLOCK_STAT1);
224 tmp &= 0xc0;
225 switch(tmp) {
226 case 0x40:
227 nslots = 16;
228 break;
229 case 0xc0:
230 nslots = 8;
231 break;
232 case 0x80:
233 if (central->clkver != 0UL &&
234 upa_readb(central->clkver) != 0) {
235 if ((upa_readb(central->clkver) & 0x80) != 0)
236 nslots = 4;
237 else
238 nslots = 5;
239 break;
240 }
241 default:
242 nslots = 4;
243 break;
244 };
245 central->slots = nslots;
246 printk("CENTRAL: Detected %d slot Enterprise system. cfreg[%02x] cver[%02x]\n",
247 central->slots, upa_readb(central->cfreg),
248 (central->clkver ? upa_readb(central->clkver) : 0x00));
249 }
250
251 static void ZAP(unsigned long iclr, unsigned long imap)
252 {
253 u32 imap_tmp;
254
255 upa_writel(0, iclr);
256 upa_readl(iclr);
257 imap_tmp = upa_readl(imap);
258 imap_tmp &= ~(0x80000000);
259 upa_writel(imap_tmp, imap);
260 upa_readl(imap);
261 }
262
263 static void init_all_fhc_hw(void)
264 {
265 struct linux_fhc *fhc;
266
267 for (fhc = fhc_list; fhc != NULL; fhc = fhc->next) {
268 u32 tmp;
269
270 /* Clear all of the interrupt mapping registers
271 * just in case OBP left them in a foul state.
272 */
273 ZAP(fhc->fhc_regs.ffregs + FHC_FFREGS_ICLR,
274 fhc->fhc_regs.ffregs + FHC_FFREGS_IMAP);
275 ZAP(fhc->fhc_regs.sregs + FHC_SREGS_ICLR,
276 fhc->fhc_regs.sregs + FHC_SREGS_IMAP);
277 ZAP(fhc->fhc_regs.uregs + FHC_UREGS_ICLR,
278 fhc->fhc_regs.uregs + FHC_UREGS_IMAP);
279 ZAP(fhc->fhc_regs.tregs + FHC_TREGS_ICLR,
280 fhc->fhc_regs.tregs + FHC_TREGS_IMAP);
281
282 /* Setup FHC control register. */
283 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
284
285 /* All non-central boards have this bit set. */
286 if (! IS_CENTRAL_FHC(fhc))
287 tmp |= FHC_CONTROL_IXIST;
288
289 /* For all FHCs, clear the firmware synchronization
290 * line and both low power mode enables.
291 */
292 tmp &= ~(FHC_CONTROL_AOFF | FHC_CONTROL_BOFF |
293 FHC_CONTROL_SLINE);
294
295 upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
296 upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
297 }
298
299 }
300
301 void central_probe(void)
302 {
303 struct linux_prom_registers fpregs[6];
304 const struct linux_prom_registers *pr;
305 struct linux_fhc *fhc;
306 struct device_node *dp, *fp;
307 int err;
308
309 dp = of_find_node_by_name(NULL, "central");
310 if (!dp) {
311 if (this_is_starfire)
312 starfire_cpu_setup();
313 return;
314 }
315
316 /* Ok we got one, grab some memory for software state. */
317 central_bus = (struct linux_central *)
318 central_alloc_bootmem(sizeof(struct linux_central));
319 if (central_bus == NULL)
320 central_probe_failure(__LINE__);
321
322 fhc = (struct linux_fhc *)
323 central_alloc_bootmem(sizeof(struct linux_fhc));
324 if (fhc == NULL)
325 central_probe_failure(__LINE__);
326
327 /* First init central. */
328 central_bus->child = fhc;
329 central_bus->prom_node = dp;
330 central_ranges_init(central_bus);
331
332 /* And then central's FHC. */
333 fhc->next = fhc_list;
334 fhc_list = fhc;
335
336 fhc->parent = central_bus;
337 fp = dp->child;
338 while (fp) {
339 if (!strcmp(fp->name, "fhc"))
340 break;
341 fp = fp->sibling;
342 }
343 if (!fp)
344 central_probe_failure(__LINE__);
345
346 fhc->prom_node = fp;
347 fhc_ranges_init(fhc);
348
349 /* Now, map in FHC register set. */
350 pr = of_get_property(fp, "reg", NULL);
351 if (!pr)
352 central_probe_failure(__LINE__);
353 memcpy(fpregs, pr, sizeof(fpregs));
354
355 apply_central_ranges(central_bus, &fpregs[0], 6);
356
357 fhc->fhc_regs.pregs = prom_reg_to_paddr(&fpregs[0]);
358 fhc->fhc_regs.ireg = prom_reg_to_paddr(&fpregs[1]);
359 fhc->fhc_regs.ffregs = prom_reg_to_paddr(&fpregs[2]);
360 fhc->fhc_regs.sregs = prom_reg_to_paddr(&fpregs[3]);
361 fhc->fhc_regs.uregs = prom_reg_to_paddr(&fpregs[4]);
362 fhc->fhc_regs.tregs = prom_reg_to_paddr(&fpregs[5]);
363
364 /* Obtain board number from board status register, Central's
365 * FHC lacks "board#" property.
366 */
367 err = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_BSR);
368 fhc->board = (((err >> 16) & 0x01) |
369 ((err >> 12) & 0x0e));
370
371 fhc->jtag_master = 0;
372
373 /* Attach the clock board registers for CENTRAL. */
374 probe_clock_board(central_bus, fhc, fp);
375
376 err = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_ID);
377 printk("FHC(board %d): Version[%x] PartID[%x] Manuf[%x] (CENTRAL)\n",
378 fhc->board,
379 ((err & FHC_ID_VERS) >> 28),
380 ((err & FHC_ID_PARTID) >> 12),
381 ((err & FHC_ID_MANUF) >> 1));
382
383 probe_other_fhcs();
384
385 init_all_fhc_hw();
386 }
387
388 static __inline__ void fhc_ledblink(struct linux_fhc *fhc, int on)
389 {
390 u32 tmp;
391
392 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
393
394 /* NOTE: reverse logic on this bit */
395 if (on)
396 tmp &= ~(FHC_CONTROL_RLED);
397 else
398 tmp |= FHC_CONTROL_RLED;
399 tmp &= ~(FHC_CONTROL_AOFF | FHC_CONTROL_BOFF | FHC_CONTROL_SLINE);
400
401 upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
402 upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
403 }
404
405 static __inline__ void central_ledblink(struct linux_central *central, int on)
406 {
407 u8 tmp;
408
409 tmp = upa_readb(central->clkregs + CLOCK_CTRL);
410
411 /* NOTE: reverse logic on this bit */
412 if (on)
413 tmp &= ~(CLOCK_CTRL_RLED);
414 else
415 tmp |= CLOCK_CTRL_RLED;
416
417 upa_writeb(tmp, central->clkregs + CLOCK_CTRL);
418 upa_readb(central->clkregs + CLOCK_CTRL);
419 }
420
421 static struct timer_list sftimer;
422 static int led_state;
423
424 static void sunfire_timer(unsigned long __ignored)
425 {
426 struct linux_fhc *fhc;
427
428 central_ledblink(central_bus, led_state);
429 for (fhc = fhc_list; fhc != NULL; fhc = fhc->next)
430 if (! IS_CENTRAL_FHC(fhc))
431 fhc_ledblink(fhc, led_state);
432 led_state = ! led_state;
433 sftimer.expires = jiffies + (HZ >> 1);
434 add_timer(&sftimer);
435 }
436
437 /* After PCI/SBUS busses have been probed, this is called to perform
438 * final initialization of all FireHose Controllers in the system.
439 */
440 void firetruck_init(void)
441 {
442 struct linux_central *central = central_bus;
443 u8 ctrl;
444
445 /* No central bus, nothing to do. */
446 if (central == NULL)
447 return;
448
449 /* OBP leaves it on, turn it off so clock board timer LED
450 * is in sync with FHC ones.
451 */
452 ctrl = upa_readb(central->clkregs + CLOCK_CTRL);
453 ctrl &= ~(CLOCK_CTRL_RLED);
454 upa_writeb(ctrl, central->clkregs + CLOCK_CTRL);
455
456 led_state = 0;
457 init_timer(&sftimer);
458 sftimer.data = 0;
459 sftimer.function = &sunfire_timer;
460 sftimer.expires = jiffies + (HZ >> 1);
461 add_timer(&sftimer);
462 }
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