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[SPARC64]: Probe D/I/E-cache config and use.
[deliverable/linux.git] / arch / sparc64 / kernel / entry.S
1 /* $Id: entry.S,v 1.144 2002/02/09 19:49:30 davem Exp $
2 * arch/sparc64/kernel/entry.S: Sparc64 trap low-level entry points.
3 *
4 * Copyright (C) 1995,1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
6 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
7 * Copyright (C) 1996,98,99 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 */
9
10 #include <linux/config.h>
11 #include <linux/errno.h>
12
13 #include <asm/head.h>
14 #include <asm/asi.h>
15 #include <asm/smp.h>
16 #include <asm/ptrace.h>
17 #include <asm/page.h>
18 #include <asm/signal.h>
19 #include <asm/pgtable.h>
20 #include <asm/processor.h>
21 #include <asm/visasm.h>
22 #include <asm/estate.h>
23 #include <asm/auxio.h>
24 #include <asm/sfafsr.h>
25
26 #define curptr g6
27
28 #define NR_SYSCALLS 284 /* Each OS is different... */
29
30 .text
31 .align 32
32
33 /* This is trivial with the new code... */
34 .globl do_fpdis
35 do_fpdis:
36 sethi %hi(TSTATE_PEF), %g4 ! IEU0
37 rdpr %tstate, %g5
38 andcc %g5, %g4, %g0
39 be,pt %xcc, 1f
40 nop
41 rd %fprs, %g5
42 andcc %g5, FPRS_FEF, %g0
43 be,pt %xcc, 1f
44 nop
45
46 /* Legal state when DCR_IFPOE is set in Cheetah %dcr. */
47 sethi %hi(109f), %g7
48 ba,pt %xcc, etrap
49 109: or %g7, %lo(109b), %g7
50 add %g0, %g0, %g0
51 ba,a,pt %xcc, rtrap_clr_l6
52
53 1: ldub [%g6 + TI_FPSAVED], %g5 ! Load Group
54 wr %g0, FPRS_FEF, %fprs ! LSU Group+4bubbles
55 andcc %g5, FPRS_FEF, %g0 ! IEU1 Group
56 be,a,pt %icc, 1f ! CTI
57 clr %g7 ! IEU0
58 ldx [%g6 + TI_GSR], %g7 ! Load Group
59 1: andcc %g5, FPRS_DL, %g0 ! IEU1
60 bne,pn %icc, 2f ! CTI
61 fzero %f0 ! FPA
62 andcc %g5, FPRS_DU, %g0 ! IEU1 Group
63 bne,pn %icc, 1f ! CTI
64 fzero %f2 ! FPA
65 faddd %f0, %f2, %f4
66 fmuld %f0, %f2, %f6
67 faddd %f0, %f2, %f8
68 fmuld %f0, %f2, %f10
69 faddd %f0, %f2, %f12
70 fmuld %f0, %f2, %f14
71 faddd %f0, %f2, %f16
72 fmuld %f0, %f2, %f18
73 faddd %f0, %f2, %f20
74 fmuld %f0, %f2, %f22
75 faddd %f0, %f2, %f24
76 fmuld %f0, %f2, %f26
77 faddd %f0, %f2, %f28
78 fmuld %f0, %f2, %f30
79 faddd %f0, %f2, %f32
80 fmuld %f0, %f2, %f34
81 faddd %f0, %f2, %f36
82 fmuld %f0, %f2, %f38
83 faddd %f0, %f2, %f40
84 fmuld %f0, %f2, %f42
85 faddd %f0, %f2, %f44
86 fmuld %f0, %f2, %f46
87 faddd %f0, %f2, %f48
88 fmuld %f0, %f2, %f50
89 faddd %f0, %f2, %f52
90 fmuld %f0, %f2, %f54
91 faddd %f0, %f2, %f56
92 fmuld %f0, %f2, %f58
93 b,pt %xcc, fpdis_exit2
94 faddd %f0, %f2, %f60
95 1: mov SECONDARY_CONTEXT, %g3
96 add %g6, TI_FPREGS + 0x80, %g1
97 faddd %f0, %f2, %f4
98 fmuld %f0, %f2, %f6
99 ldxa [%g3] ASI_DMMU, %g5
100 cplus_fptrap_insn_1:
101 sethi %hi(0), %g2
102 stxa %g2, [%g3] ASI_DMMU
103 membar #Sync
104 add %g6, TI_FPREGS + 0xc0, %g2
105 faddd %f0, %f2, %f8
106 fmuld %f0, %f2, %f10
107 ldda [%g1] ASI_BLK_S, %f32 ! grrr, where is ASI_BLK_NUCLEUS 8-(
108 ldda [%g2] ASI_BLK_S, %f48
109 faddd %f0, %f2, %f12
110 fmuld %f0, %f2, %f14
111 faddd %f0, %f2, %f16
112 fmuld %f0, %f2, %f18
113 faddd %f0, %f2, %f20
114 fmuld %f0, %f2, %f22
115 faddd %f0, %f2, %f24
116 fmuld %f0, %f2, %f26
117 faddd %f0, %f2, %f28
118 fmuld %f0, %f2, %f30
119 membar #Sync
120 b,pt %xcc, fpdis_exit
121 nop
122 2: andcc %g5, FPRS_DU, %g0
123 bne,pt %icc, 3f
124 fzero %f32
125 mov SECONDARY_CONTEXT, %g3
126 fzero %f34
127 ldxa [%g3] ASI_DMMU, %g5
128 add %g6, TI_FPREGS, %g1
129 cplus_fptrap_insn_2:
130 sethi %hi(0), %g2
131 stxa %g2, [%g3] ASI_DMMU
132 membar #Sync
133 add %g6, TI_FPREGS + 0x40, %g2
134 faddd %f32, %f34, %f36
135 fmuld %f32, %f34, %f38
136 ldda [%g1] ASI_BLK_S, %f0 ! grrr, where is ASI_BLK_NUCLEUS 8-(
137 ldda [%g2] ASI_BLK_S, %f16
138 faddd %f32, %f34, %f40
139 fmuld %f32, %f34, %f42
140 faddd %f32, %f34, %f44
141 fmuld %f32, %f34, %f46
142 faddd %f32, %f34, %f48
143 fmuld %f32, %f34, %f50
144 faddd %f32, %f34, %f52
145 fmuld %f32, %f34, %f54
146 faddd %f32, %f34, %f56
147 fmuld %f32, %f34, %f58
148 faddd %f32, %f34, %f60
149 fmuld %f32, %f34, %f62
150 membar #Sync
151 ba,pt %xcc, fpdis_exit
152 nop
153 3: mov SECONDARY_CONTEXT, %g3
154 add %g6, TI_FPREGS, %g1
155 ldxa [%g3] ASI_DMMU, %g5
156 cplus_fptrap_insn_3:
157 sethi %hi(0), %g2
158 stxa %g2, [%g3] ASI_DMMU
159 membar #Sync
160 mov 0x40, %g2
161 ldda [%g1] ASI_BLK_S, %f0 ! grrr, where is ASI_BLK_NUCLEUS 8-(
162 ldda [%g1 + %g2] ASI_BLK_S, %f16
163 add %g1, 0x80, %g1
164 ldda [%g1] ASI_BLK_S, %f32
165 ldda [%g1 + %g2] ASI_BLK_S, %f48
166 membar #Sync
167 fpdis_exit:
168 stxa %g5, [%g3] ASI_DMMU
169 membar #Sync
170 fpdis_exit2:
171 wr %g7, 0, %gsr
172 ldx [%g6 + TI_XFSR], %fsr
173 rdpr %tstate, %g3
174 or %g3, %g4, %g3 ! anal...
175 wrpr %g3, %tstate
176 wr %g0, FPRS_FEF, %fprs ! clean DU/DL bits
177 retry
178
179 .align 32
180 fp_other_bounce:
181 call do_fpother
182 add %sp, PTREGS_OFF, %o0
183 ba,pt %xcc, rtrap
184 clr %l6
185
186 .globl do_fpother_check_fitos
187 .align 32
188 do_fpother_check_fitos:
189 sethi %hi(fp_other_bounce - 4), %g7
190 or %g7, %lo(fp_other_bounce - 4), %g7
191
192 /* NOTE: Need to preserve %g7 until we fully commit
193 * to the fitos fixup.
194 */
195 stx %fsr, [%g6 + TI_XFSR]
196 rdpr %tstate, %g3
197 andcc %g3, TSTATE_PRIV, %g0
198 bne,pn %xcc, do_fptrap_after_fsr
199 nop
200 ldx [%g6 + TI_XFSR], %g3
201 srlx %g3, 14, %g1
202 and %g1, 7, %g1
203 cmp %g1, 2 ! Unfinished FP-OP
204 bne,pn %xcc, do_fptrap_after_fsr
205 sethi %hi(1 << 23), %g1 ! Inexact
206 andcc %g3, %g1, %g0
207 bne,pn %xcc, do_fptrap_after_fsr
208 rdpr %tpc, %g1
209 lduwa [%g1] ASI_AIUP, %g3 ! This cannot ever fail
210 #define FITOS_MASK 0xc1f83fe0
211 #define FITOS_COMPARE 0x81a01880
212 sethi %hi(FITOS_MASK), %g1
213 or %g1, %lo(FITOS_MASK), %g1
214 and %g3, %g1, %g1
215 sethi %hi(FITOS_COMPARE), %g2
216 or %g2, %lo(FITOS_COMPARE), %g2
217 cmp %g1, %g2
218 bne,pn %xcc, do_fptrap_after_fsr
219 nop
220 std %f62, [%g6 + TI_FPREGS + (62 * 4)]
221 sethi %hi(fitos_table_1), %g1
222 and %g3, 0x1f, %g2
223 or %g1, %lo(fitos_table_1), %g1
224 sllx %g2, 2, %g2
225 jmpl %g1 + %g2, %g0
226 ba,pt %xcc, fitos_emul_continue
227
228 fitos_table_1:
229 fitod %f0, %f62
230 fitod %f1, %f62
231 fitod %f2, %f62
232 fitod %f3, %f62
233 fitod %f4, %f62
234 fitod %f5, %f62
235 fitod %f6, %f62
236 fitod %f7, %f62
237 fitod %f8, %f62
238 fitod %f9, %f62
239 fitod %f10, %f62
240 fitod %f11, %f62
241 fitod %f12, %f62
242 fitod %f13, %f62
243 fitod %f14, %f62
244 fitod %f15, %f62
245 fitod %f16, %f62
246 fitod %f17, %f62
247 fitod %f18, %f62
248 fitod %f19, %f62
249 fitod %f20, %f62
250 fitod %f21, %f62
251 fitod %f22, %f62
252 fitod %f23, %f62
253 fitod %f24, %f62
254 fitod %f25, %f62
255 fitod %f26, %f62
256 fitod %f27, %f62
257 fitod %f28, %f62
258 fitod %f29, %f62
259 fitod %f30, %f62
260 fitod %f31, %f62
261
262 fitos_emul_continue:
263 sethi %hi(fitos_table_2), %g1
264 srl %g3, 25, %g2
265 or %g1, %lo(fitos_table_2), %g1
266 and %g2, 0x1f, %g2
267 sllx %g2, 2, %g2
268 jmpl %g1 + %g2, %g0
269 ba,pt %xcc, fitos_emul_fini
270
271 fitos_table_2:
272 fdtos %f62, %f0
273 fdtos %f62, %f1
274 fdtos %f62, %f2
275 fdtos %f62, %f3
276 fdtos %f62, %f4
277 fdtos %f62, %f5
278 fdtos %f62, %f6
279 fdtos %f62, %f7
280 fdtos %f62, %f8
281 fdtos %f62, %f9
282 fdtos %f62, %f10
283 fdtos %f62, %f11
284 fdtos %f62, %f12
285 fdtos %f62, %f13
286 fdtos %f62, %f14
287 fdtos %f62, %f15
288 fdtos %f62, %f16
289 fdtos %f62, %f17
290 fdtos %f62, %f18
291 fdtos %f62, %f19
292 fdtos %f62, %f20
293 fdtos %f62, %f21
294 fdtos %f62, %f22
295 fdtos %f62, %f23
296 fdtos %f62, %f24
297 fdtos %f62, %f25
298 fdtos %f62, %f26
299 fdtos %f62, %f27
300 fdtos %f62, %f28
301 fdtos %f62, %f29
302 fdtos %f62, %f30
303 fdtos %f62, %f31
304
305 fitos_emul_fini:
306 ldd [%g6 + TI_FPREGS + (62 * 4)], %f62
307 done
308
309 .globl do_fptrap
310 .align 32
311 do_fptrap:
312 stx %fsr, [%g6 + TI_XFSR]
313 do_fptrap_after_fsr:
314 ldub [%g6 + TI_FPSAVED], %g3
315 rd %fprs, %g1
316 or %g3, %g1, %g3
317 stb %g3, [%g6 + TI_FPSAVED]
318 rd %gsr, %g3
319 stx %g3, [%g6 + TI_GSR]
320 mov SECONDARY_CONTEXT, %g3
321 ldxa [%g3] ASI_DMMU, %g5
322 cplus_fptrap_insn_4:
323 sethi %hi(0), %g2
324 stxa %g2, [%g3] ASI_DMMU
325 membar #Sync
326 add %g6, TI_FPREGS, %g2
327 andcc %g1, FPRS_DL, %g0
328 be,pn %icc, 4f
329 mov 0x40, %g3
330 stda %f0, [%g2] ASI_BLK_S
331 stda %f16, [%g2 + %g3] ASI_BLK_S
332 andcc %g1, FPRS_DU, %g0
333 be,pn %icc, 5f
334 4: add %g2, 128, %g2
335 stda %f32, [%g2] ASI_BLK_S
336 stda %f48, [%g2 + %g3] ASI_BLK_S
337 5: mov SECONDARY_CONTEXT, %g1
338 membar #Sync
339 stxa %g5, [%g1] ASI_DMMU
340 membar #Sync
341 ba,pt %xcc, etrap
342 wr %g0, 0, %fprs
343
344 cplus_fptrap_1:
345 sethi %hi(CTX_CHEETAH_PLUS_CTX0), %g2
346
347 .globl cheetah_plus_patch_fpdis
348 cheetah_plus_patch_fpdis:
349 /* We configure the dTLB512_0 for 4MB pages and the
350 * dTLB512_1 for 8K pages when in context zero.
351 */
352 sethi %hi(cplus_fptrap_1), %o0
353 lduw [%o0 + %lo(cplus_fptrap_1)], %o1
354
355 set cplus_fptrap_insn_1, %o2
356 stw %o1, [%o2]
357 flush %o2
358 set cplus_fptrap_insn_2, %o2
359 stw %o1, [%o2]
360 flush %o2
361 set cplus_fptrap_insn_3, %o2
362 stw %o1, [%o2]
363 flush %o2
364 set cplus_fptrap_insn_4, %o2
365 stw %o1, [%o2]
366 flush %o2
367
368 retl
369 nop
370
371 /* The registers for cross calls will be:
372 *
373 * DATA 0: [low 32-bits] Address of function to call, jmp to this
374 * [high 32-bits] MMU Context Argument 0, place in %g5
375 * DATA 1: Address Argument 1, place in %g1
376 * DATA 2: Address Argument 2, place in %g7
377 *
378 * With this method we can do most of the cross-call tlb/cache
379 * flushing very quickly.
380 *
381 * Current CPU's IRQ worklist table is locked into %g6, don't touch.
382 */
383 .text
384 .align 32
385 .globl do_ivec
386 do_ivec:
387 mov 0x40, %g3
388 ldxa [%g3 + %g0] ASI_INTR_R, %g3
389 sethi %hi(KERNBASE), %g4
390 cmp %g3, %g4
391 bgeu,pn %xcc, do_ivec_xcall
392 srlx %g3, 32, %g5
393 stxa %g0, [%g0] ASI_INTR_RECEIVE
394 membar #Sync
395
396 sethi %hi(ivector_table), %g2
397 sllx %g3, 5, %g3
398 or %g2, %lo(ivector_table), %g2
399 add %g2, %g3, %g3
400 ldub [%g3 + 0x04], %g4 /* pil */
401 mov 1, %g2
402 sllx %g2, %g4, %g2
403 sllx %g4, 2, %g4
404
405 lduw [%g6 + %g4], %g5 /* g5 = irq_work(cpu, pil) */
406 stw %g5, [%g3 + 0x00] /* bucket->irq_chain = g5 */
407 stw %g3, [%g6 + %g4] /* irq_work(cpu, pil) = bucket */
408 wr %g2, 0x0, %set_softint
409 retry
410 do_ivec_xcall:
411 mov 0x50, %g1
412 ldxa [%g1 + %g0] ASI_INTR_R, %g1
413 srl %g3, 0, %g3
414
415 mov 0x60, %g7
416 ldxa [%g7 + %g0] ASI_INTR_R, %g7
417 stxa %g0, [%g0] ASI_INTR_RECEIVE
418 membar #Sync
419 ba,pt %xcc, 1f
420 nop
421
422 .align 32
423 1: jmpl %g3, %g0
424 nop
425
426 .globl save_alternate_globals
427 save_alternate_globals: /* %o0 = save_area */
428 rdpr %pstate, %o5
429 andn %o5, PSTATE_IE, %o1
430 wrpr %o1, PSTATE_AG, %pstate
431 stx %g0, [%o0 + 0x00]
432 stx %g1, [%o0 + 0x08]
433 stx %g2, [%o0 + 0x10]
434 stx %g3, [%o0 + 0x18]
435 stx %g4, [%o0 + 0x20]
436 stx %g5, [%o0 + 0x28]
437 stx %g6, [%o0 + 0x30]
438 stx %g7, [%o0 + 0x38]
439 wrpr %o1, PSTATE_IG, %pstate
440 stx %g0, [%o0 + 0x40]
441 stx %g1, [%o0 + 0x48]
442 stx %g2, [%o0 + 0x50]
443 stx %g3, [%o0 + 0x58]
444 stx %g4, [%o0 + 0x60]
445 stx %g5, [%o0 + 0x68]
446 stx %g6, [%o0 + 0x70]
447 stx %g7, [%o0 + 0x78]
448 wrpr %o1, PSTATE_MG, %pstate
449 stx %g0, [%o0 + 0x80]
450 stx %g1, [%o0 + 0x88]
451 stx %g2, [%o0 + 0x90]
452 stx %g3, [%o0 + 0x98]
453 stx %g4, [%o0 + 0xa0]
454 stx %g5, [%o0 + 0xa8]
455 stx %g6, [%o0 + 0xb0]
456 stx %g7, [%o0 + 0xb8]
457 wrpr %o5, 0x0, %pstate
458 retl
459 nop
460
461 .globl restore_alternate_globals
462 restore_alternate_globals: /* %o0 = save_area */
463 rdpr %pstate, %o5
464 andn %o5, PSTATE_IE, %o1
465 wrpr %o1, PSTATE_AG, %pstate
466 ldx [%o0 + 0x00], %g0
467 ldx [%o0 + 0x08], %g1
468 ldx [%o0 + 0x10], %g2
469 ldx [%o0 + 0x18], %g3
470 ldx [%o0 + 0x20], %g4
471 ldx [%o0 + 0x28], %g5
472 ldx [%o0 + 0x30], %g6
473 ldx [%o0 + 0x38], %g7
474 wrpr %o1, PSTATE_IG, %pstate
475 ldx [%o0 + 0x40], %g0
476 ldx [%o0 + 0x48], %g1
477 ldx [%o0 + 0x50], %g2
478 ldx [%o0 + 0x58], %g3
479 ldx [%o0 + 0x60], %g4
480 ldx [%o0 + 0x68], %g5
481 ldx [%o0 + 0x70], %g6
482 ldx [%o0 + 0x78], %g7
483 wrpr %o1, PSTATE_MG, %pstate
484 ldx [%o0 + 0x80], %g0
485 ldx [%o0 + 0x88], %g1
486 ldx [%o0 + 0x90], %g2
487 ldx [%o0 + 0x98], %g3
488 ldx [%o0 + 0xa0], %g4
489 ldx [%o0 + 0xa8], %g5
490 ldx [%o0 + 0xb0], %g6
491 ldx [%o0 + 0xb8], %g7
492 wrpr %o5, 0x0, %pstate
493 retl
494 nop
495
496 .globl getcc, setcc
497 getcc:
498 ldx [%o0 + PT_V9_TSTATE], %o1
499 srlx %o1, 32, %o1
500 and %o1, 0xf, %o1
501 retl
502 stx %o1, [%o0 + PT_V9_G1]
503 setcc:
504 ldx [%o0 + PT_V9_TSTATE], %o1
505 ldx [%o0 + PT_V9_G1], %o2
506 or %g0, %ulo(TSTATE_ICC), %o3
507 sllx %o3, 32, %o3
508 andn %o1, %o3, %o1
509 sllx %o2, 32, %o2
510 and %o2, %o3, %o2
511 or %o1, %o2, %o1
512 retl
513 stx %o1, [%o0 + PT_V9_TSTATE]
514
515 .globl utrap, utrap_ill
516 utrap: brz,pn %g1, etrap
517 nop
518 save %sp, -128, %sp
519 rdpr %tstate, %l6
520 rdpr %cwp, %l7
521 andn %l6, TSTATE_CWP, %l6
522 wrpr %l6, %l7, %tstate
523 rdpr %tpc, %l6
524 rdpr %tnpc, %l7
525 wrpr %g1, 0, %tnpc
526 done
527 utrap_ill:
528 call bad_trap
529 add %sp, PTREGS_OFF, %o0
530 ba,pt %xcc, rtrap
531 clr %l6
532
533 /* XXX Here is stuff we still need to write... -DaveM XXX */
534 .globl netbsd_syscall
535 netbsd_syscall:
536 retl
537 nop
538
539 /* We need to carefully read the error status, ACK
540 * the errors, prevent recursive traps, and pass the
541 * information on to C code for logging.
542 *
543 * We pass the AFAR in as-is, and we encode the status
544 * information as described in asm-sparc64/sfafsr.h
545 */
546 .globl __spitfire_access_error
547 __spitfire_access_error:
548 /* Disable ESTATE error reporting so that we do not
549 * take recursive traps and RED state the processor.
550 */
551 stxa %g0, [%g0] ASI_ESTATE_ERROR_EN
552 membar #Sync
553
554 mov UDBE_UE, %g1
555 ldxa [%g0] ASI_AFSR, %g4 ! Get AFSR
556
557 /* __spitfire_cee_trap branches here with AFSR in %g4 and
558 * UDBE_CE in %g1. It only clears ESTATE_ERR_CE in the
559 * ESTATE Error Enable register.
560 */
561 __spitfire_cee_trap_continue:
562 ldxa [%g0] ASI_AFAR, %g5 ! Get AFAR
563
564 rdpr %tt, %g3
565 and %g3, 0x1ff, %g3 ! Paranoia
566 sllx %g3, SFSTAT_TRAP_TYPE_SHIFT, %g3
567 or %g4, %g3, %g4
568 rdpr %tl, %g3
569 cmp %g3, 1
570 mov 1, %g3
571 bleu %xcc, 1f
572 sllx %g3, SFSTAT_TL_GT_ONE_SHIFT, %g3
573
574 or %g4, %g3, %g4
575
576 /* Read in the UDB error register state, clearing the
577 * sticky error bits as-needed. We only clear them if
578 * the UE bit is set. Likewise, __spitfire_cee_trap
579 * below will only do so if the CE bit is set.
580 *
581 * NOTE: UltraSparc-I/II have high and low UDB error
582 * registers, corresponding to the two UDB units
583 * present on those chips. UltraSparc-IIi only
584 * has a single UDB, called "SDB" in the manual.
585 * For IIi the upper UDB register always reads
586 * as zero so for our purposes things will just
587 * work with the checks below.
588 */
589 1: ldxa [%g0] ASI_UDBH_ERROR_R, %g3
590 and %g3, 0x3ff, %g7 ! Paranoia
591 sllx %g7, SFSTAT_UDBH_SHIFT, %g7
592 or %g4, %g7, %g4
593 andcc %g3, %g1, %g3 ! UDBE_UE or UDBE_CE
594 be,pn %xcc, 1f
595 nop
596 stxa %g3, [%g0] ASI_UDB_ERROR_W
597 membar #Sync
598
599 1: mov 0x18, %g3
600 ldxa [%g3] ASI_UDBL_ERROR_R, %g3
601 and %g3, 0x3ff, %g7 ! Paranoia
602 sllx %g7, SFSTAT_UDBL_SHIFT, %g7
603 or %g4, %g7, %g4
604 andcc %g3, %g1, %g3 ! UDBE_UE or UDBE_CE
605 be,pn %xcc, 1f
606 nop
607 mov 0x18, %g7
608 stxa %g3, [%g7] ASI_UDB_ERROR_W
609 membar #Sync
610
611 1: /* Ok, now that we've latched the error state,
612 * clear the sticky bits in the AFSR.
613 */
614 stxa %g4, [%g0] ASI_AFSR
615 membar #Sync
616
617 rdpr %tl, %g2
618 cmp %g2, 1
619 rdpr %pil, %g2
620 bleu,pt %xcc, 1f
621 wrpr %g0, 15, %pil
622
623 ba,pt %xcc, etraptl1
624 rd %pc, %g7
625
626 ba,pt %xcc, 2f
627 nop
628
629 1: ba,pt %xcc, etrap_irq
630 rd %pc, %g7
631
632 2: mov %l4, %o1
633 mov %l5, %o2
634 call spitfire_access_error
635 add %sp, PTREGS_OFF, %o0
636 ba,pt %xcc, rtrap
637 clr %l6
638
639 /* This is the trap handler entry point for ECC correctable
640 * errors. They are corrected, but we listen for the trap
641 * so that the event can be logged.
642 *
643 * Disrupting errors are either:
644 * 1) single-bit ECC errors during UDB reads to system
645 * memory
646 * 2) data parity errors during write-back events
647 *
648 * As far as I can make out from the manual, the CEE trap
649 * is only for correctable errors during memory read
650 * accesses by the front-end of the processor.
651 *
652 * The code below is only for trap level 1 CEE events,
653 * as it is the only situation where we can safely record
654 * and log. For trap level >1 we just clear the CE bit
655 * in the AFSR and return.
656 *
657 * This is just like __spiftire_access_error above, but it
658 * specifically handles correctable errors. If an
659 * uncorrectable error is indicated in the AFSR we
660 * will branch directly above to __spitfire_access_error
661 * to handle it instead. Uncorrectable therefore takes
662 * priority over correctable, and the error logging
663 * C code will notice this case by inspecting the
664 * trap type.
665 */
666 .globl __spitfire_cee_trap
667 __spitfire_cee_trap:
668 ldxa [%g0] ASI_AFSR, %g4 ! Get AFSR
669 mov 1, %g3
670 sllx %g3, SFAFSR_UE_SHIFT, %g3
671 andcc %g4, %g3, %g0 ! Check for UE
672 bne,pn %xcc, __spitfire_access_error
673 nop
674
675 /* Ok, in this case we only have a correctable error.
676 * Indicate we only wish to capture that state in register
677 * %g1, and we only disable CE error reporting unlike UE
678 * handling which disables all errors.
679 */
680 ldxa [%g0] ASI_ESTATE_ERROR_EN, %g3
681 andn %g3, ESTATE_ERR_CE, %g3
682 stxa %g3, [%g0] ASI_ESTATE_ERROR_EN
683 membar #Sync
684
685 /* Preserve AFSR in %g4, indicate UDB state to capture in %g1 */
686 ba,pt %xcc, __spitfire_cee_trap_continue
687 mov UDBE_CE, %g1
688
689 .globl __spitfire_data_access_exception
690 .globl __spitfire_data_access_exception_tl1
691 __spitfire_data_access_exception_tl1:
692 rdpr %pstate, %g4
693 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
694 mov TLB_SFSR, %g3
695 mov DMMU_SFAR, %g5
696 ldxa [%g3] ASI_DMMU, %g4 ! Get SFSR
697 ldxa [%g5] ASI_DMMU, %g5 ! Get SFAR
698 stxa %g0, [%g3] ASI_DMMU ! Clear SFSR.FaultValid bit
699 membar #Sync
700 rdpr %tt, %g3
701 cmp %g3, 0x80 ! first win spill/fill trap
702 blu,pn %xcc, 1f
703 cmp %g3, 0xff ! last win spill/fill trap
704 bgu,pn %xcc, 1f
705 nop
706 ba,pt %xcc, winfix_dax
707 rdpr %tpc, %g3
708 1: sethi %hi(109f), %g7
709 ba,pt %xcc, etraptl1
710 109: or %g7, %lo(109b), %g7
711 mov %l4, %o1
712 mov %l5, %o2
713 call spitfire_data_access_exception_tl1
714 add %sp, PTREGS_OFF, %o0
715 ba,pt %xcc, rtrap
716 clr %l6
717
718 __spitfire_data_access_exception:
719 rdpr %pstate, %g4
720 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
721 mov TLB_SFSR, %g3
722 mov DMMU_SFAR, %g5
723 ldxa [%g3] ASI_DMMU, %g4 ! Get SFSR
724 ldxa [%g5] ASI_DMMU, %g5 ! Get SFAR
725 stxa %g0, [%g3] ASI_DMMU ! Clear SFSR.FaultValid bit
726 membar #Sync
727 sethi %hi(109f), %g7
728 ba,pt %xcc, etrap
729 109: or %g7, %lo(109b), %g7
730 mov %l4, %o1
731 mov %l5, %o2
732 call spitfire_data_access_exception
733 add %sp, PTREGS_OFF, %o0
734 ba,pt %xcc, rtrap
735 clr %l6
736
737 .globl __spitfire_insn_access_exception
738 .globl __spitfire_insn_access_exception_tl1
739 __spitfire_insn_access_exception_tl1:
740 rdpr %pstate, %g4
741 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
742 mov TLB_SFSR, %g3
743 ldxa [%g3] ASI_IMMU, %g4 ! Get SFSR
744 rdpr %tpc, %g5 ! IMMU has no SFAR, use TPC
745 stxa %g0, [%g3] ASI_IMMU ! Clear FaultValid bit
746 membar #Sync
747 sethi %hi(109f), %g7
748 ba,pt %xcc, etraptl1
749 109: or %g7, %lo(109b), %g7
750 mov %l4, %o1
751 mov %l5, %o2
752 call spitfire_insn_access_exception_tl1
753 add %sp, PTREGS_OFF, %o0
754 ba,pt %xcc, rtrap
755 clr %l6
756
757 __spitfire_insn_access_exception:
758 rdpr %pstate, %g4
759 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
760 mov TLB_SFSR, %g3
761 ldxa [%g3] ASI_IMMU, %g4 ! Get SFSR
762 rdpr %tpc, %g5 ! IMMU has no SFAR, use TPC
763 stxa %g0, [%g3] ASI_IMMU ! Clear FaultValid bit
764 membar #Sync
765 sethi %hi(109f), %g7
766 ba,pt %xcc, etrap
767 109: or %g7, %lo(109b), %g7
768 mov %l4, %o1
769 mov %l5, %o2
770 call spitfire_insn_access_exception
771 add %sp, PTREGS_OFF, %o0
772 ba,pt %xcc, rtrap
773 clr %l6
774
775 /* These get patched into the trap table at boot time
776 * once we know we have a cheetah processor.
777 */
778 .globl cheetah_fecc_trap_vector, cheetah_fecc_trap_vector_tl1
779 cheetah_fecc_trap_vector:
780 membar #Sync
781 ldxa [%g0] ASI_DCU_CONTROL_REG, %g1
782 andn %g1, DCU_DC | DCU_IC, %g1
783 stxa %g1, [%g0] ASI_DCU_CONTROL_REG
784 membar #Sync
785 sethi %hi(cheetah_fast_ecc), %g2
786 jmpl %g2 + %lo(cheetah_fast_ecc), %g0
787 mov 0, %g1
788 cheetah_fecc_trap_vector_tl1:
789 membar #Sync
790 ldxa [%g0] ASI_DCU_CONTROL_REG, %g1
791 andn %g1, DCU_DC | DCU_IC, %g1
792 stxa %g1, [%g0] ASI_DCU_CONTROL_REG
793 membar #Sync
794 sethi %hi(cheetah_fast_ecc), %g2
795 jmpl %g2 + %lo(cheetah_fast_ecc), %g0
796 mov 1, %g1
797 .globl cheetah_cee_trap_vector, cheetah_cee_trap_vector_tl1
798 cheetah_cee_trap_vector:
799 membar #Sync
800 ldxa [%g0] ASI_DCU_CONTROL_REG, %g1
801 andn %g1, DCU_IC, %g1
802 stxa %g1, [%g0] ASI_DCU_CONTROL_REG
803 membar #Sync
804 sethi %hi(cheetah_cee), %g2
805 jmpl %g2 + %lo(cheetah_cee), %g0
806 mov 0, %g1
807 cheetah_cee_trap_vector_tl1:
808 membar #Sync
809 ldxa [%g0] ASI_DCU_CONTROL_REG, %g1
810 andn %g1, DCU_IC, %g1
811 stxa %g1, [%g0] ASI_DCU_CONTROL_REG
812 membar #Sync
813 sethi %hi(cheetah_cee), %g2
814 jmpl %g2 + %lo(cheetah_cee), %g0
815 mov 1, %g1
816 .globl cheetah_deferred_trap_vector, cheetah_deferred_trap_vector_tl1
817 cheetah_deferred_trap_vector:
818 membar #Sync
819 ldxa [%g0] ASI_DCU_CONTROL_REG, %g1;
820 andn %g1, DCU_DC | DCU_IC, %g1;
821 stxa %g1, [%g0] ASI_DCU_CONTROL_REG;
822 membar #Sync;
823 sethi %hi(cheetah_deferred_trap), %g2
824 jmpl %g2 + %lo(cheetah_deferred_trap), %g0
825 mov 0, %g1
826 cheetah_deferred_trap_vector_tl1:
827 membar #Sync;
828 ldxa [%g0] ASI_DCU_CONTROL_REG, %g1;
829 andn %g1, DCU_DC | DCU_IC, %g1;
830 stxa %g1, [%g0] ASI_DCU_CONTROL_REG;
831 membar #Sync;
832 sethi %hi(cheetah_deferred_trap), %g2
833 jmpl %g2 + %lo(cheetah_deferred_trap), %g0
834 mov 1, %g1
835
836 /* Cheetah+ specific traps. These are for the new I/D cache parity
837 * error traps. The first argument to cheetah_plus_parity_handler
838 * is encoded as follows:
839 *
840 * Bit0: 0=dcache,1=icache
841 * Bit1: 0=recoverable,1=unrecoverable
842 */
843 .globl cheetah_plus_dcpe_trap_vector, cheetah_plus_dcpe_trap_vector_tl1
844 cheetah_plus_dcpe_trap_vector:
845 membar #Sync
846 sethi %hi(do_cheetah_plus_data_parity), %g7
847 jmpl %g7 + %lo(do_cheetah_plus_data_parity), %g0
848 nop
849 nop
850 nop
851 nop
852 nop
853
854 do_cheetah_plus_data_parity:
855 rdpr %pil, %g2
856 wrpr %g0, 15, %pil
857 ba,pt %xcc, etrap_irq
858 rd %pc, %g7
859 mov 0x0, %o0
860 call cheetah_plus_parity_error
861 add %sp, PTREGS_OFF, %o1
862 ba,a,pt %xcc, rtrap_irq
863
864 cheetah_plus_dcpe_trap_vector_tl1:
865 membar #Sync
866 wrpr PSTATE_IG | PSTATE_PEF | PSTATE_PRIV, %pstate
867 sethi %hi(do_dcpe_tl1), %g3
868 jmpl %g3 + %lo(do_dcpe_tl1), %g0
869 nop
870 nop
871 nop
872 nop
873
874 .globl cheetah_plus_icpe_trap_vector, cheetah_plus_icpe_trap_vector_tl1
875 cheetah_plus_icpe_trap_vector:
876 membar #Sync
877 sethi %hi(do_cheetah_plus_insn_parity), %g7
878 jmpl %g7 + %lo(do_cheetah_plus_insn_parity), %g0
879 nop
880 nop
881 nop
882 nop
883 nop
884
885 do_cheetah_plus_insn_parity:
886 rdpr %pil, %g2
887 wrpr %g0, 15, %pil
888 ba,pt %xcc, etrap_irq
889 rd %pc, %g7
890 mov 0x1, %o0
891 call cheetah_plus_parity_error
892 add %sp, PTREGS_OFF, %o1
893 ba,a,pt %xcc, rtrap_irq
894
895 cheetah_plus_icpe_trap_vector_tl1:
896 membar #Sync
897 wrpr PSTATE_IG | PSTATE_PEF | PSTATE_PRIV, %pstate
898 sethi %hi(do_icpe_tl1), %g3
899 jmpl %g3 + %lo(do_icpe_tl1), %g0
900 nop
901 nop
902 nop
903 nop
904
905 /* If we take one of these traps when tl >= 1, then we
906 * jump to interrupt globals. If some trap level above us
907 * was also using interrupt globals, we cannot recover.
908 * We may use all interrupt global registers except %g6.
909 */
910 .globl do_dcpe_tl1, do_icpe_tl1
911 do_dcpe_tl1:
912 rdpr %tl, %g1 ! Save original trap level
913 mov 1, %g2 ! Setup TSTATE checking loop
914 sethi %hi(TSTATE_IG), %g3 ! TSTATE mask bit
915 1: wrpr %g2, %tl ! Set trap level to check
916 rdpr %tstate, %g4 ! Read TSTATE for this level
917 andcc %g4, %g3, %g0 ! Interrupt globals in use?
918 bne,a,pn %xcc, do_dcpe_tl1_fatal ! Yep, irrecoverable
919 wrpr %g1, %tl ! Restore original trap level
920 add %g2, 1, %g2 ! Next trap level
921 cmp %g2, %g1 ! Hit them all yet?
922 ble,pt %icc, 1b ! Not yet
923 nop
924 wrpr %g1, %tl ! Restore original trap level
925 do_dcpe_tl1_nonfatal: /* Ok we may use interrupt globals safely. */
926 sethi %hi(dcache_parity_tl1_occurred), %g2
927 lduw [%g2 + %lo(dcache_parity_tl1_occurred)], %g1
928 add %g1, 1, %g1
929 stw %g1, [%g2 + %lo(dcache_parity_tl1_occurred)]
930 /* Reset D-cache parity */
931 sethi %hi(1 << 16), %g1 ! D-cache size
932 mov (1 << 5), %g2 ! D-cache line size
933 sub %g1, %g2, %g1 ! Move down 1 cacheline
934 1: srl %g1, 14, %g3 ! Compute UTAG
935 membar #Sync
936 stxa %g3, [%g1] ASI_DCACHE_UTAG
937 membar #Sync
938 sub %g2, 8, %g3 ! 64-bit data word within line
939 2: membar #Sync
940 stxa %g0, [%g1 + %g3] ASI_DCACHE_DATA
941 membar #Sync
942 subcc %g3, 8, %g3 ! Next 64-bit data word
943 bge,pt %icc, 2b
944 nop
945 subcc %g1, %g2, %g1 ! Next cacheline
946 bge,pt %icc, 1b
947 nop
948 ba,pt %xcc, dcpe_icpe_tl1_common
949 nop
950
951 do_dcpe_tl1_fatal:
952 sethi %hi(1f), %g7
953 ba,pt %xcc, etraptl1
954 1: or %g7, %lo(1b), %g7
955 mov 0x2, %o0
956 call cheetah_plus_parity_error
957 add %sp, PTREGS_OFF, %o1
958 ba,pt %xcc, rtrap
959 clr %l6
960
961 do_icpe_tl1:
962 rdpr %tl, %g1 ! Save original trap level
963 mov 1, %g2 ! Setup TSTATE checking loop
964 sethi %hi(TSTATE_IG), %g3 ! TSTATE mask bit
965 1: wrpr %g2, %tl ! Set trap level to check
966 rdpr %tstate, %g4 ! Read TSTATE for this level
967 andcc %g4, %g3, %g0 ! Interrupt globals in use?
968 bne,a,pn %xcc, do_icpe_tl1_fatal ! Yep, irrecoverable
969 wrpr %g1, %tl ! Restore original trap level
970 add %g2, 1, %g2 ! Next trap level
971 cmp %g2, %g1 ! Hit them all yet?
972 ble,pt %icc, 1b ! Not yet
973 nop
974 wrpr %g1, %tl ! Restore original trap level
975 do_icpe_tl1_nonfatal: /* Ok we may use interrupt globals safely. */
976 sethi %hi(icache_parity_tl1_occurred), %g2
977 lduw [%g2 + %lo(icache_parity_tl1_occurred)], %g1
978 add %g1, 1, %g1
979 stw %g1, [%g2 + %lo(icache_parity_tl1_occurred)]
980 /* Flush I-cache */
981 sethi %hi(1 << 15), %g1 ! I-cache size
982 mov (1 << 5), %g2 ! I-cache line size
983 sub %g1, %g2, %g1
984 1: or %g1, (2 << 3), %g3
985 stxa %g0, [%g3] ASI_IC_TAG
986 membar #Sync
987 subcc %g1, %g2, %g1
988 bge,pt %icc, 1b
989 nop
990 ba,pt %xcc, dcpe_icpe_tl1_common
991 nop
992
993 do_icpe_tl1_fatal:
994 sethi %hi(1f), %g7
995 ba,pt %xcc, etraptl1
996 1: or %g7, %lo(1b), %g7
997 mov 0x3, %o0
998 call cheetah_plus_parity_error
999 add %sp, PTREGS_OFF, %o1
1000 ba,pt %xcc, rtrap
1001 clr %l6
1002
1003 dcpe_icpe_tl1_common:
1004 /* Flush D-cache, re-enable D/I caches in DCU and finally
1005 * retry the trapping instruction.
1006 */
1007 sethi %hi(1 << 16), %g1 ! D-cache size
1008 mov (1 << 5), %g2 ! D-cache line size
1009 sub %g1, %g2, %g1
1010 1: stxa %g0, [%g1] ASI_DCACHE_TAG
1011 membar #Sync
1012 subcc %g1, %g2, %g1
1013 bge,pt %icc, 1b
1014 nop
1015 ldxa [%g0] ASI_DCU_CONTROL_REG, %g1
1016 or %g1, (DCU_DC | DCU_IC), %g1
1017 stxa %g1, [%g0] ASI_DCU_CONTROL_REG
1018 membar #Sync
1019 retry
1020
1021 /* Capture I/D/E-cache state into per-cpu error scoreboard.
1022 *
1023 * %g1: (TL>=0) ? 1 : 0
1024 * %g2: scratch
1025 * %g3: scratch
1026 * %g4: AFSR
1027 * %g5: AFAR
1028 * %g6: current thread ptr
1029 * %g7: scratch
1030 */
1031 __cheetah_log_error:
1032 /* Put "TL1" software bit into AFSR. */
1033 and %g1, 0x1, %g1
1034 sllx %g1, 63, %g2
1035 or %g4, %g2, %g4
1036
1037 /* Get log entry pointer for this cpu at this trap level. */
1038 BRANCH_IF_JALAPENO(g2,g3,50f)
1039 ldxa [%g0] ASI_SAFARI_CONFIG, %g2
1040 srlx %g2, 17, %g2
1041 ba,pt %xcc, 60f
1042 and %g2, 0x3ff, %g2
1043
1044 50: ldxa [%g0] ASI_JBUS_CONFIG, %g2
1045 srlx %g2, 17, %g2
1046 and %g2, 0x1f, %g2
1047
1048 60: sllx %g2, 9, %g2
1049 sethi %hi(cheetah_error_log), %g3
1050 ldx [%g3 + %lo(cheetah_error_log)], %g3
1051 brz,pn %g3, 80f
1052 nop
1053
1054 add %g3, %g2, %g3
1055 sllx %g1, 8, %g1
1056 add %g3, %g1, %g1
1057
1058 /* %g1 holds pointer to the top of the logging scoreboard */
1059 ldx [%g1 + 0x0], %g7
1060 cmp %g7, -1
1061 bne,pn %xcc, 80f
1062 nop
1063
1064 stx %g4, [%g1 + 0x0]
1065 stx %g5, [%g1 + 0x8]
1066 add %g1, 0x10, %g1
1067
1068 /* %g1 now points to D-cache logging area */
1069 set 0x3ff8, %g2 /* DC_addr mask */
1070 and %g5, %g2, %g2 /* DC_addr bits of AFAR */
1071 srlx %g5, 12, %g3
1072 or %g3, 1, %g3 /* PHYS tag + valid */
1073
1074 10: ldxa [%g2] ASI_DCACHE_TAG, %g7
1075 cmp %g3, %g7 /* TAG match? */
1076 bne,pt %xcc, 13f
1077 nop
1078
1079 /* Yep, what we want, capture state. */
1080 stx %g2, [%g1 + 0x20]
1081 stx %g7, [%g1 + 0x28]
1082
1083 /* A membar Sync is required before and after utag access. */
1084 membar #Sync
1085 ldxa [%g2] ASI_DCACHE_UTAG, %g7
1086 membar #Sync
1087 stx %g7, [%g1 + 0x30]
1088 ldxa [%g2] ASI_DCACHE_SNOOP_TAG, %g7
1089 stx %g7, [%g1 + 0x38]
1090 clr %g3
1091
1092 12: ldxa [%g2 + %g3] ASI_DCACHE_DATA, %g7
1093 stx %g7, [%g1]
1094 add %g3, (1 << 5), %g3
1095 cmp %g3, (4 << 5)
1096 bl,pt %xcc, 12b
1097 add %g1, 0x8, %g1
1098
1099 ba,pt %xcc, 20f
1100 add %g1, 0x20, %g1
1101
1102 13: sethi %hi(1 << 14), %g7
1103 add %g2, %g7, %g2
1104 srlx %g2, 14, %g7
1105 cmp %g7, 4
1106 bl,pt %xcc, 10b
1107 nop
1108
1109 add %g1, 0x40, %g1
1110
1111 /* %g1 now points to I-cache logging area */
1112 20: set 0x1fe0, %g2 /* IC_addr mask */
1113 and %g5, %g2, %g2 /* IC_addr bits of AFAR */
1114 sllx %g2, 1, %g2 /* IC_addr[13:6]==VA[12:5] */
1115 srlx %g5, (13 - 8), %g3 /* Make PTAG */
1116 andn %g3, 0xff, %g3 /* Mask off undefined bits */
1117
1118 21: ldxa [%g2] ASI_IC_TAG, %g7
1119 andn %g7, 0xff, %g7
1120 cmp %g3, %g7
1121 bne,pt %xcc, 23f
1122 nop
1123
1124 /* Yep, what we want, capture state. */
1125 stx %g2, [%g1 + 0x40]
1126 stx %g7, [%g1 + 0x48]
1127 add %g2, (1 << 3), %g2
1128 ldxa [%g2] ASI_IC_TAG, %g7
1129 add %g2, (1 << 3), %g2
1130 stx %g7, [%g1 + 0x50]
1131 ldxa [%g2] ASI_IC_TAG, %g7
1132 add %g2, (1 << 3), %g2
1133 stx %g7, [%g1 + 0x60]
1134 ldxa [%g2] ASI_IC_TAG, %g7
1135 stx %g7, [%g1 + 0x68]
1136 sub %g2, (3 << 3), %g2
1137 ldxa [%g2] ASI_IC_STAG, %g7
1138 stx %g7, [%g1 + 0x58]
1139 clr %g3
1140 srlx %g2, 2, %g2
1141
1142 22: ldxa [%g2 + %g3] ASI_IC_INSTR, %g7
1143 stx %g7, [%g1]
1144 add %g3, (1 << 3), %g3
1145 cmp %g3, (8 << 3)
1146 bl,pt %xcc, 22b
1147 add %g1, 0x8, %g1
1148
1149 ba,pt %xcc, 30f
1150 add %g1, 0x30, %g1
1151
1152 23: sethi %hi(1 << 14), %g7
1153 add %g2, %g7, %g2
1154 srlx %g2, 14, %g7
1155 cmp %g7, 4
1156 bl,pt %xcc, 21b
1157 nop
1158
1159 add %g1, 0x70, %g1
1160
1161 /* %g1 now points to E-cache logging area */
1162 30: andn %g5, (32 - 1), %g2
1163 stx %g2, [%g1 + 0x20]
1164 ldxa [%g2] ASI_EC_TAG_DATA, %g7
1165 stx %g7, [%g1 + 0x28]
1166 ldxa [%g2] ASI_EC_R, %g0
1167 clr %g3
1168
1169 31: ldxa [%g3] ASI_EC_DATA, %g7
1170 stx %g7, [%g1 + %g3]
1171 add %g3, 0x8, %g3
1172 cmp %g3, 0x20
1173
1174 bl,pt %xcc, 31b
1175 nop
1176 80:
1177 rdpr %tt, %g2
1178 cmp %g2, 0x70
1179 be c_fast_ecc
1180 cmp %g2, 0x63
1181 be c_cee
1182 nop
1183 ba,pt %xcc, c_deferred
1184
1185 /* Cheetah FECC trap handling, we get here from tl{0,1}_fecc
1186 * in the trap table. That code has done a memory barrier
1187 * and has disabled both the I-cache and D-cache in the DCU
1188 * control register. The I-cache is disabled so that we may
1189 * capture the corrupted cache line, and the D-cache is disabled
1190 * because corrupt data may have been placed there and we don't
1191 * want to reference it.
1192 *
1193 * %g1 is one if this trap occurred at %tl >= 1.
1194 *
1195 * Next, we turn off error reporting so that we don't recurse.
1196 */
1197 .globl cheetah_fast_ecc
1198 cheetah_fast_ecc:
1199 ldxa [%g0] ASI_ESTATE_ERROR_EN, %g2
1200 andn %g2, ESTATE_ERROR_NCEEN | ESTATE_ERROR_CEEN, %g2
1201 stxa %g2, [%g0] ASI_ESTATE_ERROR_EN
1202 membar #Sync
1203
1204 /* Fetch and clear AFSR/AFAR */
1205 ldxa [%g0] ASI_AFSR, %g4
1206 ldxa [%g0] ASI_AFAR, %g5
1207 stxa %g4, [%g0] ASI_AFSR
1208 membar #Sync
1209
1210 ba,pt %xcc, __cheetah_log_error
1211 nop
1212
1213 c_fast_ecc:
1214 rdpr %pil, %g2
1215 wrpr %g0, 15, %pil
1216 ba,pt %xcc, etrap_irq
1217 rd %pc, %g7
1218 mov %l4, %o1
1219 mov %l5, %o2
1220 call cheetah_fecc_handler
1221 add %sp, PTREGS_OFF, %o0
1222 ba,a,pt %xcc, rtrap_irq
1223
1224 /* Our caller has disabled I-cache and performed membar Sync. */
1225 .globl cheetah_cee
1226 cheetah_cee:
1227 ldxa [%g0] ASI_ESTATE_ERROR_EN, %g2
1228 andn %g2, ESTATE_ERROR_CEEN, %g2
1229 stxa %g2, [%g0] ASI_ESTATE_ERROR_EN
1230 membar #Sync
1231
1232 /* Fetch and clear AFSR/AFAR */
1233 ldxa [%g0] ASI_AFSR, %g4
1234 ldxa [%g0] ASI_AFAR, %g5
1235 stxa %g4, [%g0] ASI_AFSR
1236 membar #Sync
1237
1238 ba,pt %xcc, __cheetah_log_error
1239 nop
1240
1241 c_cee:
1242 rdpr %pil, %g2
1243 wrpr %g0, 15, %pil
1244 ba,pt %xcc, etrap_irq
1245 rd %pc, %g7
1246 mov %l4, %o1
1247 mov %l5, %o2
1248 call cheetah_cee_handler
1249 add %sp, PTREGS_OFF, %o0
1250 ba,a,pt %xcc, rtrap_irq
1251
1252 /* Our caller has disabled I-cache+D-cache and performed membar Sync. */
1253 .globl cheetah_deferred_trap
1254 cheetah_deferred_trap:
1255 ldxa [%g0] ASI_ESTATE_ERROR_EN, %g2
1256 andn %g2, ESTATE_ERROR_NCEEN | ESTATE_ERROR_CEEN, %g2
1257 stxa %g2, [%g0] ASI_ESTATE_ERROR_EN
1258 membar #Sync
1259
1260 /* Fetch and clear AFSR/AFAR */
1261 ldxa [%g0] ASI_AFSR, %g4
1262 ldxa [%g0] ASI_AFAR, %g5
1263 stxa %g4, [%g0] ASI_AFSR
1264 membar #Sync
1265
1266 ba,pt %xcc, __cheetah_log_error
1267 nop
1268
1269 c_deferred:
1270 rdpr %pil, %g2
1271 wrpr %g0, 15, %pil
1272 ba,pt %xcc, etrap_irq
1273 rd %pc, %g7
1274 mov %l4, %o1
1275 mov %l5, %o2
1276 call cheetah_deferred_handler
1277 add %sp, PTREGS_OFF, %o0
1278 ba,a,pt %xcc, rtrap_irq
1279
1280 .globl __do_privact
1281 __do_privact:
1282 mov TLB_SFSR, %g3
1283 stxa %g0, [%g3] ASI_DMMU ! Clear FaultValid bit
1284 membar #Sync
1285 sethi %hi(109f), %g7
1286 ba,pt %xcc, etrap
1287 109: or %g7, %lo(109b), %g7
1288 call do_privact
1289 add %sp, PTREGS_OFF, %o0
1290 ba,pt %xcc, rtrap
1291 clr %l6
1292
1293 .globl do_mna
1294 do_mna:
1295 rdpr %tl, %g3
1296 cmp %g3, 1
1297
1298 /* Setup %g4/%g5 now as they are used in the
1299 * winfixup code.
1300 */
1301 mov TLB_SFSR, %g3
1302 mov DMMU_SFAR, %g4
1303 ldxa [%g4] ASI_DMMU, %g4
1304 ldxa [%g3] ASI_DMMU, %g5
1305 stxa %g0, [%g3] ASI_DMMU ! Clear FaultValid bit
1306 membar #Sync
1307 bgu,pn %icc, winfix_mna
1308 rdpr %tpc, %g3
1309
1310 1: sethi %hi(109f), %g7
1311 ba,pt %xcc, etrap
1312 109: or %g7, %lo(109b), %g7
1313 mov %l4, %o1
1314 mov %l5, %o2
1315 call mem_address_unaligned
1316 add %sp, PTREGS_OFF, %o0
1317 ba,pt %xcc, rtrap
1318 clr %l6
1319
1320 .globl do_lddfmna
1321 do_lddfmna:
1322 sethi %hi(109f), %g7
1323 mov TLB_SFSR, %g4
1324 ldxa [%g4] ASI_DMMU, %g5
1325 stxa %g0, [%g4] ASI_DMMU ! Clear FaultValid bit
1326 membar #Sync
1327 mov DMMU_SFAR, %g4
1328 ldxa [%g4] ASI_DMMU, %g4
1329 ba,pt %xcc, etrap
1330 109: or %g7, %lo(109b), %g7
1331 mov %l4, %o1
1332 mov %l5, %o2
1333 call handle_lddfmna
1334 add %sp, PTREGS_OFF, %o0
1335 ba,pt %xcc, rtrap
1336 clr %l6
1337
1338 .globl do_stdfmna
1339 do_stdfmna:
1340 sethi %hi(109f), %g7
1341 mov TLB_SFSR, %g4
1342 ldxa [%g4] ASI_DMMU, %g5
1343 stxa %g0, [%g4] ASI_DMMU ! Clear FaultValid bit
1344 membar #Sync
1345 mov DMMU_SFAR, %g4
1346 ldxa [%g4] ASI_DMMU, %g4
1347 ba,pt %xcc, etrap
1348 109: or %g7, %lo(109b), %g7
1349 mov %l4, %o1
1350 mov %l5, %o2
1351 call handle_stdfmna
1352 add %sp, PTREGS_OFF, %o0
1353 ba,pt %xcc, rtrap
1354 clr %l6
1355
1356 .globl breakpoint_trap
1357 breakpoint_trap:
1358 call sparc_breakpoint
1359 add %sp, PTREGS_OFF, %o0
1360 ba,pt %xcc, rtrap
1361 nop
1362
1363 #if defined(CONFIG_SUNOS_EMUL) || defined(CONFIG_SOLARIS_EMUL) || \
1364 defined(CONFIG_SOLARIS_EMUL_MODULE)
1365 /* SunOS uses syscall zero as the 'indirect syscall' it looks
1366 * like indir_syscall(scall_num, arg0, arg1, arg2...); etc.
1367 * This is complete brain damage.
1368 */
1369 .globl sunos_indir
1370 sunos_indir:
1371 srl %o0, 0, %o0
1372 mov %o7, %l4
1373 cmp %o0, NR_SYSCALLS
1374 blu,a,pt %icc, 1f
1375 sll %o0, 0x2, %o0
1376 sethi %hi(sunos_nosys), %l6
1377 b,pt %xcc, 2f
1378 or %l6, %lo(sunos_nosys), %l6
1379 1: sethi %hi(sunos_sys_table), %l7
1380 or %l7, %lo(sunos_sys_table), %l7
1381 lduw [%l7 + %o0], %l6
1382 2: mov %o1, %o0
1383 mov %o2, %o1
1384 mov %o3, %o2
1385 mov %o4, %o3
1386 mov %o5, %o4
1387 call %l6
1388 mov %l4, %o7
1389
1390 .globl sunos_getpid
1391 sunos_getpid:
1392 call sys_getppid
1393 nop
1394 call sys_getpid
1395 stx %o0, [%sp + PTREGS_OFF + PT_V9_I1]
1396 b,pt %xcc, ret_sys_call
1397 stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
1398
1399 /* SunOS getuid() returns uid in %o0 and euid in %o1 */
1400 .globl sunos_getuid
1401 sunos_getuid:
1402 call sys32_geteuid16
1403 nop
1404 call sys32_getuid16
1405 stx %o0, [%sp + PTREGS_OFF + PT_V9_I1]
1406 b,pt %xcc, ret_sys_call
1407 stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
1408
1409 /* SunOS getgid() returns gid in %o0 and egid in %o1 */
1410 .globl sunos_getgid
1411 sunos_getgid:
1412 call sys32_getegid16
1413 nop
1414 call sys32_getgid16
1415 stx %o0, [%sp + PTREGS_OFF + PT_V9_I1]
1416 b,pt %xcc, ret_sys_call
1417 stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
1418 #endif
1419
1420 /* SunOS's execv() call only specifies the argv argument, the
1421 * environment settings are the same as the calling processes.
1422 */
1423 .globl sunos_execv
1424 sys_execve:
1425 sethi %hi(sparc_execve), %g1
1426 ba,pt %xcc, execve_merge
1427 or %g1, %lo(sparc_execve), %g1
1428 #ifdef CONFIG_COMPAT
1429 .globl sys_execve
1430 sunos_execv:
1431 stx %g0, [%sp + PTREGS_OFF + PT_V9_I2]
1432 .globl sys32_execve
1433 sys32_execve:
1434 sethi %hi(sparc32_execve), %g1
1435 or %g1, %lo(sparc32_execve), %g1
1436 #endif
1437 execve_merge:
1438 flushw
1439 jmpl %g1, %g0
1440 add %sp, PTREGS_OFF, %o0
1441
1442 .globl sys_pipe, sys_sigpause, sys_nis_syscall
1443 .globl sys_sigsuspend, sys_rt_sigsuspend
1444 .globl sys_rt_sigreturn
1445 .globl sys_ptrace
1446 .globl sys_sigaltstack
1447 .align 32
1448 sys_pipe: ba,pt %xcc, sparc_pipe
1449 add %sp, PTREGS_OFF, %o0
1450 sys_nis_syscall:ba,pt %xcc, c_sys_nis_syscall
1451 add %sp, PTREGS_OFF, %o0
1452 sys_memory_ordering:
1453 ba,pt %xcc, sparc_memory_ordering
1454 add %sp, PTREGS_OFF, %o1
1455 sys_sigaltstack:ba,pt %xcc, do_sigaltstack
1456 add %i6, STACK_BIAS, %o2
1457 #ifdef CONFIG_COMPAT
1458 .globl sys32_sigstack
1459 sys32_sigstack: ba,pt %xcc, do_sys32_sigstack
1460 mov %i6, %o2
1461 .globl sys32_sigaltstack
1462 sys32_sigaltstack:
1463 ba,pt %xcc, do_sys32_sigaltstack
1464 mov %i6, %o2
1465 #endif
1466 .align 32
1467 sys_sigsuspend: add %sp, PTREGS_OFF, %o0
1468 call do_sigsuspend
1469 add %o7, 1f-.-4, %o7
1470 nop
1471 sys_rt_sigsuspend: /* NOTE: %o0,%o1 have a correct value already */
1472 add %sp, PTREGS_OFF, %o2
1473 call do_rt_sigsuspend
1474 add %o7, 1f-.-4, %o7
1475 nop
1476 #ifdef CONFIG_COMPAT
1477 .globl sys32_rt_sigsuspend
1478 sys32_rt_sigsuspend: /* NOTE: %o0,%o1 have a correct value already */
1479 srl %o0, 0, %o0
1480 add %sp, PTREGS_OFF, %o2
1481 call do_rt_sigsuspend32
1482 add %o7, 1f-.-4, %o7
1483 #endif
1484 /* NOTE: %o0 has a correct value already */
1485 sys_sigpause: add %sp, PTREGS_OFF, %o1
1486 call do_sigpause
1487 add %o7, 1f-.-4, %o7
1488 nop
1489 #ifdef CONFIG_COMPAT
1490 .globl sys32_sigreturn
1491 sys32_sigreturn:
1492 add %sp, PTREGS_OFF, %o0
1493 call do_sigreturn32
1494 add %o7, 1f-.-4, %o7
1495 nop
1496 #endif
1497 sys_rt_sigreturn:
1498 add %sp, PTREGS_OFF, %o0
1499 call do_rt_sigreturn
1500 add %o7, 1f-.-4, %o7
1501 nop
1502 #ifdef CONFIG_COMPAT
1503 .globl sys32_rt_sigreturn
1504 sys32_rt_sigreturn:
1505 add %sp, PTREGS_OFF, %o0
1506 call do_rt_sigreturn32
1507 add %o7, 1f-.-4, %o7
1508 nop
1509 #endif
1510 sys_ptrace: add %sp, PTREGS_OFF, %o0
1511 call do_ptrace
1512 add %o7, 1f-.-4, %o7
1513 nop
1514 .align 32
1515 1: ldx [%curptr + TI_FLAGS], %l5
1516 andcc %l5, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT), %g0
1517 be,pt %icc, rtrap
1518 clr %l6
1519 add %sp, PTREGS_OFF, %o0
1520 call syscall_trace
1521 mov 1, %o1
1522
1523 ba,pt %xcc, rtrap
1524 clr %l6
1525
1526 /* This is how fork() was meant to be done, 8 instruction entry.
1527 *
1528 * I questioned the following code briefly, let me clear things
1529 * up so you must not reason on it like I did.
1530 *
1531 * Know the fork_kpsr etc. we use in the sparc32 port? We don't
1532 * need it here because the only piece of window state we copy to
1533 * the child is the CWP register. Even if the parent sleeps,
1534 * we are safe because we stuck it into pt_regs of the parent
1535 * so it will not change.
1536 *
1537 * XXX This raises the question, whether we can do the same on
1538 * XXX sparc32 to get rid of fork_kpsr _and_ fork_kwim. The
1539 * XXX answer is yes. We stick fork_kpsr in UREG_G0 and
1540 * XXX fork_kwim in UREG_G1 (global registers are considered
1541 * XXX volatile across a system call in the sparc ABI I think
1542 * XXX if it isn't we can use regs->y instead, anyone who depends
1543 * XXX upon the Y register being preserved across a fork deserves
1544 * XXX to lose).
1545 *
1546 * In fact we should take advantage of that fact for other things
1547 * during system calls...
1548 */
1549 .globl sys_fork, sys_vfork, sys_clone, sparc_exit
1550 .globl ret_from_syscall
1551 .align 32
1552 sys_vfork: /* Under Linux, vfork and fork are just special cases of clone. */
1553 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
1554 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
1555 ba,pt %xcc, sys_clone
1556 sys_fork: clr %o1
1557 mov SIGCHLD, %o0
1558 sys_clone: flushw
1559 movrz %o1, %fp, %o1
1560 mov 0, %o3
1561 ba,pt %xcc, sparc_do_fork
1562 add %sp, PTREGS_OFF, %o2
1563 ret_from_syscall:
1564 /* Clear current_thread_info()->new_child, and
1565 * check performance counter stuff too.
1566 */
1567 stb %g0, [%g6 + TI_NEW_CHILD]
1568 ldx [%g6 + TI_FLAGS], %l0
1569 call schedule_tail
1570 mov %g7, %o0
1571 andcc %l0, _TIF_PERFCTR, %g0
1572 be,pt %icc, 1f
1573 nop
1574 ldx [%g6 + TI_PCR], %o7
1575 wr %g0, %o7, %pcr
1576
1577 /* Blackbird errata workaround. See commentary in
1578 * smp.c:smp_percpu_timer_interrupt() for more
1579 * information.
1580 */
1581 ba,pt %xcc, 99f
1582 nop
1583 .align 64
1584 99: wr %g0, %g0, %pic
1585 rd %pic, %g0
1586
1587 1: b,pt %xcc, ret_sys_call
1588 ldx [%sp + PTREGS_OFF + PT_V9_I0], %o0
1589 sparc_exit: wrpr %g0, (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV), %pstate
1590 rdpr %otherwin, %g1
1591 rdpr %cansave, %g3
1592 add %g3, %g1, %g3
1593 wrpr %g3, 0x0, %cansave
1594 wrpr %g0, 0x0, %otherwin
1595 wrpr %g0, (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE), %pstate
1596 ba,pt %xcc, sys_exit
1597 stb %g0, [%g6 + TI_WSAVED]
1598
1599 linux_sparc_ni_syscall:
1600 sethi %hi(sys_ni_syscall), %l7
1601 b,pt %xcc, 4f
1602 or %l7, %lo(sys_ni_syscall), %l7
1603
1604 linux_syscall_trace32:
1605 add %sp, PTREGS_OFF, %o0
1606 call syscall_trace
1607 clr %o1
1608 srl %i0, 0, %o0
1609 srl %i4, 0, %o4
1610 srl %i1, 0, %o1
1611 srl %i2, 0, %o2
1612 b,pt %xcc, 2f
1613 srl %i3, 0, %o3
1614
1615 linux_syscall_trace:
1616 add %sp, PTREGS_OFF, %o0
1617 call syscall_trace
1618 clr %o1
1619 mov %i0, %o0
1620 mov %i1, %o1
1621 mov %i2, %o2
1622 mov %i3, %o3
1623 b,pt %xcc, 2f
1624 mov %i4, %o4
1625
1626
1627 /* Linux 32-bit and SunOS system calls enter here... */
1628 .align 32
1629 .globl linux_sparc_syscall32
1630 linux_sparc_syscall32:
1631 /* Direct access to user regs, much faster. */
1632 cmp %g1, NR_SYSCALLS ! IEU1 Group
1633 bgeu,pn %xcc, linux_sparc_ni_syscall ! CTI
1634 srl %i0, 0, %o0 ! IEU0
1635 sll %g1, 2, %l4 ! IEU0 Group
1636 srl %i4, 0, %o4 ! IEU1
1637 lduw [%l7 + %l4], %l7 ! Load
1638 srl %i1, 0, %o1 ! IEU0 Group
1639 ldx [%curptr + TI_FLAGS], %l0 ! Load
1640
1641 srl %i5, 0, %o5 ! IEU1
1642 srl %i2, 0, %o2 ! IEU0 Group
1643 andcc %l0, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT), %g0
1644 bne,pn %icc, linux_syscall_trace32 ! CTI
1645 mov %i0, %l5 ! IEU1
1646 call %l7 ! CTI Group brk forced
1647 srl %i3, 0, %o3 ! IEU0
1648 ba,a,pt %xcc, 3f
1649
1650 /* Linux native and SunOS system calls enter here... */
1651 .align 32
1652 .globl linux_sparc_syscall, ret_sys_call
1653 linux_sparc_syscall:
1654 /* Direct access to user regs, much faster. */
1655 cmp %g1, NR_SYSCALLS ! IEU1 Group
1656 bgeu,pn %xcc, linux_sparc_ni_syscall ! CTI
1657 mov %i0, %o0 ! IEU0
1658 sll %g1, 2, %l4 ! IEU0 Group
1659 mov %i1, %o1 ! IEU1
1660 lduw [%l7 + %l4], %l7 ! Load
1661 4: mov %i2, %o2 ! IEU0 Group
1662 ldx [%curptr + TI_FLAGS], %l0 ! Load
1663
1664 mov %i3, %o3 ! IEU1
1665 mov %i4, %o4 ! IEU0 Group
1666 andcc %l0, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT), %g0
1667 bne,pn %icc, linux_syscall_trace ! CTI Group
1668 mov %i0, %l5 ! IEU0
1669 2: call %l7 ! CTI Group brk forced
1670 mov %i5, %o5 ! IEU0
1671 nop
1672
1673 3: stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
1674 ret_sys_call:
1675 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %g3
1676 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc
1677 sra %o0, 0, %o0
1678 mov %ulo(TSTATE_XCARRY | TSTATE_ICARRY), %g2
1679 sllx %g2, 32, %g2
1680
1681 /* Check if force_successful_syscall_return()
1682 * was invoked.
1683 */
1684 ldub [%curptr + TI_SYS_NOERROR], %l0
1685 brz,pt %l0, 1f
1686 nop
1687 ba,pt %xcc, 80f
1688 stb %g0, [%curptr + TI_SYS_NOERROR]
1689
1690 1:
1691 cmp %o0, -ERESTART_RESTARTBLOCK
1692 bgeu,pn %xcc, 1f
1693 andcc %l0, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT), %l6
1694 80:
1695 /* System call success, clear Carry condition code. */
1696 andn %g3, %g2, %g3
1697 stx %g3, [%sp + PTREGS_OFF + PT_V9_TSTATE]
1698 bne,pn %icc, linux_syscall_trace2
1699 add %l1, 0x4, %l2 ! npc = npc+4
1700 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
1701 ba,pt %xcc, rtrap_clr_l6
1702 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
1703
1704 1:
1705 /* System call failure, set Carry condition code.
1706 * Also, get abs(errno) to return to the process.
1707 */
1708 andcc %l0, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT), %l6
1709 sub %g0, %o0, %o0
1710 or %g3, %g2, %g3
1711 stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
1712 mov 1, %l6
1713 stx %g3, [%sp + PTREGS_OFF + PT_V9_TSTATE]
1714 bne,pn %icc, linux_syscall_trace2
1715 add %l1, 0x4, %l2 ! npc = npc+4
1716 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
1717
1718 b,pt %xcc, rtrap
1719 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
1720 linux_syscall_trace2:
1721 add %sp, PTREGS_OFF, %o0
1722 call syscall_trace
1723 mov 1, %o1
1724 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
1725 ba,pt %xcc, rtrap
1726 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
1727
1728 .align 32
1729 .globl __flushw_user
1730 __flushw_user:
1731 rdpr %otherwin, %g1
1732 brz,pn %g1, 2f
1733 clr %g2
1734 1: save %sp, -128, %sp
1735 rdpr %otherwin, %g1
1736 brnz,pt %g1, 1b
1737 add %g2, 1, %g2
1738 1: sub %g2, 1, %g2
1739 brnz,pt %g2, 1b
1740 restore %g0, %g0, %g0
1741 2: retl
1742 nop
Linux kernel - Deliverables
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