[SPARC64]: Use sun4v VIRQ interfaces as intended.
[deliverable/linux.git] / arch / sparc64 / kernel / irq.c
1 /* irq.c: UltraSparc IRQ handling/init/registry.
2 *
3 * Copyright (C) 1997, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
6 */
7
8 #include <linux/module.h>
9 #include <linux/sched.h>
10 #include <linux/ptrace.h>
11 #include <linux/errno.h>
12 #include <linux/kernel_stat.h>
13 #include <linux/signal.h>
14 #include <linux/mm.h>
15 #include <linux/interrupt.h>
16 #include <linux/slab.h>
17 #include <linux/random.h>
18 #include <linux/init.h>
19 #include <linux/delay.h>
20 #include <linux/proc_fs.h>
21 #include <linux/seq_file.h>
22 #include <linux/bootmem.h>
23 #include <linux/irq.h>
24
25 #include <asm/ptrace.h>
26 #include <asm/processor.h>
27 #include <asm/atomic.h>
28 #include <asm/system.h>
29 #include <asm/irq.h>
30 #include <asm/io.h>
31 #include <asm/sbus.h>
32 #include <asm/iommu.h>
33 #include <asm/upa.h>
34 #include <asm/oplib.h>
35 #include <asm/prom.h>
36 #include <asm/timer.h>
37 #include <asm/smp.h>
38 #include <asm/starfire.h>
39 #include <asm/uaccess.h>
40 #include <asm/cache.h>
41 #include <asm/cpudata.h>
42 #include <asm/auxio.h>
43 #include <asm/head.h>
44 #include <asm/hypervisor.h>
45
46 /* UPA nodes send interrupt packet to UltraSparc with first data reg
47 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
48 * delivered. We must translate this into a non-vector IRQ so we can
49 * set the softint on this cpu.
50 *
51 * To make processing these packets efficient and race free we use
52 * an array of irq buckets below. The interrupt vector handler in
53 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
54 *
55 * If you make changes to ino_bucket, please update hand coded assembler
56 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
57 */
58 struct ino_bucket {
59 /*0x00*/unsigned long irq_chain_pa;
60
61 /* Virtual interrupt number assigned to this INO. */
62 /*0x08*/unsigned int virt_irq;
63 /*0x0c*/unsigned int __pad;
64 };
65
66 #define NUM_IVECS (IMAP_INR + 1)
67 struct ino_bucket *ivector_table;
68 unsigned long ivector_table_pa;
69
70 #define __irq_ino(irq) \
71 (((struct ino_bucket *)(irq)) - &ivector_table[0])
72 #define __bucket(irq) ((struct ino_bucket *)(irq))
73 #define __irq(bucket) ((unsigned long)(bucket))
74
75 #define irq_work_pa(__cpu) &(trap_block[(__cpu)].irq_worklist_pa)
76
77 static struct {
78 unsigned long irq;
79 unsigned int dev_handle;
80 unsigned int dev_ino;
81 } virt_to_real_irq_table[NR_IRQS];
82 static DEFINE_SPINLOCK(virt_irq_alloc_lock);
83
84 unsigned char virt_irq_alloc(unsigned long real_irq)
85 {
86 unsigned long flags;
87 unsigned char ent;
88
89 BUILD_BUG_ON(NR_IRQS >= 256);
90
91 spin_lock_irqsave(&virt_irq_alloc_lock, flags);
92
93 for (ent = 1; ent < NR_IRQS; ent++) {
94 if (!virt_to_real_irq_table[ent].irq)
95 break;
96 }
97 if (ent >= NR_IRQS) {
98 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
99 ent = 0;
100 } else {
101 virt_to_real_irq_table[ent].irq = real_irq;
102 }
103
104 spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
105
106 return ent;
107 }
108
109 #ifdef CONFIG_PCI_MSI
110 void virt_irq_free(unsigned int virt_irq)
111 {
112 unsigned long flags;
113
114 if (virt_irq >= NR_IRQS)
115 return;
116
117 spin_lock_irqsave(&virt_irq_alloc_lock, flags);
118
119 virt_to_real_irq_table[virt_irq].irq = 0;
120
121 spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
122 }
123 #endif
124
125 static unsigned long virt_to_real_irq(unsigned char virt_irq)
126 {
127 return virt_to_real_irq_table[virt_irq].irq;
128 }
129
130 /*
131 * /proc/interrupts printing:
132 */
133
134 int show_interrupts(struct seq_file *p, void *v)
135 {
136 int i = *(loff_t *) v, j;
137 struct irqaction * action;
138 unsigned long flags;
139
140 if (i == 0) {
141 seq_printf(p, " ");
142 for_each_online_cpu(j)
143 seq_printf(p, "CPU%d ",j);
144 seq_putc(p, '\n');
145 }
146
147 if (i < NR_IRQS) {
148 spin_lock_irqsave(&irq_desc[i].lock, flags);
149 action = irq_desc[i].action;
150 if (!action)
151 goto skip;
152 seq_printf(p, "%3d: ",i);
153 #ifndef CONFIG_SMP
154 seq_printf(p, "%10u ", kstat_irqs(i));
155 #else
156 for_each_online_cpu(j)
157 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
158 #endif
159 seq_printf(p, " %9s", irq_desc[i].chip->typename);
160 seq_printf(p, " %s", action->name);
161
162 for (action=action->next; action; action = action->next)
163 seq_printf(p, ", %s", action->name);
164
165 seq_putc(p, '\n');
166 skip:
167 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
168 }
169 return 0;
170 }
171
172 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
173 {
174 unsigned int tid;
175
176 if (this_is_starfire) {
177 tid = starfire_translate(imap, cpuid);
178 tid <<= IMAP_TID_SHIFT;
179 tid &= IMAP_TID_UPA;
180 } else {
181 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
182 unsigned long ver;
183
184 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
185 if ((ver >> 32UL) == __JALAPENO_ID ||
186 (ver >> 32UL) == __SERRANO_ID) {
187 tid = cpuid << IMAP_TID_SHIFT;
188 tid &= IMAP_TID_JBUS;
189 } else {
190 unsigned int a = cpuid & 0x1f;
191 unsigned int n = (cpuid >> 5) & 0x1f;
192
193 tid = ((a << IMAP_AID_SHIFT) |
194 (n << IMAP_NID_SHIFT));
195 tid &= (IMAP_AID_SAFARI |
196 IMAP_NID_SAFARI);;
197 }
198 } else {
199 tid = cpuid << IMAP_TID_SHIFT;
200 tid &= IMAP_TID_UPA;
201 }
202 }
203
204 return tid;
205 }
206
207 struct irq_handler_data {
208 unsigned long iclr;
209 unsigned long imap;
210
211 void (*pre_handler)(unsigned int, void *, void *);
212 void *pre_handler_arg1;
213 void *pre_handler_arg2;
214 };
215
216 static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq)
217 {
218 unsigned long real_irq = virt_to_real_irq(virt_irq);
219 struct ino_bucket *bucket = NULL;
220
221 if (likely(real_irq))
222 bucket = __bucket(real_irq);
223
224 return bucket;
225 }
226
227 #ifdef CONFIG_SMP
228 static int irq_choose_cpu(unsigned int virt_irq)
229 {
230 cpumask_t mask = irq_desc[virt_irq].affinity;
231 int cpuid;
232
233 if (cpus_equal(mask, CPU_MASK_ALL)) {
234 static int irq_rover;
235 static DEFINE_SPINLOCK(irq_rover_lock);
236 unsigned long flags;
237
238 /* Round-robin distribution... */
239 do_round_robin:
240 spin_lock_irqsave(&irq_rover_lock, flags);
241
242 while (!cpu_online(irq_rover)) {
243 if (++irq_rover >= NR_CPUS)
244 irq_rover = 0;
245 }
246 cpuid = irq_rover;
247 do {
248 if (++irq_rover >= NR_CPUS)
249 irq_rover = 0;
250 } while (!cpu_online(irq_rover));
251
252 spin_unlock_irqrestore(&irq_rover_lock, flags);
253 } else {
254 cpumask_t tmp;
255
256 cpus_and(tmp, cpu_online_map, mask);
257
258 if (cpus_empty(tmp))
259 goto do_round_robin;
260
261 cpuid = first_cpu(tmp);
262 }
263
264 return cpuid;
265 }
266 #else
267 static int irq_choose_cpu(unsigned int virt_irq)
268 {
269 return real_hard_smp_processor_id();
270 }
271 #endif
272
273 static void sun4u_irq_enable(unsigned int virt_irq)
274 {
275 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
276
277 if (likely(data)) {
278 unsigned long cpuid, imap, val;
279 unsigned int tid;
280
281 cpuid = irq_choose_cpu(virt_irq);
282 imap = data->imap;
283
284 tid = sun4u_compute_tid(imap, cpuid);
285
286 val = upa_readq(imap);
287 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
288 IMAP_AID_SAFARI | IMAP_NID_SAFARI);
289 val |= tid | IMAP_VALID;
290 upa_writeq(val, imap);
291 }
292 }
293
294 static void sun4u_set_affinity(unsigned int virt_irq, cpumask_t mask)
295 {
296 sun4u_irq_enable(virt_irq);
297 }
298
299 static void sun4u_irq_disable(unsigned int virt_irq)
300 {
301 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
302
303 if (likely(data)) {
304 unsigned long imap = data->imap;
305 unsigned long tmp = upa_readq(imap);
306
307 tmp &= ~IMAP_VALID;
308 upa_writeq(tmp, imap);
309 }
310 }
311
312 static void sun4u_irq_end(unsigned int virt_irq)
313 {
314 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
315 struct irq_desc *desc = irq_desc + virt_irq;
316
317 if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
318 return;
319
320 if (likely(data))
321 upa_writeq(ICLR_IDLE, data->iclr);
322 }
323
324 static void sun4v_irq_enable(unsigned int virt_irq)
325 {
326 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
327 unsigned int ino = bucket - &ivector_table[0];
328
329 if (likely(bucket)) {
330 unsigned long cpuid;
331 int err;
332
333 cpuid = irq_choose_cpu(virt_irq);
334
335 err = sun4v_intr_settarget(ino, cpuid);
336 if (err != HV_EOK)
337 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
338 "err(%d)\n", ino, cpuid, err);
339 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
340 if (err != HV_EOK)
341 printk(KERN_ERR "sun4v_intr_setstate(%x): "
342 "err(%d)\n", ino, err);
343 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
344 if (err != HV_EOK)
345 printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
346 ino, err);
347 }
348 }
349
350 static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask)
351 {
352 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
353 unsigned int ino = bucket - &ivector_table[0];
354
355 if (likely(bucket)) {
356 unsigned long cpuid;
357 int err;
358
359 cpuid = irq_choose_cpu(virt_irq);
360
361 err = sun4v_intr_settarget(ino, cpuid);
362 if (err != HV_EOK)
363 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
364 "err(%d)\n", ino, cpuid, err);
365 }
366 }
367
368 static void sun4v_irq_disable(unsigned int virt_irq)
369 {
370 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
371 unsigned int ino = bucket - &ivector_table[0];
372
373 if (likely(bucket)) {
374 int err;
375
376 err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
377 if (err != HV_EOK)
378 printk(KERN_ERR "sun4v_intr_setenabled(%x): "
379 "err(%d)\n", ino, err);
380 }
381 }
382
383 static void sun4v_irq_end(unsigned int virt_irq)
384 {
385 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
386 unsigned int ino = bucket - &ivector_table[0];
387 struct irq_desc *desc = irq_desc + virt_irq;
388
389 if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
390 return;
391
392 if (likely(bucket)) {
393 int err;
394
395 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
396 if (err != HV_EOK)
397 printk(KERN_ERR "sun4v_intr_setstate(%x): "
398 "err(%d)\n", ino, err);
399 }
400 }
401
402 static void sun4v_virq_enable(unsigned int virt_irq)
403 {
404 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
405
406 if (likely(bucket)) {
407 unsigned long cpuid, dev_handle, dev_ino;
408 int err;
409
410 cpuid = irq_choose_cpu(virt_irq);
411
412 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
413 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
414
415 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
416 if (err != HV_EOK)
417 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
418 "err(%d)\n",
419 dev_handle, dev_ino, cpuid, err);
420 err = sun4v_vintr_set_state(dev_handle, dev_ino,
421 HV_INTR_STATE_IDLE);
422 if (err != HV_EOK)
423 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
424 "HV_INTR_STATE_IDLE): err(%d)\n",
425 dev_handle, dev_ino, err);
426 err = sun4v_vintr_set_valid(dev_handle, dev_ino,
427 HV_INTR_ENABLED);
428 if (err != HV_EOK)
429 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
430 "HV_INTR_ENABLED): err(%d)\n",
431 dev_handle, dev_ino, err);
432 }
433 }
434
435 static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask)
436 {
437 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
438
439 if (likely(bucket)) {
440 unsigned long cpuid, dev_handle, dev_ino;
441 int err;
442
443 cpuid = irq_choose_cpu(virt_irq);
444
445 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
446 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
447
448 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
449 if (err != HV_EOK)
450 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
451 "err(%d)\n",
452 dev_handle, dev_ino, cpuid, err);
453 }
454 }
455
456 static void sun4v_virq_disable(unsigned int virt_irq)
457 {
458 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
459
460 if (likely(bucket)) {
461 unsigned long dev_handle, dev_ino;
462 int err;
463
464 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
465 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
466
467 err = sun4v_vintr_set_valid(dev_handle, dev_ino,
468 HV_INTR_DISABLED);
469 if (err != HV_EOK)
470 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
471 "HV_INTR_DISABLED): err(%d)\n",
472 dev_handle, dev_ino, err);
473 }
474 }
475
476 static void sun4v_virq_end(unsigned int virt_irq)
477 {
478 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
479 struct irq_desc *desc = irq_desc + virt_irq;
480
481 if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
482 return;
483
484 if (likely(bucket)) {
485 unsigned long dev_handle, dev_ino;
486 int err;
487
488 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
489 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
490
491 err = sun4v_vintr_set_state(dev_handle, dev_ino,
492 HV_INTR_STATE_IDLE);
493 if (err != HV_EOK)
494 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
495 "HV_INTR_STATE_IDLE): err(%d)\n",
496 dev_handle, dev_ino, err);
497 }
498 }
499
500 static void run_pre_handler(unsigned int virt_irq)
501 {
502 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
503 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
504
505 if (likely(data->pre_handler)) {
506 data->pre_handler(__irq_ino(__irq(bucket)),
507 data->pre_handler_arg1,
508 data->pre_handler_arg2);
509 }
510 }
511
512 static struct irq_chip sun4u_irq = {
513 .typename = "sun4u",
514 .enable = sun4u_irq_enable,
515 .disable = sun4u_irq_disable,
516 .end = sun4u_irq_end,
517 .set_affinity = sun4u_set_affinity,
518 };
519
520 static struct irq_chip sun4u_irq_ack = {
521 .typename = "sun4u+ack",
522 .enable = sun4u_irq_enable,
523 .disable = sun4u_irq_disable,
524 .ack = run_pre_handler,
525 .end = sun4u_irq_end,
526 .set_affinity = sun4u_set_affinity,
527 };
528
529 static struct irq_chip sun4v_irq = {
530 .typename = "sun4v",
531 .enable = sun4v_irq_enable,
532 .disable = sun4v_irq_disable,
533 .end = sun4v_irq_end,
534 .set_affinity = sun4v_set_affinity,
535 };
536
537 static struct irq_chip sun4v_virq = {
538 .typename = "vsun4v",
539 .enable = sun4v_virq_enable,
540 .disable = sun4v_virq_disable,
541 .end = sun4v_virq_end,
542 .set_affinity = sun4v_virt_set_affinity,
543 };
544
545 void irq_install_pre_handler(int virt_irq,
546 void (*func)(unsigned int, void *, void *),
547 void *arg1, void *arg2)
548 {
549 struct irq_handler_data *data = get_irq_chip_data(virt_irq);
550 struct irq_chip *chip = get_irq_chip(virt_irq);
551
552 if (WARN_ON(chip == &sun4v_irq || chip == &sun4v_virq)) {
553 printk(KERN_ERR "IRQ: Trying to install pre-handler on "
554 "sun4v irq %u\n", virt_irq);
555 return;
556 }
557
558 data->pre_handler = func;
559 data->pre_handler_arg1 = arg1;
560 data->pre_handler_arg2 = arg2;
561
562 if (chip == &sun4u_irq_ack)
563 return;
564
565 set_irq_chip(virt_irq, &sun4u_irq_ack);
566 }
567
568 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
569 {
570 struct ino_bucket *bucket;
571 struct irq_handler_data *data;
572 int ino;
573
574 BUG_ON(tlb_type == hypervisor);
575
576 ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
577 bucket = &ivector_table[ino];
578 if (!bucket->virt_irq) {
579 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
580 set_irq_chip(bucket->virt_irq, &sun4u_irq);
581 }
582
583 data = get_irq_chip_data(bucket->virt_irq);
584 if (unlikely(data))
585 goto out;
586
587 data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
588 if (unlikely(!data)) {
589 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
590 prom_halt();
591 }
592 set_irq_chip_data(bucket->virt_irq, data);
593
594 data->imap = imap;
595 data->iclr = iclr;
596
597 out:
598 return bucket->virt_irq;
599 }
600
601 static unsigned int sun4v_build_common(unsigned long sysino,
602 struct irq_chip *chip)
603 {
604 struct ino_bucket *bucket;
605 struct irq_handler_data *data;
606
607 BUG_ON(tlb_type != hypervisor);
608
609 bucket = &ivector_table[sysino];
610 if (!bucket->virt_irq) {
611 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
612 set_irq_chip(bucket->virt_irq, chip);
613 }
614
615 data = get_irq_chip_data(bucket->virt_irq);
616 if (unlikely(data))
617 goto out;
618
619 data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
620 if (unlikely(!data)) {
621 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
622 prom_halt();
623 }
624 set_irq_chip_data(bucket->virt_irq, data);
625
626 /* Catch accidental accesses to these things. IMAP/ICLR handling
627 * is done by hypervisor calls on sun4v platforms, not by direct
628 * register accesses.
629 */
630 data->imap = ~0UL;
631 data->iclr = ~0UL;
632
633 out:
634 return bucket->virt_irq;
635 }
636
637 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
638 {
639 unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
640
641 return sun4v_build_common(sysino, &sun4v_irq);
642 }
643
644 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
645 {
646 struct irq_handler_data *data;
647 struct ino_bucket *bucket;
648 unsigned long hv_err, cookie;
649
650 bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC);
651 if (unlikely(!bucket))
652 return 0;
653
654 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
655 set_irq_chip(bucket->virt_irq, &sun4v_virq);
656
657 data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
658 if (unlikely(!data))
659 return 0;
660
661 set_irq_chip_data(bucket->virt_irq, data);
662
663 /* Catch accidental accesses to these things. IMAP/ICLR handling
664 * is done by hypervisor calls on sun4v platforms, not by direct
665 * register accesses.
666 */
667 data->imap = ~0UL;
668 data->iclr = ~0UL;
669
670 cookie = ~__pa(bucket);
671 hv_err = sun4v_vintr_set_cookie(devhandle, devino, cookie);
672 if (hv_err) {
673 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
674 "err=%lu\n", devhandle, devino, hv_err);
675 prom_halt();
676 }
677
678 virt_to_real_irq_table[bucket->virt_irq].dev_handle = devhandle;
679 virt_to_real_irq_table[bucket->virt_irq].dev_ino = devino;
680
681 return bucket->virt_irq;
682 }
683
684 void ack_bad_irq(unsigned int virt_irq)
685 {
686 struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
687 unsigned int ino = 0xdeadbeef;
688
689 if (bucket)
690 ino = bucket - &ivector_table[0];
691
692 printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
693 ino, virt_irq);
694 }
695
696 void handler_irq(int irq, struct pt_regs *regs)
697 {
698 unsigned long pstate, bucket_pa;
699 struct pt_regs *old_regs;
700
701 clear_softint(1 << irq);
702
703 old_regs = set_irq_regs(regs);
704 irq_enter();
705
706 /* Grab an atomic snapshot of the pending IVECs. */
707 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
708 "wrpr %0, %3, %%pstate\n\t"
709 "ldx [%2], %1\n\t"
710 "stx %%g0, [%2]\n\t"
711 "wrpr %0, 0x0, %%pstate\n\t"
712 : "=&r" (pstate), "=&r" (bucket_pa)
713 : "r" (irq_work_pa(smp_processor_id())),
714 "i" (PSTATE_IE)
715 : "memory");
716
717 while (bucket_pa) {
718 unsigned long next_pa;
719 unsigned int virt_irq;
720
721 __asm__ __volatile__("ldxa [%2] %4, %0\n\t"
722 "lduwa [%3] %4, %1\n\t"
723 "stxa %%g0, [%2] %4"
724 : "=&r" (next_pa), "=&r" (virt_irq)
725 : "r" (bucket_pa +
726 offsetof(struct ino_bucket,
727 irq_chain_pa)),
728 "r" (bucket_pa +
729 offsetof(struct ino_bucket,
730 virt_irq)),
731 "i" (ASI_PHYS_USE_EC));
732
733 __do_IRQ(virt_irq);
734
735 bucket_pa = next_pa;
736 }
737
738 irq_exit();
739 set_irq_regs(old_regs);
740 }
741
742 #ifdef CONFIG_HOTPLUG_CPU
743 void fixup_irqs(void)
744 {
745 unsigned int irq;
746
747 for (irq = 0; irq < NR_IRQS; irq++) {
748 unsigned long flags;
749
750 spin_lock_irqsave(&irq_desc[irq].lock, flags);
751 if (irq_desc[irq].action &&
752 !(irq_desc[irq].status & IRQ_PER_CPU)) {
753 if (irq_desc[irq].chip->set_affinity)
754 irq_desc[irq].chip->set_affinity(irq,
755 irq_desc[irq].affinity);
756 }
757 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
758 }
759 }
760 #endif
761
762 struct sun5_timer {
763 u64 count0;
764 u64 limit0;
765 u64 count1;
766 u64 limit1;
767 };
768
769 static struct sun5_timer *prom_timers;
770 static u64 prom_limit0, prom_limit1;
771
772 static void map_prom_timers(void)
773 {
774 struct device_node *dp;
775 const unsigned int *addr;
776
777 /* PROM timer node hangs out in the top level of device siblings... */
778 dp = of_find_node_by_path("/");
779 dp = dp->child;
780 while (dp) {
781 if (!strcmp(dp->name, "counter-timer"))
782 break;
783 dp = dp->sibling;
784 }
785
786 /* Assume if node is not present, PROM uses different tick mechanism
787 * which we should not care about.
788 */
789 if (!dp) {
790 prom_timers = (struct sun5_timer *) 0;
791 return;
792 }
793
794 /* If PROM is really using this, it must be mapped by him. */
795 addr = of_get_property(dp, "address", NULL);
796 if (!addr) {
797 prom_printf("PROM does not have timer mapped, trying to continue.\n");
798 prom_timers = (struct sun5_timer *) 0;
799 return;
800 }
801 prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
802 }
803
804 static void kill_prom_timer(void)
805 {
806 if (!prom_timers)
807 return;
808
809 /* Save them away for later. */
810 prom_limit0 = prom_timers->limit0;
811 prom_limit1 = prom_timers->limit1;
812
813 /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
814 * We turn both off here just to be paranoid.
815 */
816 prom_timers->limit0 = 0;
817 prom_timers->limit1 = 0;
818
819 /* Wheee, eat the interrupt packet too... */
820 __asm__ __volatile__(
821 " mov 0x40, %%g2\n"
822 " ldxa [%%g0] %0, %%g1\n"
823 " ldxa [%%g2] %1, %%g1\n"
824 " stxa %%g0, [%%g0] %0\n"
825 " membar #Sync\n"
826 : /* no outputs */
827 : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
828 : "g1", "g2");
829 }
830
831 void init_irqwork_curcpu(void)
832 {
833 int cpu = hard_smp_processor_id();
834
835 trap_block[cpu].irq_worklist_pa = 0UL;
836 }
837
838 /* Please be very careful with register_one_mondo() and
839 * sun4v_register_mondo_queues().
840 *
841 * On SMP this gets invoked from the CPU trampoline before
842 * the cpu has fully taken over the trap table from OBP,
843 * and it's kernel stack + %g6 thread register state is
844 * not fully cooked yet.
845 *
846 * Therefore you cannot make any OBP calls, not even prom_printf,
847 * from these two routines.
848 */
849 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
850 {
851 unsigned long num_entries = (qmask + 1) / 64;
852 unsigned long status;
853
854 status = sun4v_cpu_qconf(type, paddr, num_entries);
855 if (status != HV_EOK) {
856 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
857 "err %lu\n", type, paddr, num_entries, status);
858 prom_halt();
859 }
860 }
861
862 void __cpuinit sun4v_register_mondo_queues(int this_cpu)
863 {
864 struct trap_per_cpu *tb = &trap_block[this_cpu];
865
866 register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
867 tb->cpu_mondo_qmask);
868 register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
869 tb->dev_mondo_qmask);
870 register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
871 tb->resum_qmask);
872 register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
873 tb->nonresum_qmask);
874 }
875
876 static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask)
877 {
878 unsigned long size = PAGE_ALIGN(qmask + 1);
879 void *p = __alloc_bootmem_low(size, size, 0);
880 if (!p) {
881 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
882 prom_halt();
883 }
884
885 *pa_ptr = __pa(p);
886 }
887
888 static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
889 {
890 unsigned long size = PAGE_ALIGN(qmask + 1);
891 void *p = __alloc_bootmem_low(size, size, 0);
892
893 if (!p) {
894 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
895 prom_halt();
896 }
897
898 *pa_ptr = __pa(p);
899 }
900
901 static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
902 {
903 #ifdef CONFIG_SMP
904 void *page;
905
906 BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
907
908 page = alloc_bootmem_low_pages(PAGE_SIZE);
909 if (!page) {
910 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
911 prom_halt();
912 }
913
914 tb->cpu_mondo_block_pa = __pa(page);
915 tb->cpu_list_pa = __pa(page + 64);
916 #endif
917 }
918
919 /* Allocate mondo and error queues for all possible cpus. */
920 static void __init sun4v_init_mondo_queues(void)
921 {
922 int cpu;
923
924 for_each_possible_cpu(cpu) {
925 struct trap_per_cpu *tb = &trap_block[cpu];
926
927 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
928 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
929 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask);
930 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask);
931 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
932 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa,
933 tb->nonresum_qmask);
934
935 init_cpu_send_mondo_info(tb);
936 }
937
938 /* Load up the boot cpu's entries. */
939 sun4v_register_mondo_queues(hard_smp_processor_id());
940 }
941
942 static struct irqaction timer_irq_action = {
943 .name = "timer",
944 };
945
946 /* Only invoked on boot processor. */
947 void __init init_IRQ(void)
948 {
949 unsigned long size;
950
951 map_prom_timers();
952 kill_prom_timer();
953
954 size = sizeof(struct ino_bucket) * NUM_IVECS;
955 ivector_table = alloc_bootmem_low(size);
956 if (!ivector_table) {
957 prom_printf("Fatal error, cannot allocate ivector_table\n");
958 prom_halt();
959 }
960
961 ivector_table_pa = __pa(ivector_table);
962
963 if (tlb_type == hypervisor)
964 sun4v_init_mondo_queues();
965
966 /* We need to clear any IRQ's pending in the soft interrupt
967 * registers, a spurious one could be left around from the
968 * PROM timer which we just disabled.
969 */
970 clear_softint(get_softint());
971
972 /* Now that ivector table is initialized, it is safe
973 * to receive IRQ vector traps. We will normally take
974 * one or two right now, in case some device PROM used
975 * to boot us wants to speak to us. We just ignore them.
976 */
977 __asm__ __volatile__("rdpr %%pstate, %%g1\n\t"
978 "or %%g1, %0, %%g1\n\t"
979 "wrpr %%g1, 0x0, %%pstate"
980 : /* No outputs */
981 : "i" (PSTATE_IE)
982 : "g1");
983
984 irq_desc[0].action = &timer_irq_action;
985 }
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