arch/sparc64/kernel/pci_common.c

   1 /* $Id: pci_common.c,v 1.29 2002/02/01 00:56:03 davem Exp $
   2  * pci_common.c: PCI controller common support.
   3  *
   4  * Copyright (C) 1999 David S. Miller (davem@redhat.com)
   5  */
   6
   7 #include <linux/string.h>
   8 #include <linux/slab.h>
   9 #include <linux/init.h>
  10
  11 #include <asm/pbm.h>
  12 #include <asm/prom.h>
  13 #include <asm/of_device.h>
  14
  15 #include "pci_impl.h"
  16
  17 /* Fix self device of BUS and hook it into BUS->self.
  18  * The pci_scan_bus does not do this for the host bridge.
  19  */
  20 void __init pci_fixup_host_bridge_self(struct pci_bus *pbus)
  21 {
  22         struct pci_dev *pdev;
  23
  24         list_for_each_entry(pdev, &pbus->devices, bus_list) {
  25                 if (pdev->class >> 8 == PCI_CLASS_BRIDGE_HOST) {
  26                         pbus->self = pdev;
  27                         return;
  28                 }
  29         }
  30
  31         prom_printf("PCI: Critical error, cannot find host bridge PDEV.\n");
  32         prom_halt();
  33 }
  34
  35 /* Find the OBP PROM device tree node for a PCI device.  */
  36 static struct device_node * __init
  37 find_device_prom_node(struct pci_pbm_info *pbm, struct pci_dev *pdev,
  38                       struct device_node *bus_node,
  39                       struct linux_prom_pci_registers **pregs,
  40                       int *nregs)
  41 {
  42         struct device_node *dp;
  43
  44         *nregs = 0;
  45
  46         /*
  47          * Return the PBM's PROM node in case we are it's PCI device,
  48          * as the PBM's reg property is different to standard PCI reg
  49          * properties. We would delete this device entry otherwise,
  50          * which confuses XFree86's device probing...
  51          */
  52         if ((pdev->bus->number == pbm->pci_bus->number) && (pdev->devfn == 0) &&
  53             (pdev->vendor == PCI_VENDOR_ID_SUN) &&
  54             (pdev->device == PCI_DEVICE_ID_SUN_PBM ||
  55              pdev->device == PCI_DEVICE_ID_SUN_SCHIZO ||
  56              pdev->device == PCI_DEVICE_ID_SUN_TOMATILLO ||
  57              pdev->device == PCI_DEVICE_ID_SUN_SABRE ||
  58              pdev->device == PCI_DEVICE_ID_SUN_HUMMINGBIRD))
  59                 return bus_node;
  60
  61         dp = bus_node->child;
  62         while (dp) {
  63                 struct linux_prom_pci_registers *regs;
  64                 struct property *prop;
  65                 int len;
  66
  67                 prop = of_find_property(dp, "reg", &len);
  68                 if (!prop)
  69                         goto do_next_sibling;
  70
  71                 regs = prop->value;
  72                 if (((regs[0].phys_hi >> 8) & 0xff) == pdev->devfn) {
  73                         *pregs = regs;
  74                         *nregs = len / sizeof(struct linux_prom_pci_registers);
  75                         return dp;
  76                 }
  77
  78         do_next_sibling:
  79                 dp = dp->sibling;
  80         }
  81
  82         return NULL;
  83 }
  84
  85 /* Older versions of OBP on PCI systems encode 64-bit MEM
  86  * space assignments incorrectly, this fixes them up.  We also
  87  * take the opportunity here to hide other kinds of bogus
  88  * assignments.
  89  */
  90 static void __init fixup_obp_assignments(struct pci_dev *pdev,
  91                                          struct pcidev_cookie *pcp)
  92 {
  93         int i;
  94
  95         if (pdev->vendor == PCI_VENDOR_ID_AL &&
  96             (pdev->device == PCI_DEVICE_ID_AL_M7101 ||
  97              pdev->device == PCI_DEVICE_ID_AL_M1533)) {
  98                 int i;
  99
 100                 /* Zap all of the normal resources, they are
 101                  * meaningless and generate bogus resource collision
 102                  * messages.  This is OpenBoot's ill-fated attempt to
 103                  * represent the implicit resources that these devices
 104                  * have.
 105                  */
 106                 pcp->num_prom_assignments = 0;
 107                 for (i = 0; i < 6; i++) {
 108                         pdev->resource[i].start =
 109                                 pdev->resource[i].end =
 110                                 pdev->resource[i].flags = 0;
 111                 }
 112                 pdev->resource[PCI_ROM_RESOURCE].start =
 113                         pdev->resource[PCI_ROM_RESOURCE].end =
 114                         pdev->resource[PCI_ROM_RESOURCE].flags = 0;
 115                 return;
 116         }
 117
 118         for (i = 0; i < pcp->num_prom_assignments; i++) {
 119                 struct linux_prom_pci_registers *ap;
 120                 int space;
 121
 122                 ap = &pcp->prom_assignments[i];
 123                 space = ap->phys_hi >> 24;
 124                 if ((space & 0x3) == 2 &&
 125                     (space & 0x4) != 0) {
 126                         ap->phys_hi &= ~(0x7 << 24);
 127                         ap->phys_hi |= 0x3 << 24;
 128                 }
 129         }
 130 }
 131
 132 /* Fill in the PCI device cookie sysdata for the given
 133  * PCI device.  This cookie is the means by which one
 134  * can get to OBP and PCI controller specific information
 135  * for a PCI device.
 136  */
 137 static void __init pdev_cookie_fillin(struct pci_pbm_info *pbm,
 138                                       struct pci_dev *pdev,
 139                                       struct device_node *bus_node)
 140 {
 141         struct linux_prom_pci_registers *pregs = NULL;
 142         struct pcidev_cookie *pcp;
 143         struct device_node *dp;
 144         struct property *prop;
 145         int nregs, len;
 146
 147         dp = find_device_prom_node(pbm, pdev, bus_node,
 148                                    &pregs, &nregs);
 149         if (!dp) {
 150                 /* If it is not in the OBP device tree then
 151                  * there must be a damn good reason for it.
 152                  *
 153                  * So what we do is delete the device from the
 154                  * PCI device tree completely.  This scenario
 155                  * is seen, for example, on CP1500 for the
 156                  * second EBUS/HappyMeal pair if the external
 157                  * connector for it is not present.
 158                  */
 159                 pci_remove_bus_device(pdev);
 160                 return;
 161         }
 162
 163         pcp = kzalloc(sizeof(*pcp), GFP_ATOMIC);
 164         if (pcp == NULL) {
 165                 prom_printf("PCI_COOKIE: Fatal malloc error, aborting...\n");
 166                 prom_halt();
 167         }
 168         pcp->pbm = pbm;
 169         pcp->prom_node = dp;
 170         pcp->op = of_find_device_by_node(dp);
 171         memcpy(pcp->prom_regs, pregs,
 172                nregs * sizeof(struct linux_prom_pci_registers));
 173         pcp->num_prom_regs = nregs;
 174
 175         /* We can't have the pcidev_cookie assignments be just
 176          * direct pointers into the property value, since they
 177          * are potentially modified by the probing process.
 178          */
 179         prop = of_find_property(dp, "assigned-addresses", &len);
 180         if (!prop) {
 181                 pcp->num_prom_assignments = 0;
 182         } else {
 183                 memcpy(pcp->prom_assignments, prop->value, len);
 184                 pcp->num_prom_assignments =
 185                         (len / sizeof(pcp->prom_assignments[0]));
 186         }
 187
 188         if (strcmp(dp->name, "ebus") == 0) {
 189                 struct linux_prom_ebus_ranges *erng;
 190                 int iter;
 191
 192                 /* EBUS is special... */
 193                 prop = of_find_property(dp, "ranges", &len);
 194                 if (!prop) {
 195                         prom_printf("EBUS: Fatal error, no range property\n");
 196                         prom_halt();
 197                 }
 198                 erng = prop->value;
 199                 len = (len / sizeof(erng[0]));
 200                 for (iter = 0; iter < len; iter++) {
 201                         struct linux_prom_ebus_ranges *ep = &erng[iter];
 202                         struct linux_prom_pci_registers *ap;
 203
 204                         ap = &pcp->prom_assignments[iter];
 205
 206                         ap->phys_hi = ep->parent_phys_hi;
 207                         ap->phys_mid = ep->parent_phys_mid;
 208                         ap->phys_lo = ep->parent_phys_lo;
 209                         ap->size_hi = 0;
 210                         ap->size_lo = ep->size;
 211                 }
 212                 pcp->num_prom_assignments = len;
 213         }
 214
 215         fixup_obp_assignments(pdev, pcp);
 216
 217         pdev->sysdata = pcp;
 218 }
 219
 220 void __init pci_fill_in_pbm_cookies(struct pci_bus *pbus,
 221                                     struct pci_pbm_info *pbm,
 222                                     struct device_node *dp)
 223 {
 224         struct pci_dev *pdev, *pdev_next;
 225         struct pci_bus *this_pbus, *pbus_next;
 226
 227         /* This must be _safe because the cookie fillin
 228            routine can delete devices from the tree.  */
 229         list_for_each_entry_safe(pdev, pdev_next, &pbus->devices, bus_list)
 230                 pdev_cookie_fillin(pbm, pdev, dp);
 231
 232         list_for_each_entry_safe(this_pbus, pbus_next, &pbus->children, node) {
 233                 struct pcidev_cookie *pcp = this_pbus->self->sysdata;
 234
 235                 pci_fill_in_pbm_cookies(this_pbus, pbm, pcp->prom_node);
 236         }
 237 }
 238
 239 static void __init bad_assignment(struct pci_dev *pdev,
 240                                   struct linux_prom_pci_registers *ap,
 241                                   struct resource *res,
 242                                   int do_prom_halt)
 243 {
 244         prom_printf("PCI: Bogus PROM assignment. BUS[%02x] DEVFN[%x]\n",
 245                     pdev->bus->number, pdev->devfn);
 246         if (ap)
 247                 prom_printf("PCI: phys[%08x:%08x:%08x] size[%08x:%08x]\n",
 248                             ap->phys_hi, ap->phys_mid, ap->phys_lo,
 249                             ap->size_hi, ap->size_lo);
 250         if (res)
 251                 prom_printf("PCI: RES[%016lx-->%016lx:(%lx)]\n",
 252                             res->start, res->end, res->flags);
 253         if (do_prom_halt)
 254                 prom_halt();
 255 }
 256
 257 static struct resource *
 258 __init get_root_resource(struct linux_prom_pci_registers *ap,
 259                          struct pci_pbm_info *pbm)
 260 {
 261         int space = (ap->phys_hi >> 24) & 3;
 262
 263         switch (space) {
 264         case 0:
 265                 /* Configuration space, silently ignore it. */
 266                 return NULL;
 267
 268         case 1:
 269                 /* 16-bit IO space */
 270                 return &pbm->io_space;
 271
 272         case 2:
 273                 /* 32-bit MEM space */
 274                 return &pbm->mem_space;
 275
 276         case 3:
 277                 /* 64-bit MEM space, these are allocated out of
 278                  * the 32-bit mem_space range for the PBM, ie.
 279                  * we just zero out the upper 32-bits.
 280                  */
 281                 return &pbm->mem_space;
 282
 283         default:
 284                 printk("PCI: What is resource space %x?\n", space);
 285                 return NULL;
 286         };
 287 }
 288
 289 static struct resource *
 290 __init get_device_resource(struct linux_prom_pci_registers *ap,
 291                            struct pci_dev *pdev)
 292 {
 293         struct resource *res;
 294         int breg = (ap->phys_hi & 0xff);
 295
 296         switch (breg) {
 297         case  PCI_ROM_ADDRESS:
 298                 /* Unfortunately I have seen several cases where
 299                  * buggy FCODE uses a space value of '1' (I/O space)
 300                  * in the register property for the ROM address
 301                  * so disable this sanity check for now.
 302                  */
 303 #if 0
 304         {
 305                 int space = (ap->phys_hi >> 24) & 3;
 306
 307                 /* It had better be MEM space. */
 308                 if (space != 2)
 309                         bad_assignment(pdev, ap, NULL, 0);
 310         }
 311 #endif
 312                 res = &pdev->resource[PCI_ROM_RESOURCE];
 313                 break;
 314
 315         case PCI_BASE_ADDRESS_0:
 316         case PCI_BASE_ADDRESS_1:
 317         case PCI_BASE_ADDRESS_2:
 318         case PCI_BASE_ADDRESS_3:
 319         case PCI_BASE_ADDRESS_4:
 320         case PCI_BASE_ADDRESS_5:
 321                 res = &pdev->resource[(breg - PCI_BASE_ADDRESS_0) / 4];
 322                 break;
 323
 324         default:
 325                 bad_assignment(pdev, ap, NULL, 0);
 326                 res = NULL;
 327                 break;
 328         };
 329
 330         return res;
 331 }
 332
 333 static int __init pdev_resource_collisions_expected(struct pci_dev *pdev)
 334 {
 335         if (pdev->vendor != PCI_VENDOR_ID_SUN)
 336                 return 0;
 337
 338         if (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS ||
 339             pdev->device == PCI_DEVICE_ID_SUN_RIO_1394 ||
 340             pdev->device == PCI_DEVICE_ID_SUN_RIO_USB)
 341                 return 1;
 342
 343         return 0;
 344 }
 345
 346 static void __init pdev_record_assignments(struct pci_pbm_info *pbm,
 347                                            struct pci_dev *pdev)
 348 {
 349         struct pcidev_cookie *pcp = pdev->sysdata;
 350         int i;
 351
 352         for (i = 0; i < pcp->num_prom_assignments; i++) {
 353                 struct linux_prom_pci_registers *ap;
 354                 struct resource *root, *res;
 355
 356                 /* The format of this property is specified in
 357                  * the PCI Bus Binding to IEEE1275-1994.
 358                  */
 359                 ap = &pcp->prom_assignments[i];
 360                 root = get_root_resource(ap, pbm);
 361                 res = get_device_resource(ap, pdev);
 362                 if (root == NULL || res == NULL ||
 363                     res->flags == 0)
 364                         continue;
 365
 366                 /* Ok we know which resource this PROM assignment is
 367                  * for, sanity check it.
 368                  */
 369                 if ((res->start & 0xffffffffUL) != ap->phys_lo)
 370                         bad_assignment(pdev, ap, res, 1);
 371
 372                 /* If it is a 64-bit MEM space assignment, verify that
 373                  * the resource is too and that the upper 32-bits match.
 374                  */
 375                 if (((ap->phys_hi >> 24) & 3) == 3) {
 376                         if (((res->flags & IORESOURCE_MEM) == 0) ||
 377                             ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
 378                              != PCI_BASE_ADDRESS_MEM_TYPE_64))
 379                                 bad_assignment(pdev, ap, res, 1);
 380                         if ((res->start >> 32) != ap->phys_mid)
 381                                 bad_assignment(pdev, ap, res, 1);
 382
 383                         /* PBM cannot generate cpu initiated PIOs
 384                          * to the full 64-bit space.  Therefore the
 385                          * upper 32-bits better be zero.  If it is
 386                          * not, just skip it and we will assign it
 387                          * properly ourselves.
 388                          */
 389                         if ((res->start >> 32) != 0UL) {
 390                                 printk(KERN_ERR "PCI: OBP assigns out of range MEM address "
 391                                        "%016lx for region %ld on device %s\n",
 392                                        res->start, (res - &pdev->resource[0]), pci_name(pdev));
 393                                 continue;
 394                         }
 395                 }
 396
 397                 /* Adjust the resource into the physical address space
 398                  * of this PBM.
 399                  */
 400                 pbm->parent->resource_adjust(pdev, res, root);
 401
 402                 if (request_resource(root, res) < 0) {
 403                         /* OK, there is some conflict.  But this is fine
 404                          * since we'll reassign it in the fixup pass.
 405                          *
 406                          * We notify the user that OBP made an error if it
 407                          * is a case we don't expect.
 408                          */
 409                         if (!pdev_resource_collisions_expected(pdev)) {
 410                                 printk(KERN_ERR "PCI: Address space collision on region %ld "
 411                                        "[%016lx:%016lx] of device %s\n",
 412                                        (res - &pdev->resource[0]),
 413                                        res->start, res->end,
 414                                        pci_name(pdev));
 415                         }
 416                 }
 417         }
 418 }
 419
 420 void __init pci_record_assignments(struct pci_pbm_info *pbm,
 421                                    struct pci_bus *pbus)
 422 {
 423         struct pci_dev *dev;
 424         struct pci_bus *bus;
 425
 426         list_for_each_entry(dev, &pbus->devices, bus_list)
 427                 pdev_record_assignments(pbm, dev);
 428
 429         list_for_each_entry(bus, &pbus->children, node)
 430                 pci_record_assignments(pbm, bus);
 431 }
 432
 433 /* Return non-zero if PDEV has implicit I/O resources even
 434  * though it may not have an I/O base address register
 435  * active.
 436  */
 437 static int __init has_implicit_io(struct pci_dev *pdev)
 438 {
 439         int class = pdev->class >> 8;
 440
 441         if (class == PCI_CLASS_NOT_DEFINED ||
 442             class == PCI_CLASS_NOT_DEFINED_VGA ||
 443             class == PCI_CLASS_STORAGE_IDE ||
 444             (pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
 445                 return 1;
 446
 447         return 0;
 448 }
 449
 450 static void __init pdev_assign_unassigned(struct pci_pbm_info *pbm,
 451                                           struct pci_dev *pdev)
 452 {
 453         u32 reg;
 454         u16 cmd;
 455         int i, io_seen, mem_seen;
 456
 457         io_seen = mem_seen = 0;
 458         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 459                 struct resource *root, *res;
 460                 unsigned long size, min, max, align;
 461
 462                 res = &pdev->resource[i];
 463
 464                 if (res->flags & IORESOURCE_IO)
 465                         io_seen++;
 466                 else if (res->flags & IORESOURCE_MEM)
 467                         mem_seen++;
 468
 469                 /* If it is already assigned or the resource does
 470                  * not exist, there is nothing to do.
 471                  */
 472                 if (res->parent != NULL || res->flags == 0UL)
 473                         continue;
 474
 475                 /* Determine the root we allocate from. */
 476                 if (res->flags & IORESOURCE_IO) {
 477                         root = &pbm->io_space;
 478                         min = root->start + 0x400UL;
 479                         max = root->end;
 480                 } else {
 481                         root = &pbm->mem_space;
 482                         min = root->start;
 483                         max = min + 0x80000000UL;
 484                 }
 485
 486                 size = res->end - res->start;
 487                 align = size + 1;
 488                 if (allocate_resource(root, res, size + 1, min, max, align, NULL, NULL) < 0) {
 489                         /* uh oh */
 490                         prom_printf("PCI: Failed to allocate resource %d for %s\n",
 491                                     i, pci_name(pdev));
 492                         prom_halt();
 493                 }
 494
 495                 /* Update PCI config space. */
 496                 pbm->parent->base_address_update(pdev, i);
 497         }
 498
 499         /* Special case, disable the ROM.  Several devices
 500          * act funny (ie. do not respond to memory space writes)
 501          * when it is left enabled.  A good example are Qlogic,ISP
 502          * adapters.
 503          */
 504         pci_read_config_dword(pdev, PCI_ROM_ADDRESS, &reg);
 505         reg &= ~PCI_ROM_ADDRESS_ENABLE;
 506         pci_write_config_dword(pdev, PCI_ROM_ADDRESS, reg);
 507
 508         /* If we saw I/O or MEM resources, enable appropriate
 509          * bits in PCI command register.
 510          */
 511         if (io_seen || mem_seen) {
 512                 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
 513                 if (io_seen || has_implicit_io(pdev))
 514                         cmd |= PCI_COMMAND_IO;
 515                 if (mem_seen)
 516                         cmd |= PCI_COMMAND_MEMORY;
 517                 pci_write_config_word(pdev, PCI_COMMAND, cmd);
 518         }
 519
 520         /* If this is a PCI bridge or an IDE controller,
 521          * enable bus mastering.  In the former case also
 522          * set the cache line size correctly.
 523          */
 524         if (((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI) ||
 525             (((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) &&
 526              ((pdev->class & 0x80) != 0))) {
 527                 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
 528                 cmd |= PCI_COMMAND_MASTER;
 529                 pci_write_config_word(pdev, PCI_COMMAND, cmd);
 530
 531                 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
 532                         pci_write_config_byte(pdev,
 533                                               PCI_CACHE_LINE_SIZE,
 534                                               (64 / sizeof(u32)));
 535         }
 536 }
 537
 538 void __init pci_assign_unassigned(struct pci_pbm_info *pbm,
 539                                   struct pci_bus *pbus)
 540 {
 541         struct pci_dev *dev;
 542         struct pci_bus *bus;
 543
 544         list_for_each_entry(dev, &pbus->devices, bus_list)
 545                 pdev_assign_unassigned(pbm, dev);
 546
 547         list_for_each_entry(bus, &pbus->children, node)
 548                 pci_assign_unassigned(pbm, bus);
 549 }
 550
 551 static void __init pdev_fixup_irq(struct pci_dev *pdev)
 552 {
 553         struct pcidev_cookie *pcp = pdev->sysdata;
 554         struct of_device *op = pcp->op;
 555
 556         if (op->irqs[0] == 0xffffffff) {
 557                 pdev->irq = PCI_IRQ_NONE;
 558                 return;
 559         }
 560
 561         pdev->irq = op->irqs[0];
 562
 563         pci_write_config_byte(pdev, PCI_INTERRUPT_LINE,
 564                               pdev->irq & PCI_IRQ_INO);
 565 }
 566
 567 void __init pci_fixup_irq(struct pci_pbm_info *pbm,
 568                           struct pci_bus *pbus)
 569 {
 570         struct pci_dev *dev;
 571         struct pci_bus *bus;
 572
 573         list_for_each_entry(dev, &pbus->devices, bus_list)
 574                 pdev_fixup_irq(dev);
 575
 576         list_for_each_entry(bus, &pbus->children, node)
 577                 pci_fixup_irq(pbm, bus);
 578 }
 579
 580 static void pdev_setup_busmastering(struct pci_dev *pdev, int is_66mhz)
 581 {
 582         u16 cmd;
 583         u8 hdr_type, min_gnt, ltimer;
 584
 585         pci_read_config_word(pdev, PCI_COMMAND, &cmd);
 586         cmd |= PCI_COMMAND_MASTER;
 587         pci_write_config_word(pdev, PCI_COMMAND, cmd);
 588
 589         /* Read it back, if the mastering bit did not
 590          * get set, the device does not support bus
 591          * mastering so we have nothing to do here.
 592          */
 593         pci_read_config_word(pdev, PCI_COMMAND, &cmd);
 594         if ((cmd & PCI_COMMAND_MASTER) == 0)
 595                 return;
 596
 597         /* Set correct cache line size, 64-byte on all
 598          * Sparc64 PCI systems.  Note that the value is
 599          * measured in 32-bit words.
 600          */
 601         pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
 602                               64 / sizeof(u32));
 603
 604         pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr_type);
 605         hdr_type &= ~0x80;
 606         if (hdr_type != PCI_HEADER_TYPE_NORMAL)
 607                 return;
 608
 609         /* If the latency timer is already programmed with a non-zero
 610          * value, assume whoever set it (OBP or whoever) knows what
 611          * they are doing.
 612          */
 613         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ltimer);
 614         if (ltimer != 0)
 615                 return;
 616
 617         /* XXX Since I'm tipping off the min grant value to
 618          * XXX choose a suitable latency timer value, I also
 619          * XXX considered making use of the max latency value
 620          * XXX as well.  Unfortunately I've seen too many bogusly
 621          * XXX low settings for it to the point where it lacks
 622          * XXX any usefulness.  In one case, an ethernet card
 623          * XXX claimed a min grant of 10 and a max latency of 5.
 624          * XXX Now, if I had two such cards on the same bus I
 625          * XXX could not set the desired burst period (calculated
 626          * XXX from min grant) without violating the max latency
 627          * XXX bound.  Duh...
 628          * XXX
 629          * XXX I blame dumb PC bios implementors for stuff like
 630          * XXX this, most of them don't even try to do something
 631          * XXX sensible with latency timer values and just set some
 632          * XXX default value (usually 32) into every device.
 633          */
 634
 635         pci_read_config_byte(pdev, PCI_MIN_GNT, &min_gnt);
 636
 637         if (min_gnt == 0) {
 638                 /* If no min_gnt setting then use a default
 639                  * value.
 640                  */
 641                 if (is_66mhz)
 642                         ltimer = 16;
 643                 else
 644                         ltimer = 32;
 645         } else {
 646                 int shift_factor;
 647
 648                 if (is_66mhz)
 649                         shift_factor = 2;
 650                 else
 651                         shift_factor = 3;
 652
 653                 /* Use a default value when the min_gnt value
 654                  * is erroneously high.
 655                  */
 656                 if (((unsigned int) min_gnt << shift_factor) > 512 ||
 657                     ((min_gnt << shift_factor) & 0xff) == 0) {
 658                         ltimer = 8 << shift_factor;
 659                 } else {
 660                         ltimer = min_gnt << shift_factor;
 661                 }
 662         }
 663
 664         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ltimer);
 665 }
 666
 667 void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm,
 668                                      struct pci_bus *pbus)
 669 {
 670         struct pci_dev *pdev;
 671         int all_are_66mhz;
 672         u16 status;
 673
 674         if (pbm->is_66mhz_capable == 0) {
 675                 all_are_66mhz = 0;
 676                 goto out;
 677         }
 678
 679         all_are_66mhz = 1;
 680         list_for_each_entry(pdev, &pbus->devices, bus_list) {
 681                 pci_read_config_word(pdev, PCI_STATUS, &status);
 682                 if (!(status & PCI_STATUS_66MHZ)) {
 683                         all_are_66mhz = 0;
 684                         break;
 685                 }
 686         }
 687 out:
 688         pbm->all_devs_66mhz = all_are_66mhz;
 689
 690         printk("PCI%d(PBM%c): Bus running at %dMHz\n",
 691                pbm->parent->index,
 692                (pbm == &pbm->parent->pbm_A) ? 'A' : 'B',
 693                (all_are_66mhz ? 66 : 33));
 694 }
 695
 696 void pci_setup_busmastering(struct pci_pbm_info *pbm,
 697                             struct pci_bus *pbus)
 698 {
 699         struct pci_dev *dev;
 700         struct pci_bus *bus;
 701         int is_66mhz;
 702
 703         is_66mhz = pbm->is_66mhz_capable && pbm->all_devs_66mhz;
 704
 705         list_for_each_entry(dev, &pbus->devices, bus_list)
 706                 pdev_setup_busmastering(dev, is_66mhz);
 707
 708         list_for_each_entry(bus, &pbus->children, node)
 709                 pci_setup_busmastering(pbm, bus);
 710 }
 711
 712 void pci_register_legacy_regions(struct resource *io_res,
 713                                  struct resource *mem_res)
 714 {
 715         struct resource *p;
 716
 717         /* VGA Video RAM. */
 718         p = kzalloc(sizeof(*p), GFP_KERNEL);
 719         if (!p)
 720                 return;
 721
 722         p->name = "Video RAM area";
 723         p->start = mem_res->start + 0xa0000UL;
 724         p->end = p->start + 0x1ffffUL;
 725         p->flags = IORESOURCE_BUSY;
 726         request_resource(mem_res, p);
 727
 728         p = kzalloc(sizeof(*p), GFP_KERNEL);
 729         if (!p)
 730                 return;
 731
 732         p->name = "System ROM";
 733         p->start = mem_res->start + 0xf0000UL;
 734         p->end = p->start + 0xffffUL;
 735         p->flags = IORESOURCE_BUSY;
 736         request_resource(mem_res, p);
 737
 738         p = kzalloc(sizeof(*p), GFP_KERNEL);
 739         if (!p)
 740                 return;
 741
 742         p->name = "Video ROM";
 743         p->start = mem_res->start + 0xc0000UL;
 744         p->end = p->start + 0x7fffUL;
 745         p->flags = IORESOURCE_BUSY;
 746         request_resource(mem_res, p);
 747 }
 748
 749 /* Generic helper routines for PCI error reporting. */
 750 void pci_scan_for_target_abort(struct pci_controller_info *p,
 751                                struct pci_pbm_info *pbm,
 752                                struct pci_bus *pbus)
 753 {
 754         struct pci_dev *pdev;
 755         struct pci_bus *bus;
 756
 757         list_for_each_entry(pdev, &pbus->devices, bus_list) {
 758                 u16 status, error_bits;
 759
 760                 pci_read_config_word(pdev, PCI_STATUS, &status);
 761                 error_bits =
 762                         (status & (PCI_STATUS_SIG_TARGET_ABORT |
 763                                    PCI_STATUS_REC_TARGET_ABORT));
 764                 if (error_bits) {
 765                         pci_write_config_word(pdev, PCI_STATUS, error_bits);
 766                         printk("PCI%d(PBM%c): Device [%s] saw Target Abort [%016x]\n",
 767                                p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
 768                                pci_name(pdev), status);
 769                 }
 770         }
 771
 772         list_for_each_entry(bus, &pbus->children, node)
 773                 pci_scan_for_target_abort(p, pbm, bus);
 774 }
 775
 776 void pci_scan_for_master_abort(struct pci_controller_info *p,
 777                                struct pci_pbm_info *pbm,
 778                                struct pci_bus *pbus)
 779 {
 780         struct pci_dev *pdev;
 781         struct pci_bus *bus;
 782
 783         list_for_each_entry(pdev, &pbus->devices, bus_list) {
 784                 u16 status, error_bits;
 785
 786                 pci_read_config_word(pdev, PCI_STATUS, &status);
 787                 error_bits =
 788                         (status & (PCI_STATUS_REC_MASTER_ABORT));
 789                 if (error_bits) {
 790                         pci_write_config_word(pdev, PCI_STATUS, error_bits);
 791                         printk("PCI%d(PBM%c): Device [%s] received Master Abort [%016x]\n",
 792                                p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
 793                                pci_name(pdev), status);
 794                 }
 795         }
 796
 797         list_for_each_entry(bus, &pbus->children, node)
 798                 pci_scan_for_master_abort(p, pbm, bus);
 799 }
 800
 801 void pci_scan_for_parity_error(struct pci_controller_info *p,
 802                                struct pci_pbm_info *pbm,
 803                                struct pci_bus *pbus)
 804 {
 805         struct pci_dev *pdev;
 806         struct pci_bus *bus;
 807
 808         list_for_each_entry(pdev, &pbus->devices, bus_list) {
 809                 u16 status, error_bits;
 810
 811                 pci_read_config_word(pdev, PCI_STATUS, &status);
 812                 error_bits =
 813                         (status & (PCI_STATUS_PARITY |
 814                                    PCI_STATUS_DETECTED_PARITY));
 815                 if (error_bits) {
 816                         pci_write_config_word(pdev, PCI_STATUS, error_bits);
 817                         printk("PCI%d(PBM%c): Device [%s] saw Parity Error [%016x]\n",
 818                                p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
 819                                pci_name(pdev), status);
 820                 }
 821         }
 822
 823         list_for_each_entry(bus, &pbus->children, node)
 824                 pci_scan_for_parity_error(p, pbm, bus);
 825 }