arch/sparc64/kernel/pci_common.c

   1 /* $Id: pci_common.c,v 1.29 2002/02/01 00:56:03 davem Exp $
   2  * pci_common.c: PCI controller common support.
   3  *
   4  * Copyright (C) 1999 David S. Miller (davem@redhat.com)
   5  */
   6
   7 #include <linux/string.h>
   8 #include <linux/slab.h>
   9 #include <linux/init.h>
  10 #include <linux/pci.h>
  11 #include <linux/device.h>
  12
  13 #include <asm/pbm.h>
  14 #include <asm/prom.h>
  15 #include <asm/of_device.h>
  16
  17 #include "pci_impl.h"
  18
  19 /* Fix self device of BUS and hook it into BUS->self.
  20  * The pci_scan_bus does not do this for the host bridge.
  21  */
  22 void __init pci_fixup_host_bridge_self(struct pci_bus *pbus)
  23 {
  24         struct pci_dev *pdev;
  25
  26         list_for_each_entry(pdev, &pbus->devices, bus_list) {
  27                 if (pdev->class >> 8 == PCI_CLASS_BRIDGE_HOST) {
  28                         pbus->self = pdev;
  29                         return;
  30                 }
  31         }
  32
  33         prom_printf("PCI: Critical error, cannot find host bridge PDEV.\n");
  34         prom_halt();
  35 }
  36
  37 /* Find the OBP PROM device tree node for a PCI device.  */
  38 static struct device_node * __init
  39 find_device_prom_node(struct pci_pbm_info *pbm, struct pci_dev *pdev,
  40                       struct device_node *bus_node,
  41                       struct linux_prom_pci_registers **pregs,
  42                       int *nregs)
  43 {
  44         struct device_node *dp;
  45
  46         *nregs = 0;
  47
  48         /*
  49          * Return the PBM's PROM node in case we are it's PCI device,
  50          * as the PBM's reg property is different to standard PCI reg
  51          * properties. We would delete this device entry otherwise,
  52          * which confuses XFree86's device probing...
  53          */
  54         if ((pdev->bus->number == pbm->pci_bus->number) && (pdev->devfn == 0) &&
  55             (pdev->vendor == PCI_VENDOR_ID_SUN) &&
  56             (pdev->device == PCI_DEVICE_ID_SUN_PBM ||
  57              pdev->device == PCI_DEVICE_ID_SUN_SCHIZO ||
  58              pdev->device == PCI_DEVICE_ID_SUN_TOMATILLO ||
  59              pdev->device == PCI_DEVICE_ID_SUN_SABRE ||
  60              pdev->device == PCI_DEVICE_ID_SUN_HUMMINGBIRD))
  61                 return bus_node;
  62
  63         dp = bus_node->child;
  64         while (dp) {
  65                 struct linux_prom_pci_registers *regs;
  66                 struct property *prop;
  67                 int len;
  68
  69                 prop = of_find_property(dp, "reg", &len);
  70                 if (!prop)
  71                         goto do_next_sibling;
  72
  73                 regs = prop->value;
  74                 if (((regs[0].phys_hi >> 8) & 0xff) == pdev->devfn) {
  75                         *pregs = regs;
  76                         *nregs = len / sizeof(struct linux_prom_pci_registers);
  77                         return dp;
  78                 }
  79
  80         do_next_sibling:
  81                 dp = dp->sibling;
  82         }
  83
  84         return NULL;
  85 }
  86
  87 /* Older versions of OBP on PCI systems encode 64-bit MEM
  88  * space assignments incorrectly, this fixes them up.  We also
  89  * take the opportunity here to hide other kinds of bogus
  90  * assignments.
  91  */
  92 static void __init fixup_obp_assignments(struct pci_dev *pdev,
  93                                          struct pcidev_cookie *pcp)
  94 {
  95         int i;
  96
  97         if (pdev->vendor == PCI_VENDOR_ID_AL &&
  98             (pdev->device == PCI_DEVICE_ID_AL_M7101 ||
  99              pdev->device == PCI_DEVICE_ID_AL_M1533)) {
 100                 int i;
 101
 102                 /* Zap all of the normal resources, they are
 103                  * meaningless and generate bogus resource collision
 104                  * messages.  This is OpenBoot's ill-fated attempt to
 105                  * represent the implicit resources that these devices
 106                  * have.
 107                  */
 108                 pcp->num_prom_assignments = 0;
 109                 for (i = 0; i < 6; i++) {
 110                         pdev->resource[i].start =
 111                                 pdev->resource[i].end =
 112                                 pdev->resource[i].flags = 0;
 113                 }
 114                 pdev->resource[PCI_ROM_RESOURCE].start =
 115                         pdev->resource[PCI_ROM_RESOURCE].end =
 116                         pdev->resource[PCI_ROM_RESOURCE].flags = 0;
 117                 return;
 118         }
 119
 120         for (i = 0; i < pcp->num_prom_assignments; i++) {
 121                 struct linux_prom_pci_registers *ap;
 122                 int space;
 123
 124                 ap = &pcp->prom_assignments[i];
 125                 space = ap->phys_hi >> 24;
 126                 if ((space & 0x3) == 2 &&
 127                     (space & 0x4) != 0) {
 128                         ap->phys_hi &= ~(0x7 << 24);
 129                         ap->phys_hi |= 0x3 << 24;
 130                 }
 131         }
 132 }
 133
 134 static ssize_t
 135 show_pciobppath_attr(struct device * dev, struct device_attribute * attr, char * buf)
 136 {
 137         struct pci_dev *pdev;
 138         struct pcidev_cookie *sysdata;
 139
 140         pdev = to_pci_dev(dev);
 141         sysdata = pdev->sysdata;
 142
 143         return snprintf (buf, PAGE_SIZE, "%s\n", sysdata->prom_node->full_name);
 144 }
 145
 146 static DEVICE_ATTR(obppath, S_IRUSR | S_IRGRP | S_IROTH, show_pciobppath_attr, NULL);
 147
 148 /* Fill in the PCI device cookie sysdata for the given
 149  * PCI device.  This cookie is the means by which one
 150  * can get to OBP and PCI controller specific information
 151  * for a PCI device.
 152  */
 153 static void __init pdev_cookie_fillin(struct pci_pbm_info *pbm,
 154                                       struct pci_dev *pdev,
 155                                       struct device_node *bus_node)
 156 {
 157         struct linux_prom_pci_registers *pregs = NULL;
 158         struct pcidev_cookie *pcp;
 159         struct device_node *dp;
 160         struct property *prop;
 161         int nregs, len, err;
 162
 163         dp = find_device_prom_node(pbm, pdev, bus_node,
 164                                    &pregs, &nregs);
 165         if (!dp) {
 166                 /* If it is not in the OBP device tree then
 167                  * there must be a damn good reason for it.
 168                  *
 169                  * So what we do is delete the device from the
 170                  * PCI device tree completely.  This scenario
 171                  * is seen, for example, on CP1500 for the
 172                  * second EBUS/HappyMeal pair if the external
 173                  * connector for it is not present.
 174                  */
 175                 pci_remove_bus_device(pdev);
 176                 return;
 177         }
 178
 179         pcp = kzalloc(sizeof(*pcp), GFP_ATOMIC);
 180         if (pcp == NULL) {
 181                 prom_printf("PCI_COOKIE: Fatal malloc error, aborting...\n");
 182                 prom_halt();
 183         }
 184         pcp->pbm = pbm;
 185         pcp->prom_node = dp;
 186         pcp->op = of_find_device_by_node(dp);
 187         memcpy(pcp->prom_regs, pregs,
 188                nregs * sizeof(struct linux_prom_pci_registers));
 189         pcp->num_prom_regs = nregs;
 190
 191         /* We can't have the pcidev_cookie assignments be just
 192          * direct pointers into the property value, since they
 193          * are potentially modified by the probing process.
 194          */
 195         prop = of_find_property(dp, "assigned-addresses", &len);
 196         if (!prop) {
 197                 pcp->num_prom_assignments = 0;
 198         } else {
 199                 memcpy(pcp->prom_assignments, prop->value, len);
 200                 pcp->num_prom_assignments =
 201                         (len / sizeof(pcp->prom_assignments[0]));
 202         }
 203
 204         if (strcmp(dp->name, "ebus") == 0) {
 205                 struct linux_prom_ebus_ranges *erng;
 206                 int iter;
 207
 208                 /* EBUS is special... */
 209                 prop = of_find_property(dp, "ranges", &len);
 210                 if (!prop) {
 211                         prom_printf("EBUS: Fatal error, no range property\n");
 212                         prom_halt();
 213                 }
 214                 erng = prop->value;
 215                 len = (len / sizeof(erng[0]));
 216                 for (iter = 0; iter < len; iter++) {
 217                         struct linux_prom_ebus_ranges *ep = &erng[iter];
 218                         struct linux_prom_pci_registers *ap;
 219
 220                         ap = &pcp->prom_assignments[iter];
 221
 222                         ap->phys_hi = ep->parent_phys_hi;
 223                         ap->phys_mid = ep->parent_phys_mid;
 224                         ap->phys_lo = ep->parent_phys_lo;
 225                         ap->size_hi = 0;
 226                         ap->size_lo = ep->size;
 227                 }
 228                 pcp->num_prom_assignments = len;
 229         }
 230
 231         fixup_obp_assignments(pdev, pcp);
 232
 233         pdev->sysdata = pcp;
 234
 235         /* we don't really care if we can create this file or not,
 236          * but we need to assign the result of the call or the world will fall
 237          * under alien invasion and everybody will be frozen on a spaceship
 238          * ready to be eaten on alpha centauri by some green and jelly humanoid.
 239          */
 240         err = sysfs_create_file(&pdev->dev.kobj, &dev_attr_obppath.attr);
 241 }
 242
 243 void __init pci_fill_in_pbm_cookies(struct pci_bus *pbus,
 244                                     struct pci_pbm_info *pbm,
 245                                     struct device_node *dp)
 246 {
 247         struct pci_dev *pdev, *pdev_next;
 248         struct pci_bus *this_pbus, *pbus_next;
 249
 250         /* This must be _safe because the cookie fillin
 251            routine can delete devices from the tree.  */
 252         list_for_each_entry_safe(pdev, pdev_next, &pbus->devices, bus_list)
 253                 pdev_cookie_fillin(pbm, pdev, dp);
 254
 255         list_for_each_entry_safe(this_pbus, pbus_next, &pbus->children, node) {
 256                 struct pcidev_cookie *pcp = this_pbus->self->sysdata;
 257
 258                 pci_fill_in_pbm_cookies(this_pbus, pbm, pcp->prom_node);
 259         }
 260 }
 261
 262 static void __init bad_assignment(struct pci_dev *pdev,
 263                                   struct linux_prom_pci_registers *ap,
 264                                   struct resource *res,
 265                                   int do_prom_halt)
 266 {
 267         prom_printf("PCI: Bogus PROM assignment. BUS[%02x] DEVFN[%x]\n",
 268                     pdev->bus->number, pdev->devfn);
 269         if (ap)
 270                 prom_printf("PCI: phys[%08x:%08x:%08x] size[%08x:%08x]\n",
 271                             ap->phys_hi, ap->phys_mid, ap->phys_lo,
 272                             ap->size_hi, ap->size_lo);
 273         if (res)
 274                 prom_printf("PCI: RES[%016lx-->%016lx:(%lx)]\n",
 275                             res->start, res->end, res->flags);
 276         if (do_prom_halt)
 277                 prom_halt();
 278 }
 279
 280 static struct resource *
 281 __init get_root_resource(struct linux_prom_pci_registers *ap,
 282                          struct pci_pbm_info *pbm)
 283 {
 284         int space = (ap->phys_hi >> 24) & 3;
 285
 286         switch (space) {
 287         case 0:
 288                 /* Configuration space, silently ignore it. */
 289                 return NULL;
 290
 291         case 1:
 292                 /* 16-bit IO space */
 293                 return &pbm->io_space;
 294
 295         case 2:
 296                 /* 32-bit MEM space */
 297                 return &pbm->mem_space;
 298
 299         case 3:
 300                 /* 64-bit MEM space, these are allocated out of
 301                  * the 32-bit mem_space range for the PBM, ie.
 302                  * we just zero out the upper 32-bits.
 303                  */
 304                 return &pbm->mem_space;
 305
 306         default:
 307                 printk("PCI: What is resource space %x?\n", space);
 308                 return NULL;
 309         };
 310 }
 311
 312 static struct resource *
 313 __init get_device_resource(struct linux_prom_pci_registers *ap,
 314                            struct pci_dev *pdev)
 315 {
 316         struct resource *res;
 317         int breg = (ap->phys_hi & 0xff);
 318
 319         switch (breg) {
 320         case  PCI_ROM_ADDRESS:
 321                 /* Unfortunately I have seen several cases where
 322                  * buggy FCODE uses a space value of '1' (I/O space)
 323                  * in the register property for the ROM address
 324                  * so disable this sanity check for now.
 325                  */
 326 #if 0
 327         {
 328                 int space = (ap->phys_hi >> 24) & 3;
 329
 330                 /* It had better be MEM space. */
 331                 if (space != 2)
 332                         bad_assignment(pdev, ap, NULL, 0);
 333         }
 334 #endif
 335                 res = &pdev->resource[PCI_ROM_RESOURCE];
 336                 break;
 337
 338         case PCI_BASE_ADDRESS_0:
 339         case PCI_BASE_ADDRESS_1:
 340         case PCI_BASE_ADDRESS_2:
 341         case PCI_BASE_ADDRESS_3:
 342         case PCI_BASE_ADDRESS_4:
 343         case PCI_BASE_ADDRESS_5:
 344                 res = &pdev->resource[(breg - PCI_BASE_ADDRESS_0) / 4];
 345                 break;
 346
 347         default:
 348                 bad_assignment(pdev, ap, NULL, 0);
 349                 res = NULL;
 350                 break;
 351         };
 352
 353         return res;
 354 }
 355
 356 static void __init pdev_record_assignments(struct pci_pbm_info *pbm,
 357                                            struct pci_dev *pdev)
 358 {
 359         struct pcidev_cookie *pcp = pdev->sysdata;
 360         int i;
 361
 362         for (i = 0; i < pcp->num_prom_assignments; i++) {
 363                 struct linux_prom_pci_registers *ap;
 364                 struct resource *root, *res;
 365
 366                 /* The format of this property is specified in
 367                  * the PCI Bus Binding to IEEE1275-1994.
 368                  */
 369                 ap = &pcp->prom_assignments[i];
 370                 root = get_root_resource(ap, pbm);
 371                 res = get_device_resource(ap, pdev);
 372                 if (root == NULL || res == NULL ||
 373                     res->flags == 0)
 374                         continue;
 375
 376                 /* Ok we know which resource this PROM assignment is
 377                  * for, sanity check it.
 378                  */
 379                 if ((res->start & 0xffffffffUL) != ap->phys_lo)
 380                         bad_assignment(pdev, ap, res, 1);
 381
 382                 /* If it is a 64-bit MEM space assignment, verify that
 383                  * the resource is too and that the upper 32-bits match.
 384                  */
 385                 if (((ap->phys_hi >> 24) & 3) == 3) {
 386                         if (((res->flags & IORESOURCE_MEM) == 0) ||
 387                             ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
 388                              != PCI_BASE_ADDRESS_MEM_TYPE_64))
 389                                 bad_assignment(pdev, ap, res, 1);
 390                         if ((res->start >> 32) != ap->phys_mid)
 391                                 bad_assignment(pdev, ap, res, 1);
 392
 393                         /* PBM cannot generate cpu initiated PIOs
 394                          * to the full 64-bit space.  Therefore the
 395                          * upper 32-bits better be zero.  If it is
 396                          * not, just skip it and we will assign it
 397                          * properly ourselves.
 398                          */
 399                         if ((res->start >> 32) != 0UL) {
 400                                 printk(KERN_ERR "PCI: OBP assigns out of range MEM address "
 401                                        "%016lx for region %ld on device %s\n",
 402                                        res->start, (res - &pdev->resource[0]), pci_name(pdev));
 403                                 continue;
 404                         }
 405                 }
 406
 407                 /* Adjust the resource into the physical address space
 408                  * of this PBM.
 409                  */
 410                 pbm->parent->resource_adjust(pdev, res, root);
 411
 412                 if (request_resource(root, res) < 0) {
 413                         int rnum;
 414
 415                         /* OK, there is some conflict.  But this is fine
 416                          * since we'll reassign it in the fixup pass.
 417                          *
 418                          * Do not print the warning for ROM resources
 419                          * as such a conflict is quite common and
 420                          * harmless as the ROM bar is disabled.
 421                          */
 422                         rnum = (res - &pdev->resource[0]);
 423                         if (rnum != PCI_ROM_RESOURCE)
 424                                 printk(KERN_ERR "PCI: Resource collision, "
 425                                        "region %d "
 426                                        "[%016lx:%016lx] of device %s\n",
 427                                        rnum,
 428                                        res->start, res->end,
 429                                        pci_name(pdev));
 430                 }
 431         }
 432 }
 433
 434 void __init pci_record_assignments(struct pci_pbm_info *pbm,
 435                                    struct pci_bus *pbus)
 436 {
 437         struct pci_dev *dev;
 438         struct pci_bus *bus;
 439
 440         list_for_each_entry(dev, &pbus->devices, bus_list)
 441                 pdev_record_assignments(pbm, dev);
 442
 443         list_for_each_entry(bus, &pbus->children, node)
 444                 pci_record_assignments(pbm, bus);
 445 }
 446
 447 /* Return non-zero if PDEV has implicit I/O resources even
 448  * though it may not have an I/O base address register
 449  * active.
 450  */
 451 static int __init has_implicit_io(struct pci_dev *pdev)
 452 {
 453         int class = pdev->class >> 8;
 454
 455         if (class == PCI_CLASS_NOT_DEFINED ||
 456             class == PCI_CLASS_NOT_DEFINED_VGA ||
 457             class == PCI_CLASS_STORAGE_IDE ||
 458             (pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
 459                 return 1;
 460
 461         return 0;
 462 }
 463
 464 static void __init pdev_assign_unassigned(struct pci_pbm_info *pbm,
 465                                           struct pci_dev *pdev)
 466 {
 467         u32 reg;
 468         u16 cmd;
 469         int i, io_seen, mem_seen;
 470
 471         io_seen = mem_seen = 0;
 472         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 473                 struct resource *root, *res;
 474                 unsigned long size, min, max, align;
 475
 476                 res = &pdev->resource[i];
 477
 478                 if (res->flags & IORESOURCE_IO)
 479                         io_seen++;
 480                 else if (res->flags & IORESOURCE_MEM)
 481                         mem_seen++;
 482
 483                 /* If it is already assigned or the resource does
 484                  * not exist, there is nothing to do.
 485                  */
 486                 if (res->parent != NULL || res->flags == 0UL)
 487                         continue;
 488
 489                 /* Determine the root we allocate from. */
 490                 if (res->flags & IORESOURCE_IO) {
 491                         root = &pbm->io_space;
 492                         min = root->start + 0x400UL;
 493                         max = root->end;
 494                 } else {
 495                         root = &pbm->mem_space;
 496                         min = root->start;
 497                         max = min + 0x80000000UL;
 498                 }
 499
 500                 size = res->end - res->start;
 501                 align = size + 1;
 502                 if (allocate_resource(root, res, size + 1, min, max, align, NULL, NULL) < 0) {
 503                         /* uh oh */
 504                         prom_printf("PCI: Failed to allocate resource %d for %s\n",
 505                                     i, pci_name(pdev));
 506                         prom_halt();
 507                 }
 508
 509                 /* Update PCI config space. */
 510                 pbm->parent->base_address_update(pdev, i);
 511         }
 512
 513         /* Special case, disable the ROM.  Several devices
 514          * act funny (ie. do not respond to memory space writes)
 515          * when it is left enabled.  A good example are Qlogic,ISP
 516          * adapters.
 517          */
 518         pci_read_config_dword(pdev, PCI_ROM_ADDRESS, &reg);
 519         reg &= ~PCI_ROM_ADDRESS_ENABLE;
 520         pci_write_config_dword(pdev, PCI_ROM_ADDRESS, reg);
 521
 522         /* If we saw I/O or MEM resources, enable appropriate
 523          * bits in PCI command register.
 524          */
 525         if (io_seen || mem_seen) {
 526                 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
 527                 if (io_seen || has_implicit_io(pdev))
 528                         cmd |= PCI_COMMAND_IO;
 529                 if (mem_seen)
 530                         cmd |= PCI_COMMAND_MEMORY;
 531                 pci_write_config_word(pdev, PCI_COMMAND, cmd);
 532         }
 533
 534         /* If this is a PCI bridge or an IDE controller,
 535          * enable bus mastering.  In the former case also
 536          * set the cache line size correctly.
 537          */
 538         if (((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI) ||
 539             (((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) &&
 540              ((pdev->class & 0x80) != 0))) {
 541                 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
 542                 cmd |= PCI_COMMAND_MASTER;
 543                 pci_write_config_word(pdev, PCI_COMMAND, cmd);
 544
 545                 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
 546                         pci_write_config_byte(pdev,
 547                                               PCI_CACHE_LINE_SIZE,
 548                                               (64 / sizeof(u32)));
 549         }
 550 }
 551
 552 void __init pci_assign_unassigned(struct pci_pbm_info *pbm,
 553                                   struct pci_bus *pbus)
 554 {
 555         struct pci_dev *dev;
 556         struct pci_bus *bus;
 557
 558         list_for_each_entry(dev, &pbus->devices, bus_list)
 559                 pdev_assign_unassigned(pbm, dev);
 560
 561         list_for_each_entry(bus, &pbus->children, node)
 562                 pci_assign_unassigned(pbm, bus);
 563 }
 564
 565 static void __init pdev_fixup_irq(struct pci_dev *pdev)
 566 {
 567         struct pcidev_cookie *pcp = pdev->sysdata;
 568         struct of_device *op = pcp->op;
 569
 570         if (op->irqs[0] == 0xffffffff) {
 571                 pdev->irq = PCI_IRQ_NONE;
 572                 return;
 573         }
 574
 575         pdev->irq = op->irqs[0];
 576
 577         pci_write_config_byte(pdev, PCI_INTERRUPT_LINE,
 578                               pdev->irq & PCI_IRQ_INO);
 579 }
 580
 581 void __init pci_fixup_irq(struct pci_pbm_info *pbm,
 582                           struct pci_bus *pbus)
 583 {
 584         struct pci_dev *dev;
 585         struct pci_bus *bus;
 586
 587         list_for_each_entry(dev, &pbus->devices, bus_list)
 588                 pdev_fixup_irq(dev);
 589
 590         list_for_each_entry(bus, &pbus->children, node)
 591                 pci_fixup_irq(pbm, bus);
 592 }
 593
 594 static void pdev_setup_busmastering(struct pci_dev *pdev, int is_66mhz)
 595 {
 596         u16 cmd;
 597         u8 hdr_type, min_gnt, ltimer;
 598
 599         pci_read_config_word(pdev, PCI_COMMAND, &cmd);
 600         cmd |= PCI_COMMAND_MASTER;
 601         pci_write_config_word(pdev, PCI_COMMAND, cmd);
 602
 603         /* Read it back, if the mastering bit did not
 604          * get set, the device does not support bus
 605          * mastering so we have nothing to do here.
 606          */
 607         pci_read_config_word(pdev, PCI_COMMAND, &cmd);
 608         if ((cmd & PCI_COMMAND_MASTER) == 0)
 609                 return;
 610
 611         /* Set correct cache line size, 64-byte on all
 612          * Sparc64 PCI systems.  Note that the value is
 613          * measured in 32-bit words.
 614          */
 615         pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
 616                               64 / sizeof(u32));
 617
 618         pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr_type);
 619         hdr_type &= ~0x80;
 620         if (hdr_type != PCI_HEADER_TYPE_NORMAL)
 621                 return;
 622
 623         /* If the latency timer is already programmed with a non-zero
 624          * value, assume whoever set it (OBP or whoever) knows what
 625          * they are doing.
 626          */
 627         pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ltimer);
 628         if (ltimer != 0)
 629                 return;
 630
 631         /* XXX Since I'm tipping off the min grant value to
 632          * XXX choose a suitable latency timer value, I also
 633          * XXX considered making use of the max latency value
 634          * XXX as well.  Unfortunately I've seen too many bogusly
 635          * XXX low settings for it to the point where it lacks
 636          * XXX any usefulness.  In one case, an ethernet card
 637          * XXX claimed a min grant of 10 and a max latency of 5.
 638          * XXX Now, if I had two such cards on the same bus I
 639          * XXX could not set the desired burst period (calculated
 640          * XXX from min grant) without violating the max latency
 641          * XXX bound.  Duh...
 642          * XXX
 643          * XXX I blame dumb PC bios implementors for stuff like
 644          * XXX this, most of them don't even try to do something
 645          * XXX sensible with latency timer values and just set some
 646          * XXX default value (usually 32) into every device.
 647          */
 648
 649         pci_read_config_byte(pdev, PCI_MIN_GNT, &min_gnt);
 650
 651         if (min_gnt == 0) {
 652                 /* If no min_gnt setting then use a default
 653                  * value.
 654                  */
 655                 if (is_66mhz)
 656                         ltimer = 16;
 657                 else
 658                         ltimer = 32;
 659         } else {
 660                 int shift_factor;
 661
 662                 if (is_66mhz)
 663                         shift_factor = 2;
 664                 else
 665                         shift_factor = 3;
 666
 667                 /* Use a default value when the min_gnt value
 668                  * is erroneously high.
 669                  */
 670                 if (((unsigned int) min_gnt << shift_factor) > 512 ||
 671                     ((min_gnt << shift_factor) & 0xff) == 0) {
 672                         ltimer = 8 << shift_factor;
 673                 } else {
 674                         ltimer = min_gnt << shift_factor;
 675                 }
 676         }
 677
 678         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ltimer);
 679 }
 680
 681 void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm,
 682                                      struct pci_bus *pbus)
 683 {
 684         struct pci_dev *pdev;
 685         int all_are_66mhz;
 686         u16 status;
 687
 688         if (pbm->is_66mhz_capable == 0) {
 689                 all_are_66mhz = 0;
 690                 goto out;
 691         }
 692
 693         all_are_66mhz = 1;
 694         list_for_each_entry(pdev, &pbus->devices, bus_list) {
 695                 pci_read_config_word(pdev, PCI_STATUS, &status);
 696                 if (!(status & PCI_STATUS_66MHZ)) {
 697                         all_are_66mhz = 0;
 698                         break;
 699                 }
 700         }
 701 out:
 702         pbm->all_devs_66mhz = all_are_66mhz;
 703
 704         printk("PCI%d(PBM%c): Bus running at %dMHz\n",
 705                pbm->parent->index,
 706                (pbm == &pbm->parent->pbm_A) ? 'A' : 'B',
 707                (all_are_66mhz ? 66 : 33));
 708 }
 709
 710 void pci_setup_busmastering(struct pci_pbm_info *pbm,
 711                             struct pci_bus *pbus)
 712 {
 713         struct pci_dev *dev;
 714         struct pci_bus *bus;
 715         int is_66mhz;
 716
 717         is_66mhz = pbm->is_66mhz_capable && pbm->all_devs_66mhz;
 718
 719         list_for_each_entry(dev, &pbus->devices, bus_list)
 720                 pdev_setup_busmastering(dev, is_66mhz);
 721
 722         list_for_each_entry(bus, &pbus->children, node)
 723                 pci_setup_busmastering(pbm, bus);
 724 }
 725
 726 void pci_register_legacy_regions(struct resource *io_res,
 727                                  struct resource *mem_res)
 728 {
 729         struct resource *p;
 730
 731         /* VGA Video RAM. */
 732         p = kzalloc(sizeof(*p), GFP_KERNEL);
 733         if (!p)
 734                 return;
 735
 736         p->name = "Video RAM area";
 737         p->start = mem_res->start + 0xa0000UL;
 738         p->end = p->start + 0x1ffffUL;
 739         p->flags = IORESOURCE_BUSY;
 740         request_resource(mem_res, p);
 741
 742         p = kzalloc(sizeof(*p), GFP_KERNEL);
 743         if (!p)
 744                 return;
 745
 746         p->name = "System ROM";
 747         p->start = mem_res->start + 0xf0000UL;
 748         p->end = p->start + 0xffffUL;
 749         p->flags = IORESOURCE_BUSY;
 750         request_resource(mem_res, p);
 751
 752         p = kzalloc(sizeof(*p), GFP_KERNEL);
 753         if (!p)
 754                 return;
 755
 756         p->name = "Video ROM";
 757         p->start = mem_res->start + 0xc0000UL;
 758         p->end = p->start + 0x7fffUL;
 759         p->flags = IORESOURCE_BUSY;
 760         request_resource(mem_res, p);
 761 }
 762
 763 /* Generic helper routines for PCI error reporting. */
 764 void pci_scan_for_target_abort(struct pci_controller_info *p,
 765                                struct pci_pbm_info *pbm,
 766                                struct pci_bus *pbus)
 767 {
 768         struct pci_dev *pdev;
 769         struct pci_bus *bus;
 770
 771         list_for_each_entry(pdev, &pbus->devices, bus_list) {
 772                 u16 status, error_bits;
 773
 774                 pci_read_config_word(pdev, PCI_STATUS, &status);
 775                 error_bits =
 776                         (status & (PCI_STATUS_SIG_TARGET_ABORT |
 777                                    PCI_STATUS_REC_TARGET_ABORT));
 778                 if (error_bits) {
 779                         pci_write_config_word(pdev, PCI_STATUS, error_bits);
 780                         printk("PCI%d(PBM%c): Device [%s] saw Target Abort [%016x]\n",
 781                                p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
 782                                pci_name(pdev), status);
 783                 }
 784         }
 785
 786         list_for_each_entry(bus, &pbus->children, node)
 787                 pci_scan_for_target_abort(p, pbm, bus);
 788 }
 789
 790 void pci_scan_for_master_abort(struct pci_controller_info *p,
 791                                struct pci_pbm_info *pbm,
 792                                struct pci_bus *pbus)
 793 {
 794         struct pci_dev *pdev;
 795         struct pci_bus *bus;
 796
 797         list_for_each_entry(pdev, &pbus->devices, bus_list) {
 798                 u16 status, error_bits;
 799
 800                 pci_read_config_word(pdev, PCI_STATUS, &status);
 801                 error_bits =
 802                         (status & (PCI_STATUS_REC_MASTER_ABORT));
 803                 if (error_bits) {
 804                         pci_write_config_word(pdev, PCI_STATUS, error_bits);
 805                         printk("PCI%d(PBM%c): Device [%s] received Master Abort [%016x]\n",
 806                                p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
 807                                pci_name(pdev), status);
 808                 }
 809         }
 810
 811         list_for_each_entry(bus, &pbus->children, node)
 812                 pci_scan_for_master_abort(p, pbm, bus);
 813 }
 814
 815 void pci_scan_for_parity_error(struct pci_controller_info *p,
 816                                struct pci_pbm_info *pbm,
 817                                struct pci_bus *pbus)
 818 {
 819         struct pci_dev *pdev;
 820         struct pci_bus *bus;
 821
 822         list_for_each_entry(pdev, &pbus->devices, bus_list) {
 823                 u16 status, error_bits;
 824
 825                 pci_read_config_word(pdev, PCI_STATUS, &status);
 826                 error_bits =
 827                         (status & (PCI_STATUS_PARITY |
 828                                    PCI_STATUS_DETECTED_PARITY));
 829                 if (error_bits) {
 830                         pci_write_config_word(pdev, PCI_STATUS, error_bits);
 831                         printk("PCI%d(PBM%c): Device [%s] saw Parity Error [%016x]\n",
 832                                p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
 833                                pci_name(pdev), status);
 834                 }
 835         }
 836
 837         list_for_each_entry(bus, &pbus->children, node)
 838                 pci_scan_for_parity_error(p, pbm, bus);
 839 }