1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 * Based largely on code which is:
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
12 #include <linux/errno.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/profile.h>
32 #include <linux/miscdevice.h>
33 #include <linux/rtc.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/clockchips.h>
36 #include <linux/clocksource.h>
38 #include <asm/oplib.h>
39 #include <asm/mostek.h>
40 #include <asm/timer.h>
44 #include <asm/of_device.h>
45 #include <asm/starfire.h>
47 #include <asm/sections.h>
48 #include <asm/cpudata.h>
49 #include <asm/uaccess.h>
51 #include <asm/irq_regs.h>
53 DEFINE_SPINLOCK(mostek_lock
);
54 DEFINE_SPINLOCK(rtc_lock
);
55 void __iomem
*mstk48t02_regs
= NULL
;
57 unsigned long ds1287_regs
= 0UL;
58 static void __iomem
*bq4802_regs
;
61 static void __iomem
*mstk48t08_regs
;
62 static void __iomem
*mstk48t59_regs
;
64 static int set_rtc_mmss(unsigned long);
66 #define TICK_PRIV_BIT (1UL << 63)
67 #define TICKCMP_IRQ_BIT (1UL << 63)
70 unsigned long profile_pc(struct pt_regs
*regs
)
72 unsigned long pc
= instruction_pointer(regs
);
74 if (in_lock_functions(pc
))
75 return regs
->u_regs
[UREG_RETPC
];
78 EXPORT_SYMBOL(profile_pc
);
81 static void tick_disable_protection(void)
83 /* Set things up so user can access tick register for profiling
84 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
85 * read back of %tick after writing it.
91 "1: rd %%tick, %%g2\n"
92 " add %%g2, 6, %%g2\n"
93 " andn %%g2, %0, %%g2\n"
94 " wrpr %%g2, 0, %%tick\n"
101 static void tick_disable_irq(void)
103 __asm__
__volatile__(
107 "1: wr %0, 0x0, %%tick_cmpr\n"
108 " rd %%tick_cmpr, %%g0"
110 : "r" (TICKCMP_IRQ_BIT
));
113 static void tick_init_tick(void)
115 tick_disable_protection();
119 static unsigned long tick_get_tick(void)
123 __asm__
__volatile__("rd %%tick, %0\n\t"
127 return ret
& ~TICK_PRIV_BIT
;
130 static int tick_add_compare(unsigned long adj
)
132 unsigned long orig_tick
, new_tick
, new_compare
;
134 __asm__
__volatile__("rd %%tick, %0"
137 orig_tick
&= ~TICKCMP_IRQ_BIT
;
139 /* Workaround for Spitfire Errata (#54 I think??), I discovered
140 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
143 * On Blackbird writes to %tick_cmpr can fail, the
144 * workaround seems to be to execute the wr instruction
145 * at the start of an I-cache line, and perform a dummy
146 * read back from %tick_cmpr right after writing to it. -DaveM
148 __asm__
__volatile__("ba,pt %%xcc, 1f\n\t"
149 " add %1, %2, %0\n\t"
152 "wr %0, 0, %%tick_cmpr\n\t"
153 "rd %%tick_cmpr, %%g0\n\t"
155 : "r" (orig_tick
), "r" (adj
));
157 __asm__
__volatile__("rd %%tick, %0"
159 new_tick
&= ~TICKCMP_IRQ_BIT
;
161 return ((long)(new_tick
- (orig_tick
+adj
))) > 0L;
164 static unsigned long tick_add_tick(unsigned long adj
)
166 unsigned long new_tick
;
168 /* Also need to handle Blackbird bug here too. */
169 __asm__
__volatile__("rd %%tick, %0\n\t"
171 "wrpr %0, 0, %%tick\n\t"
178 static struct sparc64_tick_ops tick_operations __read_mostly
= {
180 .init_tick
= tick_init_tick
,
181 .disable_irq
= tick_disable_irq
,
182 .get_tick
= tick_get_tick
,
183 .add_tick
= tick_add_tick
,
184 .add_compare
= tick_add_compare
,
185 .softint_mask
= 1UL << 0,
188 struct sparc64_tick_ops
*tick_ops __read_mostly
= &tick_operations
;
190 static void stick_disable_irq(void)
192 __asm__
__volatile__(
193 "wr %0, 0x0, %%asr25"
195 : "r" (TICKCMP_IRQ_BIT
));
198 static void stick_init_tick(void)
200 /* Writes to the %tick and %stick register are not
201 * allowed on sun4v. The Hypervisor controls that
204 if (tlb_type
!= hypervisor
) {
205 tick_disable_protection();
208 /* Let the user get at STICK too. */
209 __asm__
__volatile__(
210 " rd %%asr24, %%g2\n"
211 " andn %%g2, %0, %%g2\n"
212 " wr %%g2, 0, %%asr24"
214 : "r" (TICK_PRIV_BIT
)
221 static unsigned long stick_get_tick(void)
225 __asm__
__volatile__("rd %%asr24, %0"
228 return ret
& ~TICK_PRIV_BIT
;
231 static unsigned long stick_add_tick(unsigned long adj
)
233 unsigned long new_tick
;
235 __asm__
__volatile__("rd %%asr24, %0\n\t"
237 "wr %0, 0, %%asr24\n\t"
244 static int stick_add_compare(unsigned long adj
)
246 unsigned long orig_tick
, new_tick
;
248 __asm__
__volatile__("rd %%asr24, %0"
250 orig_tick
&= ~TICKCMP_IRQ_BIT
;
252 __asm__
__volatile__("wr %0, 0, %%asr25"
254 : "r" (orig_tick
+ adj
));
256 __asm__
__volatile__("rd %%asr24, %0"
258 new_tick
&= ~TICKCMP_IRQ_BIT
;
260 return ((long)(new_tick
- (orig_tick
+adj
))) > 0L;
263 static struct sparc64_tick_ops stick_operations __read_mostly
= {
265 .init_tick
= stick_init_tick
,
266 .disable_irq
= stick_disable_irq
,
267 .get_tick
= stick_get_tick
,
268 .add_tick
= stick_add_tick
,
269 .add_compare
= stick_add_compare
,
270 .softint_mask
= 1UL << 16,
273 /* On Hummingbird the STICK/STICK_CMPR register is implemented
274 * in I/O space. There are two 64-bit registers each, the
275 * first holds the low 32-bits of the value and the second holds
278 * Since STICK is constantly updating, we have to access it carefully.
280 * The sequence we use to read is:
283 * 3) read high again, if it rolled re-read both low and high again.
285 * Writing STICK safely is also tricky:
286 * 1) write low to zero
290 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
291 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
293 static unsigned long __hbird_read_stick(void)
295 unsigned long ret
, tmp1
, tmp2
, tmp3
;
296 unsigned long addr
= HBIRD_STICK_ADDR
+8;
298 __asm__
__volatile__("ldxa [%1] %5, %2\n"
300 "sub %1, 0x8, %1\n\t"
301 "ldxa [%1] %5, %3\n\t"
302 "add %1, 0x8, %1\n\t"
303 "ldxa [%1] %5, %4\n\t"
305 "bne,a,pn %%xcc, 1b\n\t"
307 "sllx %4, 32, %4\n\t"
309 : "=&r" (ret
), "=&r" (addr
),
310 "=&r" (tmp1
), "=&r" (tmp2
), "=&r" (tmp3
)
311 : "i" (ASI_PHYS_BYPASS_EC_E
), "1" (addr
));
316 static void __hbird_write_stick(unsigned long val
)
318 unsigned long low
= (val
& 0xffffffffUL
);
319 unsigned long high
= (val
>> 32UL);
320 unsigned long addr
= HBIRD_STICK_ADDR
;
322 __asm__
__volatile__("stxa %%g0, [%0] %4\n\t"
323 "add %0, 0x8, %0\n\t"
324 "stxa %3, [%0] %4\n\t"
325 "sub %0, 0x8, %0\n\t"
328 : "0" (addr
), "r" (low
), "r" (high
),
329 "i" (ASI_PHYS_BYPASS_EC_E
));
332 static void __hbird_write_compare(unsigned long val
)
334 unsigned long low
= (val
& 0xffffffffUL
);
335 unsigned long high
= (val
>> 32UL);
336 unsigned long addr
= HBIRD_STICKCMP_ADDR
+ 0x8UL
;
338 __asm__
__volatile__("stxa %3, [%0] %4\n\t"
339 "sub %0, 0x8, %0\n\t"
342 : "0" (addr
), "r" (low
), "r" (high
),
343 "i" (ASI_PHYS_BYPASS_EC_E
));
346 static void hbtick_disable_irq(void)
348 __hbird_write_compare(TICKCMP_IRQ_BIT
);
351 static void hbtick_init_tick(void)
353 tick_disable_protection();
355 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
356 * XXX into actually sending STICK interrupts. I think because
357 * XXX of how we store %tick_cmpr in head.S this somehow resets the
358 * XXX {TICK + STICK} interrupt mux. -DaveM
360 __hbird_write_stick(__hbird_read_stick());
362 hbtick_disable_irq();
365 static unsigned long hbtick_get_tick(void)
367 return __hbird_read_stick() & ~TICK_PRIV_BIT
;
370 static unsigned long hbtick_add_tick(unsigned long adj
)
374 val
= __hbird_read_stick() + adj
;
375 __hbird_write_stick(val
);
380 static int hbtick_add_compare(unsigned long adj
)
382 unsigned long val
= __hbird_read_stick();
385 val
&= ~TICKCMP_IRQ_BIT
;
387 __hbird_write_compare(val
);
389 val2
= __hbird_read_stick() & ~TICKCMP_IRQ_BIT
;
391 return ((long)(val2
- val
)) > 0L;
394 static struct sparc64_tick_ops hbtick_operations __read_mostly
= {
396 .init_tick
= hbtick_init_tick
,
397 .disable_irq
= hbtick_disable_irq
,
398 .get_tick
= hbtick_get_tick
,
399 .add_tick
= hbtick_add_tick
,
400 .add_compare
= hbtick_add_compare
,
401 .softint_mask
= 1UL << 0,
404 static unsigned long timer_ticks_per_nsec_quotient __read_mostly
;
406 int update_persistent_clock(struct timespec now
)
408 return set_rtc_mmss(now
.tv_sec
);
411 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
412 static void __init
kick_start_clock(void)
414 void __iomem
*regs
= mstk48t02_regs
;
418 prom_printf("CLOCK: Clock was stopped. Kick start ");
420 spin_lock_irq(&mostek_lock
);
422 /* Turn on the kick start bit to start the oscillator. */
423 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
424 tmp
|= MSTK_CREG_WRITE
;
425 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
426 tmp
= mostek_read(regs
+ MOSTEK_SEC
);
428 mostek_write(regs
+ MOSTEK_SEC
, tmp
);
429 tmp
= mostek_read(regs
+ MOSTEK_HOUR
);
430 tmp
|= MSTK_KICK_START
;
431 mostek_write(regs
+ MOSTEK_HOUR
, tmp
);
432 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
433 tmp
&= ~MSTK_CREG_WRITE
;
434 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
436 spin_unlock_irq(&mostek_lock
);
438 /* Delay to allow the clock oscillator to start. */
439 sec
= MSTK_REG_SEC(regs
);
440 for (i
= 0; i
< 3; i
++) {
441 while (sec
== MSTK_REG_SEC(regs
))
442 for (count
= 0; count
< 100000; count
++)
445 sec
= MSTK_REG_SEC(regs
);
449 spin_lock_irq(&mostek_lock
);
451 /* Turn off kick start and set a "valid" time and date. */
452 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
453 tmp
|= MSTK_CREG_WRITE
;
454 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
455 tmp
= mostek_read(regs
+ MOSTEK_HOUR
);
456 tmp
&= ~MSTK_KICK_START
;
457 mostek_write(regs
+ MOSTEK_HOUR
, tmp
);
458 MSTK_SET_REG_SEC(regs
,0);
459 MSTK_SET_REG_MIN(regs
,0);
460 MSTK_SET_REG_HOUR(regs
,0);
461 MSTK_SET_REG_DOW(regs
,5);
462 MSTK_SET_REG_DOM(regs
,1);
463 MSTK_SET_REG_MONTH(regs
,8);
464 MSTK_SET_REG_YEAR(regs
,1996 - MSTK_YEAR_ZERO
);
465 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
466 tmp
&= ~MSTK_CREG_WRITE
;
467 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
469 spin_unlock_irq(&mostek_lock
);
471 /* Ensure the kick start bit is off. If it isn't, turn it off. */
472 while (mostek_read(regs
+ MOSTEK_HOUR
) & MSTK_KICK_START
) {
473 prom_printf("CLOCK: Kick start still on!\n");
475 spin_lock_irq(&mostek_lock
);
477 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
478 tmp
|= MSTK_CREG_WRITE
;
479 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
481 tmp
= mostek_read(regs
+ MOSTEK_HOUR
);
482 tmp
&= ~MSTK_KICK_START
;
483 mostek_write(regs
+ MOSTEK_HOUR
, tmp
);
485 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
486 tmp
&= ~MSTK_CREG_WRITE
;
487 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
489 spin_unlock_irq(&mostek_lock
);
492 prom_printf("CLOCK: Kick start procedure successful.\n");
495 /* Return nonzero if the clock chip battery is low. */
496 static int __init
has_low_battery(void)
498 void __iomem
*regs
= mstk48t02_regs
;
501 spin_lock_irq(&mostek_lock
);
503 data1
= mostek_read(regs
+ MOSTEK_EEPROM
); /* Read some data. */
504 mostek_write(regs
+ MOSTEK_EEPROM
, ~data1
); /* Write back the complement. */
505 data2
= mostek_read(regs
+ MOSTEK_EEPROM
); /* Read back the complement. */
506 mostek_write(regs
+ MOSTEK_EEPROM
, data1
); /* Restore original value. */
508 spin_unlock_irq(&mostek_lock
);
510 return (data1
== data2
); /* Was the write blocked? */
513 /* Probe for the real time clock chip. */
514 static void __init
set_system_time(void)
516 unsigned int year
, mon
, day
, hour
, min
, sec
;
517 void __iomem
*mregs
= mstk48t02_regs
;
519 unsigned long dregs
= ds1287_regs
;
520 void __iomem
*bregs
= bq4802_regs
;
522 unsigned long dregs
= 0UL;
523 void __iomem
*bregs
= 0UL;
527 if (!mregs
&& !dregs
&& !bregs
) {
528 prom_printf("Something wrong, clock regs not mapped yet.\n");
533 spin_lock_irq(&mostek_lock
);
535 /* Traditional Mostek chip. */
536 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
537 tmp
|= MSTK_CREG_READ
;
538 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
540 sec
= MSTK_REG_SEC(mregs
);
541 min
= MSTK_REG_MIN(mregs
);
542 hour
= MSTK_REG_HOUR(mregs
);
543 day
= MSTK_REG_DOM(mregs
);
544 mon
= MSTK_REG_MONTH(mregs
);
545 year
= MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs
) );
547 unsigned char val
= readb(bregs
+ 0x0e);
548 unsigned int century
;
550 /* BQ4802 RTC chip. */
552 writeb(val
| 0x08, bregs
+ 0x0e);
554 sec
= readb(bregs
+ 0x00);
555 min
= readb(bregs
+ 0x02);
556 hour
= readb(bregs
+ 0x04);
557 day
= readb(bregs
+ 0x06);
558 mon
= readb(bregs
+ 0x09);
559 year
= readb(bregs
+ 0x0a);
560 century
= readb(bregs
+ 0x0f);
562 writeb(val
, bregs
+ 0x0e);
572 year
+= (century
* 100);
574 /* Dallas 12887 RTC chip. */
577 sec
= CMOS_READ(RTC_SECONDS
);
578 min
= CMOS_READ(RTC_MINUTES
);
579 hour
= CMOS_READ(RTC_HOURS
);
580 day
= CMOS_READ(RTC_DAY_OF_MONTH
);
581 mon
= CMOS_READ(RTC_MONTH
);
582 year
= CMOS_READ(RTC_YEAR
);
583 } while (sec
!= CMOS_READ(RTC_SECONDS
));
585 if (!(CMOS_READ(RTC_CONTROL
) & RTC_DM_BINARY
) || RTC_ALWAYS_BCD
) {
593 if ((year
+= 1900) < 1970)
597 xtime
.tv_sec
= mktime(year
, mon
, day
, hour
, min
, sec
);
598 xtime
.tv_nsec
= (INITIAL_JIFFIES
% HZ
) * (NSEC_PER_SEC
/ HZ
);
599 set_normalized_timespec(&wall_to_monotonic
,
600 -xtime
.tv_sec
, -xtime
.tv_nsec
);
603 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
604 tmp
&= ~MSTK_CREG_READ
;
605 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
607 spin_unlock_irq(&mostek_lock
);
611 /* davem suggests we keep this within the 4M locked kernel image */
612 static u32
starfire_get_time(void)
614 static char obp_gettod
[32];
617 sprintf(obp_gettod
, "h# %08x unix-gettod",
618 (unsigned int) (long) &unix_tod
);
619 prom_feval(obp_gettod
);
624 static int starfire_set_time(u32 val
)
626 /* Do nothing, time is set using the service processor
627 * console on this platform.
632 static u32
hypervisor_get_time(void)
634 unsigned long ret
, time
;
638 ret
= sun4v_tod_get(&time
);
641 if (ret
== HV_EWOULDBLOCK
) {
646 printk(KERN_WARNING
"SUN4V: tod_get() timed out.\n");
649 printk(KERN_WARNING
"SUN4V: tod_get() not supported.\n");
653 static int hypervisor_set_time(u32 secs
)
659 ret
= sun4v_tod_set(secs
);
662 if (ret
== HV_EWOULDBLOCK
) {
667 printk(KERN_WARNING
"SUN4V: tod_set() timed out.\n");
670 printk(KERN_WARNING
"SUN4V: tod_set() not supported.\n");
674 static int __init
clock_model_matches(const char *model
)
676 if (strcmp(model
, "mk48t02") &&
677 strcmp(model
, "mk48t08") &&
678 strcmp(model
, "mk48t59") &&
679 strcmp(model
, "m5819") &&
680 strcmp(model
, "m5819p") &&
681 strcmp(model
, "m5823") &&
682 strcmp(model
, "ds1287") &&
683 strcmp(model
, "bq4802"))
689 static int __devinit
clock_probe(struct of_device
*op
, const struct of_device_id
*match
)
691 struct device_node
*dp
= op
->node
;
692 const char *model
= of_get_property(dp
, "model", NULL
);
693 const char *compat
= of_get_property(dp
, "compatible", NULL
);
694 unsigned long size
, flags
;
700 if (!model
|| !clock_model_matches(model
))
703 /* On an Enterprise system there can be multiple mostek clocks.
704 * We should only match the one that is on the central FHC bus.
706 if (!strcmp(dp
->parent
->name
, "fhc") &&
707 strcmp(dp
->parent
->parent
->name
, "central") != 0)
710 size
= (op
->resource
[0].end
- op
->resource
[0].start
) + 1;
711 regs
= of_ioremap(&op
->resource
[0], 0, size
, "clock");
716 if (!strcmp(model
, "ds1287") ||
717 !strcmp(model
, "m5819") ||
718 !strcmp(model
, "m5819p") ||
719 !strcmp(model
, "m5823")) {
720 ds1287_regs
= (unsigned long) regs
;
721 } else if (!strcmp(model
, "bq4802")) {
725 if (model
[5] == '0' && model
[6] == '2') {
726 mstk48t02_regs
= regs
;
727 } else if(model
[5] == '0' && model
[6] == '8') {
728 mstk48t08_regs
= regs
;
729 mstk48t02_regs
= mstk48t08_regs
+ MOSTEK_48T08_48T02
;
731 mstk48t59_regs
= regs
;
732 mstk48t02_regs
= mstk48t59_regs
+ MOSTEK_48T59_48T02
;
735 printk(KERN_INFO
"%s: Clock regs at %p\n", dp
->full_name
, regs
);
737 local_irq_save(flags
);
739 if (mstk48t02_regs
!= NULL
) {
740 /* Report a low battery voltage condition. */
741 if (has_low_battery())
742 prom_printf("NVRAM: Low battery voltage!\n");
744 /* Kick start the clock if it is completely stopped. */
745 if (mostek_read(mstk48t02_regs
+ MOSTEK_SEC
) & MSTK_STOP
)
751 local_irq_restore(flags
);
756 static struct of_device_id clock_match
[] = {
766 static struct of_platform_driver clock_driver
= {
768 .match_table
= clock_match
,
769 .probe
= clock_probe
,
772 static int __init
clock_init(void)
774 if (this_is_starfire
) {
775 xtime
.tv_sec
= starfire_get_time();
776 xtime
.tv_nsec
= (INITIAL_JIFFIES
% HZ
) * (NSEC_PER_SEC
/ HZ
);
777 set_normalized_timespec(&wall_to_monotonic
,
778 -xtime
.tv_sec
, -xtime
.tv_nsec
);
781 if (tlb_type
== hypervisor
) {
782 xtime
.tv_sec
= hypervisor_get_time();
783 xtime
.tv_nsec
= (INITIAL_JIFFIES
% HZ
) * (NSEC_PER_SEC
/ HZ
);
784 set_normalized_timespec(&wall_to_monotonic
,
785 -xtime
.tv_sec
, -xtime
.tv_nsec
);
789 return of_register_driver(&clock_driver
, &of_platform_bus_type
);
792 /* Must be after subsys_initcall() so that busses are probed. Must
793 * be before device_initcall() because things like the RTC driver
794 * need to see the clock registers.
796 fs_initcall(clock_init
);
798 /* This is gets the master TICK_INT timer going. */
799 static unsigned long sparc64_init_timers(void)
801 struct device_node
*dp
;
804 dp
= of_find_node_by_path("/");
805 if (tlb_type
== spitfire
) {
806 unsigned long ver
, manuf
, impl
;
808 __asm__
__volatile__ ("rdpr %%ver, %0"
810 manuf
= ((ver
>> 48) & 0xffff);
811 impl
= ((ver
>> 32) & 0xffff);
812 if (manuf
== 0x17 && impl
== 0x13) {
813 /* Hummingbird, aka Ultra-IIe */
814 tick_ops
= &hbtick_operations
;
815 clock
= of_getintprop_default(dp
, "stick-frequency", 0);
817 tick_ops
= &tick_operations
;
818 clock
= local_cpu_data().clock_tick
;
821 tick_ops
= &stick_operations
;
822 clock
= of_getintprop_default(dp
, "stick-frequency", 0);
829 unsigned long clock_tick_ref
;
830 unsigned int ref_freq
;
832 static DEFINE_PER_CPU(struct freq_table
, sparc64_freq_table
) = { 0, 0 };
834 unsigned long sparc64_get_clock_tick(unsigned int cpu
)
836 struct freq_table
*ft
= &per_cpu(sparc64_freq_table
, cpu
);
838 if (ft
->clock_tick_ref
)
839 return ft
->clock_tick_ref
;
840 return cpu_data(cpu
).clock_tick
;
843 #ifdef CONFIG_CPU_FREQ
845 static int sparc64_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
848 struct cpufreq_freqs
*freq
= data
;
849 unsigned int cpu
= freq
->cpu
;
850 struct freq_table
*ft
= &per_cpu(sparc64_freq_table
, cpu
);
853 ft
->ref_freq
= freq
->old
;
854 ft
->clock_tick_ref
= cpu_data(cpu
).clock_tick
;
856 if ((val
== CPUFREQ_PRECHANGE
&& freq
->old
< freq
->new) ||
857 (val
== CPUFREQ_POSTCHANGE
&& freq
->old
> freq
->new) ||
858 (val
== CPUFREQ_RESUMECHANGE
)) {
859 cpu_data(cpu
).clock_tick
=
860 cpufreq_scale(ft
->clock_tick_ref
,
868 static struct notifier_block sparc64_cpufreq_notifier_block
= {
869 .notifier_call
= sparc64_cpufreq_notifier
872 #endif /* CONFIG_CPU_FREQ */
874 static int sparc64_next_event(unsigned long delta
,
875 struct clock_event_device
*evt
)
877 return tick_ops
->add_compare(delta
) ? -ETIME
: 0;
880 static void sparc64_timer_setup(enum clock_event_mode mode
,
881 struct clock_event_device
*evt
)
884 case CLOCK_EVT_MODE_ONESHOT
:
885 case CLOCK_EVT_MODE_RESUME
:
888 case CLOCK_EVT_MODE_SHUTDOWN
:
889 tick_ops
->disable_irq();
892 case CLOCK_EVT_MODE_PERIODIC
:
893 case CLOCK_EVT_MODE_UNUSED
:
899 static struct clock_event_device sparc64_clockevent
= {
900 .features
= CLOCK_EVT_FEAT_ONESHOT
,
901 .set_mode
= sparc64_timer_setup
,
902 .set_next_event
= sparc64_next_event
,
907 static DEFINE_PER_CPU(struct clock_event_device
, sparc64_events
);
909 void timer_interrupt(int irq
, struct pt_regs
*regs
)
911 struct pt_regs
*old_regs
= set_irq_regs(regs
);
912 unsigned long tick_mask
= tick_ops
->softint_mask
;
913 int cpu
= smp_processor_id();
914 struct clock_event_device
*evt
= &per_cpu(sparc64_events
, cpu
);
916 clear_softint(tick_mask
);
920 kstat_this_cpu
.irqs
[0]++;
922 if (unlikely(!evt
->event_handler
)) {
924 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu
);
926 evt
->event_handler(evt
);
930 set_irq_regs(old_regs
);
933 void __devinit
setup_sparc64_timer(void)
935 struct clock_event_device
*sevt
;
936 unsigned long pstate
;
938 /* Guarantee that the following sequences execute
941 __asm__
__volatile__("rdpr %%pstate, %0\n\t"
942 "wrpr %0, %1, %%pstate"
946 tick_ops
->init_tick();
948 /* Restore PSTATE_IE. */
949 __asm__
__volatile__("wrpr %0, 0x0, %%pstate"
953 sevt
= &__get_cpu_var(sparc64_events
);
955 memcpy(sevt
, &sparc64_clockevent
, sizeof(*sevt
));
956 sevt
->cpumask
= cpumask_of_cpu(smp_processor_id());
958 clockevents_register_device(sevt
);
961 #define SPARC64_NSEC_PER_CYC_SHIFT 10UL
963 static struct clocksource clocksource_tick
= {
965 .mask
= CLOCKSOURCE_MASK(64),
967 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
970 static void __init
setup_clockevent_multiplier(unsigned long hz
)
972 unsigned long mult
, shift
= 32;
975 mult
= div_sc(hz
, NSEC_PER_SEC
, shift
);
976 if (mult
&& (mult
>> 32UL) == 0UL)
982 sparc64_clockevent
.shift
= shift
;
983 sparc64_clockevent
.mult
= mult
;
986 static unsigned long tb_ticks_per_usec __read_mostly
;
988 void __delay(unsigned long loops
)
990 unsigned long bclock
, now
;
992 bclock
= tick_ops
->get_tick();
994 now
= tick_ops
->get_tick();
995 } while ((now
-bclock
) < loops
);
997 EXPORT_SYMBOL(__delay
);
999 void udelay(unsigned long usecs
)
1001 __delay(tb_ticks_per_usec
* usecs
);
1003 EXPORT_SYMBOL(udelay
);
1005 void __init
time_init(void)
1007 unsigned long clock
= sparc64_init_timers();
1009 tb_ticks_per_usec
= clock
/ USEC_PER_SEC
;
1011 timer_ticks_per_nsec_quotient
=
1012 clocksource_hz2mult(clock
, SPARC64_NSEC_PER_CYC_SHIFT
);
1014 clocksource_tick
.name
= tick_ops
->name
;
1015 clocksource_tick
.mult
=
1016 clocksource_hz2mult(clock
,
1017 clocksource_tick
.shift
);
1018 clocksource_tick
.read
= tick_ops
->get_tick
;
1020 printk("clocksource: mult[%x] shift[%d]\n",
1021 clocksource_tick
.mult
, clocksource_tick
.shift
);
1023 clocksource_register(&clocksource_tick
);
1025 sparc64_clockevent
.name
= tick_ops
->name
;
1027 setup_clockevent_multiplier(clock
);
1029 sparc64_clockevent
.max_delta_ns
=
1030 clockevent_delta2ns(0x7fffffffffffffff, &sparc64_clockevent
);
1031 sparc64_clockevent
.min_delta_ns
=
1032 clockevent_delta2ns(0xF, &sparc64_clockevent
);
1034 printk("clockevent: mult[%lx] shift[%d]\n",
1035 sparc64_clockevent
.mult
, sparc64_clockevent
.shift
);
1037 setup_sparc64_timer();
1039 #ifdef CONFIG_CPU_FREQ
1040 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block
,
1041 CPUFREQ_TRANSITION_NOTIFIER
);
1045 unsigned long long sched_clock(void)
1047 unsigned long ticks
= tick_ops
->get_tick();
1049 return (ticks
* timer_ticks_per_nsec_quotient
)
1050 >> SPARC64_NSEC_PER_CYC_SHIFT
;
1053 static int set_rtc_mmss(unsigned long nowtime
)
1055 int real_seconds
, real_minutes
, chip_minutes
;
1056 void __iomem
*mregs
= mstk48t02_regs
;
1058 unsigned long dregs
= ds1287_regs
;
1059 void __iomem
*bregs
= bq4802_regs
;
1061 unsigned long dregs
= 0UL;
1062 void __iomem
*bregs
= 0UL;
1064 unsigned long flags
;
1068 * Not having a register set can lead to trouble.
1069 * Also starfire doesn't have a tod clock.
1071 if (!mregs
&& !dregs
& !bregs
)
1075 spin_lock_irqsave(&mostek_lock
, flags
);
1077 /* Read the current RTC minutes. */
1078 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1079 tmp
|= MSTK_CREG_READ
;
1080 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1082 chip_minutes
= MSTK_REG_MIN(mregs
);
1084 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1085 tmp
&= ~MSTK_CREG_READ
;
1086 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1089 * since we're only adjusting minutes and seconds,
1090 * don't interfere with hour overflow. This avoids
1091 * messing with unknown time zones but requires your
1092 * RTC not to be off by more than 15 minutes
1094 real_seconds
= nowtime
% 60;
1095 real_minutes
= nowtime
/ 60;
1096 if (((abs(real_minutes
- chip_minutes
) + 15)/30) & 1)
1097 real_minutes
+= 30; /* correct for half hour time zone */
1100 if (abs(real_minutes
- chip_minutes
) < 30) {
1101 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1102 tmp
|= MSTK_CREG_WRITE
;
1103 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1105 MSTK_SET_REG_SEC(mregs
,real_seconds
);
1106 MSTK_SET_REG_MIN(mregs
,real_minutes
);
1108 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1109 tmp
&= ~MSTK_CREG_WRITE
;
1110 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1112 spin_unlock_irqrestore(&mostek_lock
, flags
);
1116 spin_unlock_irqrestore(&mostek_lock
, flags
);
1122 unsigned char val
= readb(bregs
+ 0x0e);
1124 /* BQ4802 RTC chip. */
1126 writeb(val
| 0x08, bregs
+ 0x0e);
1128 chip_minutes
= readb(bregs
+ 0x02);
1129 BCD_TO_BIN(chip_minutes
);
1130 real_seconds
= nowtime
% 60;
1131 real_minutes
= nowtime
/ 60;
1132 if (((abs(real_minutes
- chip_minutes
) + 15)/30) & 1)
1136 if (abs(real_minutes
- chip_minutes
) < 30) {
1137 BIN_TO_BCD(real_seconds
);
1138 BIN_TO_BCD(real_minutes
);
1139 writeb(real_seconds
, bregs
+ 0x00);
1140 writeb(real_minutes
, bregs
+ 0x02);
1143 "set_rtc_mmss: can't update from %d to %d\n",
1144 chip_minutes
, real_minutes
);
1148 writeb(val
, bregs
+ 0x0e);
1153 unsigned char save_control
, save_freq_select
;
1155 /* Stolen from arch/i386/kernel/time.c, see there for
1156 * credits and descriptive comments.
1158 spin_lock_irqsave(&rtc_lock
, flags
);
1159 save_control
= CMOS_READ(RTC_CONTROL
); /* tell the clock it's being set */
1160 CMOS_WRITE((save_control
|RTC_SET
), RTC_CONTROL
);
1162 save_freq_select
= CMOS_READ(RTC_FREQ_SELECT
); /* stop and reset prescaler */
1163 CMOS_WRITE((save_freq_select
|RTC_DIV_RESET2
), RTC_FREQ_SELECT
);
1165 chip_minutes
= CMOS_READ(RTC_MINUTES
);
1166 if (!(save_control
& RTC_DM_BINARY
) || RTC_ALWAYS_BCD
)
1167 BCD_TO_BIN(chip_minutes
);
1168 real_seconds
= nowtime
% 60;
1169 real_minutes
= nowtime
/ 60;
1170 if (((abs(real_minutes
- chip_minutes
) + 15)/30) & 1)
1174 if (abs(real_minutes
- chip_minutes
) < 30) {
1175 if (!(save_control
& RTC_DM_BINARY
) || RTC_ALWAYS_BCD
) {
1176 BIN_TO_BCD(real_seconds
);
1177 BIN_TO_BCD(real_minutes
);
1179 CMOS_WRITE(real_seconds
,RTC_SECONDS
);
1180 CMOS_WRITE(real_minutes
,RTC_MINUTES
);
1183 "set_rtc_mmss: can't update from %d to %d\n",
1184 chip_minutes
, real_minutes
);
1188 CMOS_WRITE(save_control
, RTC_CONTROL
);
1189 CMOS_WRITE(save_freq_select
, RTC_FREQ_SELECT
);
1190 spin_unlock_irqrestore(&rtc_lock
, flags
);
1196 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1197 static unsigned char mini_rtc_status
; /* bitmapped status byte. */
1200 #define STARTOFTIME 1970
1201 #define SECDAY 86400L
1202 #define SECYR (SECDAY * 365)
1203 #define leapyear(year) ((year) % 4 == 0 && \
1204 ((year) % 100 != 0 || (year) % 400 == 0))
1205 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1206 #define days_in_month(a) (month_days[(a) - 1])
1208 static int month_days
[12] = {
1209 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1213 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1215 static void GregorianDay(struct rtc_time
* tm
)
1220 int MonthOffset
[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1222 lastYear
= tm
->tm_year
- 1;
1225 * Number of leap corrections to apply up to end of last year
1227 leapsToDate
= lastYear
/ 4 - lastYear
/ 100 + lastYear
/ 400;
1230 * This year is a leap year if it is divisible by 4 except when it is
1231 * divisible by 100 unless it is divisible by 400
1233 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1235 day
= tm
->tm_mon
> 2 && leapyear(tm
->tm_year
);
1237 day
+= lastYear
*365 + leapsToDate
+ MonthOffset
[tm
->tm_mon
-1] +
1240 tm
->tm_wday
= day
% 7;
1243 static void to_tm(int tim
, struct rtc_time
*tm
)
1246 register long hms
, day
;
1251 /* Hours, minutes, seconds are easy */
1252 tm
->tm_hour
= hms
/ 3600;
1253 tm
->tm_min
= (hms
% 3600) / 60;
1254 tm
->tm_sec
= (hms
% 3600) % 60;
1256 /* Number of years in days */
1257 for (i
= STARTOFTIME
; day
>= days_in_year(i
); i
++)
1258 day
-= days_in_year(i
);
1261 /* Number of months in days left */
1262 if (leapyear(tm
->tm_year
))
1263 days_in_month(FEBRUARY
) = 29;
1264 for (i
= 1; day
>= days_in_month(i
); i
++)
1265 day
-= days_in_month(i
);
1266 days_in_month(FEBRUARY
) = 28;
1269 /* Days are what is left over (+1) from all that. */
1270 tm
->tm_mday
= day
+ 1;
1273 * Determine the day of week
1278 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1279 * aka Unix time. So we have to convert to/from rtc_time.
1281 static void starfire_get_rtc_time(struct rtc_time
*time
)
1283 u32 seconds
= starfire_get_time();
1285 to_tm(seconds
, time
);
1286 time
->tm_year
-= 1900;
1290 static int starfire_set_rtc_time(struct rtc_time
*time
)
1292 u32 seconds
= mktime(time
->tm_year
+ 1900, time
->tm_mon
+ 1,
1293 time
->tm_mday
, time
->tm_hour
,
1294 time
->tm_min
, time
->tm_sec
);
1296 return starfire_set_time(seconds
);
1299 static void hypervisor_get_rtc_time(struct rtc_time
*time
)
1301 u32 seconds
= hypervisor_get_time();
1303 to_tm(seconds
, time
);
1304 time
->tm_year
-= 1900;
1308 static int hypervisor_set_rtc_time(struct rtc_time
*time
)
1310 u32 seconds
= mktime(time
->tm_year
+ 1900, time
->tm_mon
+ 1,
1311 time
->tm_mday
, time
->tm_hour
,
1312 time
->tm_min
, time
->tm_sec
);
1314 return hypervisor_set_time(seconds
);
1318 static void bq4802_get_rtc_time(struct rtc_time
*time
)
1320 unsigned char val
= readb(bq4802_regs
+ 0x0e);
1321 unsigned int century
;
1323 writeb(val
| 0x08, bq4802_regs
+ 0x0e);
1325 time
->tm_sec
= readb(bq4802_regs
+ 0x00);
1326 time
->tm_min
= readb(bq4802_regs
+ 0x02);
1327 time
->tm_hour
= readb(bq4802_regs
+ 0x04);
1328 time
->tm_mday
= readb(bq4802_regs
+ 0x06);
1329 time
->tm_mon
= readb(bq4802_regs
+ 0x09);
1330 time
->tm_year
= readb(bq4802_regs
+ 0x0a);
1331 time
->tm_wday
= readb(bq4802_regs
+ 0x08);
1332 century
= readb(bq4802_regs
+ 0x0f);
1334 writeb(val
, bq4802_regs
+ 0x0e);
1336 BCD_TO_BIN(time
->tm_sec
);
1337 BCD_TO_BIN(time
->tm_min
);
1338 BCD_TO_BIN(time
->tm_hour
);
1339 BCD_TO_BIN(time
->tm_mday
);
1340 BCD_TO_BIN(time
->tm_mon
);
1341 BCD_TO_BIN(time
->tm_year
);
1342 BCD_TO_BIN(time
->tm_wday
);
1343 BCD_TO_BIN(century
);
1345 time
->tm_year
+= (century
* 100);
1346 time
->tm_year
-= 1900;
1351 static int bq4802_set_rtc_time(struct rtc_time
*time
)
1353 unsigned char val
= readb(bq4802_regs
+ 0x0e);
1354 unsigned char sec
, min
, hrs
, day
, mon
, yrs
, century
;
1357 year
= time
->tm_year
+ 1900;
1358 century
= year
/ 100;
1361 mon
= time
->tm_mon
+ 1; /* tm_mon starts at zero */
1362 day
= time
->tm_mday
;
1363 hrs
= time
->tm_hour
;
1373 BIN_TO_BCD(century
);
1375 writeb(val
| 0x08, bq4802_regs
+ 0x0e);
1377 writeb(sec
, bq4802_regs
+ 0x00);
1378 writeb(min
, bq4802_regs
+ 0x02);
1379 writeb(hrs
, bq4802_regs
+ 0x04);
1380 writeb(day
, bq4802_regs
+ 0x06);
1381 writeb(mon
, bq4802_regs
+ 0x09);
1382 writeb(yrs
, bq4802_regs
+ 0x0a);
1383 writeb(century
, bq4802_regs
+ 0x0f);
1385 writeb(val
, bq4802_regs
+ 0x0e);
1390 static void cmos_get_rtc_time(struct rtc_time
*rtc_tm
)
1394 rtc_tm
->tm_sec
= CMOS_READ(RTC_SECONDS
);
1395 rtc_tm
->tm_min
= CMOS_READ(RTC_MINUTES
);
1396 rtc_tm
->tm_hour
= CMOS_READ(RTC_HOURS
);
1397 rtc_tm
->tm_mday
= CMOS_READ(RTC_DAY_OF_MONTH
);
1398 rtc_tm
->tm_mon
= CMOS_READ(RTC_MONTH
);
1399 rtc_tm
->tm_year
= CMOS_READ(RTC_YEAR
);
1400 rtc_tm
->tm_wday
= CMOS_READ(RTC_DAY_OF_WEEK
);
1402 ctrl
= CMOS_READ(RTC_CONTROL
);
1403 if (!(ctrl
& RTC_DM_BINARY
) || RTC_ALWAYS_BCD
) {
1404 BCD_TO_BIN(rtc_tm
->tm_sec
);
1405 BCD_TO_BIN(rtc_tm
->tm_min
);
1406 BCD_TO_BIN(rtc_tm
->tm_hour
);
1407 BCD_TO_BIN(rtc_tm
->tm_mday
);
1408 BCD_TO_BIN(rtc_tm
->tm_mon
);
1409 BCD_TO_BIN(rtc_tm
->tm_year
);
1410 BCD_TO_BIN(rtc_tm
->tm_wday
);
1413 if (rtc_tm
->tm_year
<= 69)
1414 rtc_tm
->tm_year
+= 100;
1419 static int cmos_set_rtc_time(struct rtc_time
*rtc_tm
)
1421 unsigned char mon
, day
, hrs
, min
, sec
;
1422 unsigned char save_control
, save_freq_select
;
1425 yrs
= rtc_tm
->tm_year
;
1426 mon
= rtc_tm
->tm_mon
+ 1;
1427 day
= rtc_tm
->tm_mday
;
1428 hrs
= rtc_tm
->tm_hour
;
1429 min
= rtc_tm
->tm_min
;
1430 sec
= rtc_tm
->tm_sec
;
1435 if (!(CMOS_READ(RTC_CONTROL
) & RTC_DM_BINARY
) || RTC_ALWAYS_BCD
) {
1444 save_control
= CMOS_READ(RTC_CONTROL
);
1445 CMOS_WRITE((save_control
|RTC_SET
), RTC_CONTROL
);
1446 save_freq_select
= CMOS_READ(RTC_FREQ_SELECT
);
1447 CMOS_WRITE((save_freq_select
|RTC_DIV_RESET2
), RTC_FREQ_SELECT
);
1449 CMOS_WRITE(yrs
, RTC_YEAR
);
1450 CMOS_WRITE(mon
, RTC_MONTH
);
1451 CMOS_WRITE(day
, RTC_DAY_OF_MONTH
);
1452 CMOS_WRITE(hrs
, RTC_HOURS
);
1453 CMOS_WRITE(min
, RTC_MINUTES
);
1454 CMOS_WRITE(sec
, RTC_SECONDS
);
1456 CMOS_WRITE(save_control
, RTC_CONTROL
);
1457 CMOS_WRITE(save_freq_select
, RTC_FREQ_SELECT
);
1461 #endif /* CONFIG_PCI */
1463 struct mini_rtc_ops
{
1464 void (*get_rtc_time
)(struct rtc_time
*);
1465 int (*set_rtc_time
)(struct rtc_time
*);
1468 static struct mini_rtc_ops starfire_rtc_ops
= {
1469 .get_rtc_time
= starfire_get_rtc_time
,
1470 .set_rtc_time
= starfire_set_rtc_time
,
1473 static struct mini_rtc_ops hypervisor_rtc_ops
= {
1474 .get_rtc_time
= hypervisor_get_rtc_time
,
1475 .set_rtc_time
= hypervisor_set_rtc_time
,
1479 static struct mini_rtc_ops bq4802_rtc_ops
= {
1480 .get_rtc_time
= bq4802_get_rtc_time
,
1481 .set_rtc_time
= bq4802_set_rtc_time
,
1484 static struct mini_rtc_ops cmos_rtc_ops
= {
1485 .get_rtc_time
= cmos_get_rtc_time
,
1486 .set_rtc_time
= cmos_set_rtc_time
,
1488 #endif /* CONFIG_PCI */
1490 static struct mini_rtc_ops
*mini_rtc_ops
;
1492 static inline void mini_get_rtc_time(struct rtc_time
*time
)
1494 unsigned long flags
;
1496 spin_lock_irqsave(&rtc_lock
, flags
);
1497 mini_rtc_ops
->get_rtc_time(time
);
1498 spin_unlock_irqrestore(&rtc_lock
, flags
);
1501 static inline int mini_set_rtc_time(struct rtc_time
*time
)
1503 unsigned long flags
;
1506 spin_lock_irqsave(&rtc_lock
, flags
);
1507 err
= mini_rtc_ops
->set_rtc_time(time
);
1508 spin_unlock_irqrestore(&rtc_lock
, flags
);
1513 static int mini_rtc_ioctl(struct inode
*inode
, struct file
*file
,
1514 unsigned int cmd
, unsigned long arg
)
1516 struct rtc_time wtime
;
1517 void __user
*argp
= (void __user
*)arg
;
1527 case RTC_UIE_OFF
: /* disable ints from RTC updates. */
1530 case RTC_UIE_ON
: /* enable ints for RTC updates. */
1533 case RTC_RD_TIME
: /* Read the time/date from RTC */
1534 /* this doesn't get week-day, who cares */
1535 memset(&wtime
, 0, sizeof(wtime
));
1536 mini_get_rtc_time(&wtime
);
1538 return copy_to_user(argp
, &wtime
, sizeof(wtime
)) ? -EFAULT
: 0;
1540 case RTC_SET_TIME
: /* Set the RTC */
1544 if (!capable(CAP_SYS_TIME
))
1547 if (copy_from_user(&wtime
, argp
, sizeof(wtime
)))
1550 year
= wtime
.tm_year
+ 1900;
1551 days
= month_days
[wtime
.tm_mon
] +
1552 ((wtime
.tm_mon
== 1) && leapyear(year
));
1554 if ((wtime
.tm_mon
< 0 || wtime
.tm_mon
> 11) ||
1555 (wtime
.tm_mday
< 1))
1558 if (wtime
.tm_mday
< 0 || wtime
.tm_mday
> days
)
1561 if (wtime
.tm_hour
< 0 || wtime
.tm_hour
>= 24 ||
1562 wtime
.tm_min
< 0 || wtime
.tm_min
>= 60 ||
1563 wtime
.tm_sec
< 0 || wtime
.tm_sec
>= 60)
1566 return mini_set_rtc_time(&wtime
);
1573 static int mini_rtc_open(struct inode
*inode
, struct file
*file
)
1575 if (mini_rtc_status
& RTC_IS_OPEN
)
1578 mini_rtc_status
|= RTC_IS_OPEN
;
1583 static int mini_rtc_release(struct inode
*inode
, struct file
*file
)
1585 mini_rtc_status
&= ~RTC_IS_OPEN
;
1590 static const struct file_operations mini_rtc_fops
= {
1591 .owner
= THIS_MODULE
,
1592 .ioctl
= mini_rtc_ioctl
,
1593 .open
= mini_rtc_open
,
1594 .release
= mini_rtc_release
,
1597 static struct miscdevice rtc_mini_dev
=
1601 .fops
= &mini_rtc_fops
,
1604 static int __init
rtc_mini_init(void)
1608 if (tlb_type
== hypervisor
)
1609 mini_rtc_ops
= &hypervisor_rtc_ops
;
1610 else if (this_is_starfire
)
1611 mini_rtc_ops
= &starfire_rtc_ops
;
1613 else if (bq4802_regs
)
1614 mini_rtc_ops
= &bq4802_rtc_ops
;
1615 else if (ds1287_regs
)
1616 mini_rtc_ops
= &cmos_rtc_ops
;
1617 #endif /* CONFIG_PCI */
1621 printk(KERN_INFO
"Mini RTC Driver\n");
1623 retval
= misc_register(&rtc_mini_dev
);
1630 static void __exit
rtc_mini_exit(void)
1632 misc_deregister(&rtc_mini_dev
);
1636 module_init(rtc_mini_init
);
1637 module_exit(rtc_mini_exit
);