1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 * Based largely on code which is:
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
12 #include <linux/errno.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/profile.h>
32 #include <linux/miscdevice.h>
33 #include <linux/rtc.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/clockchips.h>
36 #include <linux/clocksource.h>
38 #include <asm/oplib.h>
39 #include <asm/mostek.h>
40 #include <asm/timer.h>
44 #include <asm/of_device.h>
45 #include <asm/starfire.h>
47 #include <asm/sections.h>
48 #include <asm/cpudata.h>
49 #include <asm/uaccess.h>
51 #include <asm/irq_regs.h>
53 DEFINE_SPINLOCK(mostek_lock
);
54 DEFINE_SPINLOCK(rtc_lock
);
55 void __iomem
*mstk48t02_regs
= NULL
;
57 unsigned long ds1287_regs
= 0UL;
58 static void __iomem
*bq4802_regs
;
61 static void __iomem
*mstk48t08_regs
;
62 static void __iomem
*mstk48t59_regs
;
64 static int set_rtc_mmss(unsigned long);
66 #define TICK_PRIV_BIT (1UL << 63)
67 #define TICKCMP_IRQ_BIT (1UL << 63)
70 unsigned long profile_pc(struct pt_regs
*regs
)
72 unsigned long pc
= instruction_pointer(regs
);
74 if (in_lock_functions(pc
))
75 return regs
->u_regs
[UREG_RETPC
];
78 EXPORT_SYMBOL(profile_pc
);
81 static void tick_disable_protection(void)
83 /* Set things up so user can access tick register for profiling
84 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
85 * read back of %tick after writing it.
91 "1: rd %%tick, %%g2\n"
92 " add %%g2, 6, %%g2\n"
93 " andn %%g2, %0, %%g2\n"
94 " wrpr %%g2, 0, %%tick\n"
101 static void tick_disable_irq(void)
103 __asm__
__volatile__(
107 "1: wr %0, 0x0, %%tick_cmpr\n"
108 " rd %%tick_cmpr, %%g0"
110 : "r" (TICKCMP_IRQ_BIT
));
113 static void tick_init_tick(void)
115 tick_disable_protection();
119 static unsigned long tick_get_tick(void)
123 __asm__
__volatile__("rd %%tick, %0\n\t"
127 return ret
& ~TICK_PRIV_BIT
;
130 static int tick_add_compare(unsigned long adj
)
132 unsigned long orig_tick
, new_tick
, new_compare
;
134 __asm__
__volatile__("rd %%tick, %0"
137 orig_tick
&= ~TICKCMP_IRQ_BIT
;
139 /* Workaround for Spitfire Errata (#54 I think??), I discovered
140 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
143 * On Blackbird writes to %tick_cmpr can fail, the
144 * workaround seems to be to execute the wr instruction
145 * at the start of an I-cache line, and perform a dummy
146 * read back from %tick_cmpr right after writing to it. -DaveM
148 __asm__
__volatile__("ba,pt %%xcc, 1f\n\t"
149 " add %1, %2, %0\n\t"
152 "wr %0, 0, %%tick_cmpr\n\t"
153 "rd %%tick_cmpr, %%g0\n\t"
155 : "r" (orig_tick
), "r" (adj
));
157 __asm__
__volatile__("rd %%tick, %0"
159 new_tick
&= ~TICKCMP_IRQ_BIT
;
161 return ((long)(new_tick
- (orig_tick
+adj
))) > 0L;
164 static unsigned long tick_add_tick(unsigned long adj
)
166 unsigned long new_tick
;
168 /* Also need to handle Blackbird bug here too. */
169 __asm__
__volatile__("rd %%tick, %0\n\t"
171 "wrpr %0, 0, %%tick\n\t"
178 static struct sparc64_tick_ops tick_operations __read_mostly
= {
180 .init_tick
= tick_init_tick
,
181 .disable_irq
= tick_disable_irq
,
182 .get_tick
= tick_get_tick
,
183 .add_tick
= tick_add_tick
,
184 .add_compare
= tick_add_compare
,
185 .softint_mask
= 1UL << 0,
188 struct sparc64_tick_ops
*tick_ops __read_mostly
= &tick_operations
;
190 static void stick_disable_irq(void)
192 __asm__
__volatile__(
193 "wr %0, 0x0, %%asr25"
195 : "r" (TICKCMP_IRQ_BIT
));
198 static void stick_init_tick(void)
200 /* Writes to the %tick and %stick register are not
201 * allowed on sun4v. The Hypervisor controls that
204 if (tlb_type
!= hypervisor
) {
205 tick_disable_protection();
208 /* Let the user get at STICK too. */
209 __asm__
__volatile__(
210 " rd %%asr24, %%g2\n"
211 " andn %%g2, %0, %%g2\n"
212 " wr %%g2, 0, %%asr24"
214 : "r" (TICK_PRIV_BIT
)
221 static unsigned long stick_get_tick(void)
225 __asm__
__volatile__("rd %%asr24, %0"
228 return ret
& ~TICK_PRIV_BIT
;
231 static unsigned long stick_add_tick(unsigned long adj
)
233 unsigned long new_tick
;
235 __asm__
__volatile__("rd %%asr24, %0\n\t"
237 "wr %0, 0, %%asr24\n\t"
244 static int stick_add_compare(unsigned long adj
)
246 unsigned long orig_tick
, new_tick
;
248 __asm__
__volatile__("rd %%asr24, %0"
250 orig_tick
&= ~TICKCMP_IRQ_BIT
;
252 __asm__
__volatile__("wr %0, 0, %%asr25"
254 : "r" (orig_tick
+ adj
));
256 __asm__
__volatile__("rd %%asr24, %0"
258 new_tick
&= ~TICKCMP_IRQ_BIT
;
260 return ((long)(new_tick
- (orig_tick
+adj
))) > 0L;
263 static struct sparc64_tick_ops stick_operations __read_mostly
= {
265 .init_tick
= stick_init_tick
,
266 .disable_irq
= stick_disable_irq
,
267 .get_tick
= stick_get_tick
,
268 .add_tick
= stick_add_tick
,
269 .add_compare
= stick_add_compare
,
270 .softint_mask
= 1UL << 16,
273 /* On Hummingbird the STICK/STICK_CMPR register is implemented
274 * in I/O space. There are two 64-bit registers each, the
275 * first holds the low 32-bits of the value and the second holds
278 * Since STICK is constantly updating, we have to access it carefully.
280 * The sequence we use to read is:
283 * 3) read high again, if it rolled re-read both low and high again.
285 * Writing STICK safely is also tricky:
286 * 1) write low to zero
290 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
291 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
293 static unsigned long __hbird_read_stick(void)
295 unsigned long ret
, tmp1
, tmp2
, tmp3
;
296 unsigned long addr
= HBIRD_STICK_ADDR
+8;
298 __asm__
__volatile__("ldxa [%1] %5, %2\n"
300 "sub %1, 0x8, %1\n\t"
301 "ldxa [%1] %5, %3\n\t"
302 "add %1, 0x8, %1\n\t"
303 "ldxa [%1] %5, %4\n\t"
305 "bne,a,pn %%xcc, 1b\n\t"
307 "sllx %4, 32, %4\n\t"
309 : "=&r" (ret
), "=&r" (addr
),
310 "=&r" (tmp1
), "=&r" (tmp2
), "=&r" (tmp3
)
311 : "i" (ASI_PHYS_BYPASS_EC_E
), "1" (addr
));
316 static void __hbird_write_stick(unsigned long val
)
318 unsigned long low
= (val
& 0xffffffffUL
);
319 unsigned long high
= (val
>> 32UL);
320 unsigned long addr
= HBIRD_STICK_ADDR
;
322 __asm__
__volatile__("stxa %%g0, [%0] %4\n\t"
323 "add %0, 0x8, %0\n\t"
324 "stxa %3, [%0] %4\n\t"
325 "sub %0, 0x8, %0\n\t"
328 : "0" (addr
), "r" (low
), "r" (high
),
329 "i" (ASI_PHYS_BYPASS_EC_E
));
332 static void __hbird_write_compare(unsigned long val
)
334 unsigned long low
= (val
& 0xffffffffUL
);
335 unsigned long high
= (val
>> 32UL);
336 unsigned long addr
= HBIRD_STICKCMP_ADDR
+ 0x8UL
;
338 __asm__
__volatile__("stxa %3, [%0] %4\n\t"
339 "sub %0, 0x8, %0\n\t"
342 : "0" (addr
), "r" (low
), "r" (high
),
343 "i" (ASI_PHYS_BYPASS_EC_E
));
346 static void hbtick_disable_irq(void)
348 __hbird_write_compare(TICKCMP_IRQ_BIT
);
351 static void hbtick_init_tick(void)
353 tick_disable_protection();
355 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
356 * XXX into actually sending STICK interrupts. I think because
357 * XXX of how we store %tick_cmpr in head.S this somehow resets the
358 * XXX {TICK + STICK} interrupt mux. -DaveM
360 __hbird_write_stick(__hbird_read_stick());
362 hbtick_disable_irq();
365 static unsigned long hbtick_get_tick(void)
367 return __hbird_read_stick() & ~TICK_PRIV_BIT
;
370 static unsigned long hbtick_add_tick(unsigned long adj
)
374 val
= __hbird_read_stick() + adj
;
375 __hbird_write_stick(val
);
380 static int hbtick_add_compare(unsigned long adj
)
382 unsigned long val
= __hbird_read_stick();
385 val
&= ~TICKCMP_IRQ_BIT
;
387 __hbird_write_compare(val
);
389 val2
= __hbird_read_stick() & ~TICKCMP_IRQ_BIT
;
391 return ((long)(val2
- val
)) > 0L;
394 static struct sparc64_tick_ops hbtick_operations __read_mostly
= {
396 .init_tick
= hbtick_init_tick
,
397 .disable_irq
= hbtick_disable_irq
,
398 .get_tick
= hbtick_get_tick
,
399 .add_tick
= hbtick_add_tick
,
400 .add_compare
= hbtick_add_compare
,
401 .softint_mask
= 1UL << 0,
404 static unsigned long timer_ticks_per_nsec_quotient __read_mostly
;
406 #define TICK_SIZE (tick_nsec / 1000)
408 #define USEC_AFTER 500000
409 #define USEC_BEFORE 500000
411 static void sync_cmos_clock(unsigned long dummy
);
413 static DEFINE_TIMER(sync_cmos_timer
, sync_cmos_clock
, 0, 0);
415 static void sync_cmos_clock(unsigned long dummy
)
417 struct timeval now
, next
;
421 * If we have an externally synchronized Linux clock, then update
422 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
423 * called as close as possible to 500 ms before the new second starts.
424 * This code is run on a timer. If the clock is set, that timer
425 * may not expire at the correct time. Thus, we adjust...
429 * Not synced, exit, do not restart a timer (if one is
430 * running, let it run out).
434 do_gettimeofday(&now
);
435 if (now
.tv_usec
>= USEC_AFTER
- ((unsigned) TICK_SIZE
) / 2 &&
436 now
.tv_usec
<= USEC_BEFORE
+ ((unsigned) TICK_SIZE
) / 2)
437 fail
= set_rtc_mmss(now
.tv_sec
);
439 next
.tv_usec
= USEC_AFTER
- now
.tv_usec
;
440 if (next
.tv_usec
<= 0)
441 next
.tv_usec
+= USEC_PER_SEC
;
448 if (next
.tv_usec
>= USEC_PER_SEC
) {
450 next
.tv_usec
-= USEC_PER_SEC
;
452 mod_timer(&sync_cmos_timer
, jiffies
+ timeval_to_jiffies(&next
));
455 void notify_arch_cmos_timer(void)
457 mod_timer(&sync_cmos_timer
, jiffies
+ 1);
460 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
461 static void __init
kick_start_clock(void)
463 void __iomem
*regs
= mstk48t02_regs
;
467 prom_printf("CLOCK: Clock was stopped. Kick start ");
469 spin_lock_irq(&mostek_lock
);
471 /* Turn on the kick start bit to start the oscillator. */
472 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
473 tmp
|= MSTK_CREG_WRITE
;
474 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
475 tmp
= mostek_read(regs
+ MOSTEK_SEC
);
477 mostek_write(regs
+ MOSTEK_SEC
, tmp
);
478 tmp
= mostek_read(regs
+ MOSTEK_HOUR
);
479 tmp
|= MSTK_KICK_START
;
480 mostek_write(regs
+ MOSTEK_HOUR
, tmp
);
481 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
482 tmp
&= ~MSTK_CREG_WRITE
;
483 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
485 spin_unlock_irq(&mostek_lock
);
487 /* Delay to allow the clock oscillator to start. */
488 sec
= MSTK_REG_SEC(regs
);
489 for (i
= 0; i
< 3; i
++) {
490 while (sec
== MSTK_REG_SEC(regs
))
491 for (count
= 0; count
< 100000; count
++)
494 sec
= MSTK_REG_SEC(regs
);
498 spin_lock_irq(&mostek_lock
);
500 /* Turn off kick start and set a "valid" time and date. */
501 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
502 tmp
|= MSTK_CREG_WRITE
;
503 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
504 tmp
= mostek_read(regs
+ MOSTEK_HOUR
);
505 tmp
&= ~MSTK_KICK_START
;
506 mostek_write(regs
+ MOSTEK_HOUR
, tmp
);
507 MSTK_SET_REG_SEC(regs
,0);
508 MSTK_SET_REG_MIN(regs
,0);
509 MSTK_SET_REG_HOUR(regs
,0);
510 MSTK_SET_REG_DOW(regs
,5);
511 MSTK_SET_REG_DOM(regs
,1);
512 MSTK_SET_REG_MONTH(regs
,8);
513 MSTK_SET_REG_YEAR(regs
,1996 - MSTK_YEAR_ZERO
);
514 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
515 tmp
&= ~MSTK_CREG_WRITE
;
516 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
518 spin_unlock_irq(&mostek_lock
);
520 /* Ensure the kick start bit is off. If it isn't, turn it off. */
521 while (mostek_read(regs
+ MOSTEK_HOUR
) & MSTK_KICK_START
) {
522 prom_printf("CLOCK: Kick start still on!\n");
524 spin_lock_irq(&mostek_lock
);
526 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
527 tmp
|= MSTK_CREG_WRITE
;
528 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
530 tmp
= mostek_read(regs
+ MOSTEK_HOUR
);
531 tmp
&= ~MSTK_KICK_START
;
532 mostek_write(regs
+ MOSTEK_HOUR
, tmp
);
534 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
535 tmp
&= ~MSTK_CREG_WRITE
;
536 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
538 spin_unlock_irq(&mostek_lock
);
541 prom_printf("CLOCK: Kick start procedure successful.\n");
544 /* Return nonzero if the clock chip battery is low. */
545 static int __init
has_low_battery(void)
547 void __iomem
*regs
= mstk48t02_regs
;
550 spin_lock_irq(&mostek_lock
);
552 data1
= mostek_read(regs
+ MOSTEK_EEPROM
); /* Read some data. */
553 mostek_write(regs
+ MOSTEK_EEPROM
, ~data1
); /* Write back the complement. */
554 data2
= mostek_read(regs
+ MOSTEK_EEPROM
); /* Read back the complement. */
555 mostek_write(regs
+ MOSTEK_EEPROM
, data1
); /* Restore original value. */
557 spin_unlock_irq(&mostek_lock
);
559 return (data1
== data2
); /* Was the write blocked? */
562 /* Probe for the real time clock chip. */
563 static void __init
set_system_time(void)
565 unsigned int year
, mon
, day
, hour
, min
, sec
;
566 void __iomem
*mregs
= mstk48t02_regs
;
568 unsigned long dregs
= ds1287_regs
;
569 void __iomem
*bregs
= bq4802_regs
;
571 unsigned long dregs
= 0UL;
572 void __iomem
*bregs
= 0UL;
576 if (!mregs
&& !dregs
&& !bregs
) {
577 prom_printf("Something wrong, clock regs not mapped yet.\n");
582 spin_lock_irq(&mostek_lock
);
584 /* Traditional Mostek chip. */
585 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
586 tmp
|= MSTK_CREG_READ
;
587 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
589 sec
= MSTK_REG_SEC(mregs
);
590 min
= MSTK_REG_MIN(mregs
);
591 hour
= MSTK_REG_HOUR(mregs
);
592 day
= MSTK_REG_DOM(mregs
);
593 mon
= MSTK_REG_MONTH(mregs
);
594 year
= MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs
) );
596 unsigned char val
= readb(bregs
+ 0x0e);
597 unsigned int century
;
599 /* BQ4802 RTC chip. */
601 writeb(val
| 0x08, bregs
+ 0x0e);
603 sec
= readb(bregs
+ 0x00);
604 min
= readb(bregs
+ 0x02);
605 hour
= readb(bregs
+ 0x04);
606 day
= readb(bregs
+ 0x06);
607 mon
= readb(bregs
+ 0x09);
608 year
= readb(bregs
+ 0x0a);
609 century
= readb(bregs
+ 0x0f);
611 writeb(val
, bregs
+ 0x0e);
621 year
+= (century
* 100);
623 /* Dallas 12887 RTC chip. */
626 sec
= CMOS_READ(RTC_SECONDS
);
627 min
= CMOS_READ(RTC_MINUTES
);
628 hour
= CMOS_READ(RTC_HOURS
);
629 day
= CMOS_READ(RTC_DAY_OF_MONTH
);
630 mon
= CMOS_READ(RTC_MONTH
);
631 year
= CMOS_READ(RTC_YEAR
);
632 } while (sec
!= CMOS_READ(RTC_SECONDS
));
634 if (!(CMOS_READ(RTC_CONTROL
) & RTC_DM_BINARY
) || RTC_ALWAYS_BCD
) {
642 if ((year
+= 1900) < 1970)
646 xtime
.tv_sec
= mktime(year
, mon
, day
, hour
, min
, sec
);
647 xtime
.tv_nsec
= (INITIAL_JIFFIES
% HZ
) * (NSEC_PER_SEC
/ HZ
);
648 set_normalized_timespec(&wall_to_monotonic
,
649 -xtime
.tv_sec
, -xtime
.tv_nsec
);
652 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
653 tmp
&= ~MSTK_CREG_READ
;
654 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
656 spin_unlock_irq(&mostek_lock
);
660 /* davem suggests we keep this within the 4M locked kernel image */
661 static u32
starfire_get_time(void)
663 static char obp_gettod
[32];
666 sprintf(obp_gettod
, "h# %08x unix-gettod",
667 (unsigned int) (long) &unix_tod
);
668 prom_feval(obp_gettod
);
673 static int starfire_set_time(u32 val
)
675 /* Do nothing, time is set using the service processor
676 * console on this platform.
681 static u32
hypervisor_get_time(void)
683 register unsigned long func
asm("%o5");
684 register unsigned long arg0
asm("%o0");
685 register unsigned long arg1
asm("%o1");
689 func
= HV_FAST_TOD_GET
;
692 __asm__
__volatile__("ta %6"
693 : "=&r" (func
), "=&r" (arg0
), "=&r" (arg1
)
694 : "0" (func
), "1" (arg0
), "2" (arg1
),
698 if (arg0
== HV_EWOULDBLOCK
) {
703 printk(KERN_WARNING
"SUN4V: tod_get() timed out.\n");
706 printk(KERN_WARNING
"SUN4V: tod_get() not supported.\n");
710 static int hypervisor_set_time(u32 secs
)
712 register unsigned long func
asm("%o5");
713 register unsigned long arg0
asm("%o0");
717 func
= HV_FAST_TOD_SET
;
719 __asm__
__volatile__("ta %4"
720 : "=&r" (func
), "=&r" (arg0
)
721 : "0" (func
), "1" (arg0
),
725 if (arg0
== HV_EWOULDBLOCK
) {
730 printk(KERN_WARNING
"SUN4V: tod_set() timed out.\n");
733 printk(KERN_WARNING
"SUN4V: tod_set() not supported.\n");
737 static int __init
clock_model_matches(const char *model
)
739 if (strcmp(model
, "mk48t02") &&
740 strcmp(model
, "mk48t08") &&
741 strcmp(model
, "mk48t59") &&
742 strcmp(model
, "m5819") &&
743 strcmp(model
, "m5819p") &&
744 strcmp(model
, "m5823") &&
745 strcmp(model
, "ds1287") &&
746 strcmp(model
, "bq4802"))
752 static int __devinit
clock_probe(struct of_device
*op
, const struct of_device_id
*match
)
754 struct device_node
*dp
= op
->node
;
755 const char *model
= of_get_property(dp
, "model", NULL
);
756 const char *compat
= of_get_property(dp
, "compatible", NULL
);
757 unsigned long size
, flags
;
763 if (!model
|| !clock_model_matches(model
))
766 /* On an Enterprise system there can be multiple mostek clocks.
767 * We should only match the one that is on the central FHC bus.
769 if (!strcmp(dp
->parent
->name
, "fhc") &&
770 strcmp(dp
->parent
->parent
->name
, "central") != 0)
773 size
= (op
->resource
[0].end
- op
->resource
[0].start
) + 1;
774 regs
= of_ioremap(&op
->resource
[0], 0, size
, "clock");
779 if (!strcmp(model
, "ds1287") ||
780 !strcmp(model
, "m5819") ||
781 !strcmp(model
, "m5819p") ||
782 !strcmp(model
, "m5823")) {
783 ds1287_regs
= (unsigned long) regs
;
784 } else if (!strcmp(model
, "bq4802")) {
788 if (model
[5] == '0' && model
[6] == '2') {
789 mstk48t02_regs
= regs
;
790 } else if(model
[5] == '0' && model
[6] == '8') {
791 mstk48t08_regs
= regs
;
792 mstk48t02_regs
= mstk48t08_regs
+ MOSTEK_48T08_48T02
;
794 mstk48t59_regs
= regs
;
795 mstk48t02_regs
= mstk48t59_regs
+ MOSTEK_48T59_48T02
;
798 printk(KERN_INFO
"%s: Clock regs at %p\n", dp
->full_name
, regs
);
800 local_irq_save(flags
);
802 if (mstk48t02_regs
!= NULL
) {
803 /* Report a low battery voltage condition. */
804 if (has_low_battery())
805 prom_printf("NVRAM: Low battery voltage!\n");
807 /* Kick start the clock if it is completely stopped. */
808 if (mostek_read(mstk48t02_regs
+ MOSTEK_SEC
) & MSTK_STOP
)
814 local_irq_restore(flags
);
819 static struct of_device_id clock_match
[] = {
829 static struct of_platform_driver clock_driver
= {
831 .match_table
= clock_match
,
832 .probe
= clock_probe
,
835 static int __init
clock_init(void)
837 if (this_is_starfire
) {
838 xtime
.tv_sec
= starfire_get_time();
839 xtime
.tv_nsec
= (INITIAL_JIFFIES
% HZ
) * (NSEC_PER_SEC
/ HZ
);
840 set_normalized_timespec(&wall_to_monotonic
,
841 -xtime
.tv_sec
, -xtime
.tv_nsec
);
844 if (tlb_type
== hypervisor
) {
845 xtime
.tv_sec
= hypervisor_get_time();
846 xtime
.tv_nsec
= (INITIAL_JIFFIES
% HZ
) * (NSEC_PER_SEC
/ HZ
);
847 set_normalized_timespec(&wall_to_monotonic
,
848 -xtime
.tv_sec
, -xtime
.tv_nsec
);
852 return of_register_driver(&clock_driver
, &of_bus_type
);
855 /* Must be after subsys_initcall() so that busses are probed. Must
856 * be before device_initcall() because things like the RTC driver
857 * need to see the clock registers.
859 fs_initcall(clock_init
);
861 /* This is gets the master TICK_INT timer going. */
862 static unsigned long sparc64_init_timers(void)
864 struct device_node
*dp
;
865 struct property
*prop
;
868 extern void smp_tick_init(void);
871 dp
= of_find_node_by_path("/");
872 if (tlb_type
== spitfire
) {
873 unsigned long ver
, manuf
, impl
;
875 __asm__
__volatile__ ("rdpr %%ver, %0"
877 manuf
= ((ver
>> 48) & 0xffff);
878 impl
= ((ver
>> 32) & 0xffff);
879 if (manuf
== 0x17 && impl
== 0x13) {
880 /* Hummingbird, aka Ultra-IIe */
881 tick_ops
= &hbtick_operations
;
882 prop
= of_find_property(dp
, "stick-frequency", NULL
);
884 tick_ops
= &tick_operations
;
885 cpu_find_by_instance(0, &dp
, NULL
);
886 prop
= of_find_property(dp
, "clock-frequency", NULL
);
889 tick_ops
= &stick_operations
;
890 prop
= of_find_property(dp
, "stick-frequency", NULL
);
892 clock
= *(unsigned int *) prop
->value
;
902 unsigned long clock_tick_ref
;
903 unsigned int ref_freq
;
905 static DEFINE_PER_CPU(struct freq_table
, sparc64_freq_table
) = { 0, 0 };
907 unsigned long sparc64_get_clock_tick(unsigned int cpu
)
909 struct freq_table
*ft
= &per_cpu(sparc64_freq_table
, cpu
);
911 if (ft
->clock_tick_ref
)
912 return ft
->clock_tick_ref
;
913 return cpu_data(cpu
).clock_tick
;
916 #ifdef CONFIG_CPU_FREQ
918 static int sparc64_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
921 struct cpufreq_freqs
*freq
= data
;
922 unsigned int cpu
= freq
->cpu
;
923 struct freq_table
*ft
= &per_cpu(sparc64_freq_table
, cpu
);
926 ft
->ref_freq
= freq
->old
;
927 ft
->clock_tick_ref
= cpu_data(cpu
).clock_tick
;
929 if ((val
== CPUFREQ_PRECHANGE
&& freq
->old
< freq
->new) ||
930 (val
== CPUFREQ_POSTCHANGE
&& freq
->old
> freq
->new) ||
931 (val
== CPUFREQ_RESUMECHANGE
)) {
932 cpu_data(cpu
).clock_tick
=
933 cpufreq_scale(ft
->clock_tick_ref
,
941 static struct notifier_block sparc64_cpufreq_notifier_block
= {
942 .notifier_call
= sparc64_cpufreq_notifier
945 #endif /* CONFIG_CPU_FREQ */
947 static int sparc64_next_event(unsigned long delta
,
948 struct clock_event_device
*evt
)
950 return tick_ops
->add_compare(delta
) ? -ETIME
: 0;
953 static void sparc64_timer_setup(enum clock_event_mode mode
,
954 struct clock_event_device
*evt
)
957 case CLOCK_EVT_MODE_ONESHOT
:
960 case CLOCK_EVT_MODE_SHUTDOWN
:
961 tick_ops
->disable_irq();
964 case CLOCK_EVT_MODE_PERIODIC
:
965 case CLOCK_EVT_MODE_UNUSED
:
971 static struct clock_event_device sparc64_clockevent
= {
972 .features
= CLOCK_EVT_FEAT_ONESHOT
,
973 .set_mode
= sparc64_timer_setup
,
974 .set_next_event
= sparc64_next_event
,
979 static DEFINE_PER_CPU(struct clock_event_device
, sparc64_events
);
981 void timer_interrupt(int irq
, struct pt_regs
*regs
)
983 struct pt_regs
*old_regs
= set_irq_regs(regs
);
984 unsigned long tick_mask
= tick_ops
->softint_mask
;
985 int cpu
= smp_processor_id();
986 struct clock_event_device
*evt
= &per_cpu(sparc64_events
, cpu
);
988 clear_softint(tick_mask
);
992 kstat_this_cpu
.irqs
[0]++;
994 if (unlikely(!evt
->event_handler
)) {
996 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu
);
998 evt
->event_handler(evt
);
1002 set_irq_regs(old_regs
);
1005 void __devinit
setup_sparc64_timer(void)
1007 struct clock_event_device
*sevt
;
1008 unsigned long pstate
;
1010 /* Guarantee that the following sequences execute
1013 __asm__
__volatile__("rdpr %%pstate, %0\n\t"
1014 "wrpr %0, %1, %%pstate"
1018 tick_ops
->init_tick();
1020 /* Restore PSTATE_IE. */
1021 __asm__
__volatile__("wrpr %0, 0x0, %%pstate"
1025 sevt
= &__get_cpu_var(sparc64_events
);
1027 memcpy(sevt
, &sparc64_clockevent
, sizeof(*sevt
));
1028 sevt
->cpumask
= cpumask_of_cpu(smp_processor_id());
1030 clockevents_register_device(sevt
);
1033 #define SPARC64_NSEC_PER_CYC_SHIFT 10UL
1035 static struct clocksource clocksource_tick
= {
1037 .mask
= CLOCKSOURCE_MASK(64),
1039 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
1042 static void __init
setup_clockevent_multiplier(unsigned long hz
)
1044 unsigned long mult
, shift
= 32;
1047 mult
= div_sc(hz
, NSEC_PER_SEC
, shift
);
1048 if (mult
&& (mult
>> 32UL) == 0UL)
1054 sparc64_clockevent
.shift
= shift
;
1055 sparc64_clockevent
.mult
= mult
;
1058 void __init
time_init(void)
1060 unsigned long clock
= sparc64_init_timers();
1062 timer_ticks_per_nsec_quotient
=
1063 clocksource_hz2mult(clock
, SPARC64_NSEC_PER_CYC_SHIFT
);
1065 clocksource_tick
.name
= tick_ops
->name
;
1066 clocksource_tick
.mult
=
1067 clocksource_hz2mult(clock
,
1068 clocksource_tick
.shift
);
1069 clocksource_tick
.read
= tick_ops
->get_tick
;
1071 printk("clocksource: mult[%x] shift[%d]\n",
1072 clocksource_tick
.mult
, clocksource_tick
.shift
);
1074 clocksource_register(&clocksource_tick
);
1076 sparc64_clockevent
.name
= tick_ops
->name
;
1078 setup_clockevent_multiplier(clock
);
1080 sparc64_clockevent
.max_delta_ns
=
1081 clockevent_delta2ns(0x7fffffffffffffff, &sparc64_clockevent
);
1082 sparc64_clockevent
.min_delta_ns
=
1083 clockevent_delta2ns(0xF, &sparc64_clockevent
);
1085 printk("clockevent: mult[%lx] shift[%d]\n",
1086 sparc64_clockevent
.mult
, sparc64_clockevent
.shift
);
1088 setup_sparc64_timer();
1090 #ifdef CONFIG_CPU_FREQ
1091 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block
,
1092 CPUFREQ_TRANSITION_NOTIFIER
);
1096 unsigned long long sched_clock(void)
1098 unsigned long ticks
= tick_ops
->get_tick();
1100 return (ticks
* timer_ticks_per_nsec_quotient
)
1101 >> SPARC64_NSEC_PER_CYC_SHIFT
;
1104 static int set_rtc_mmss(unsigned long nowtime
)
1106 int real_seconds
, real_minutes
, chip_minutes
;
1107 void __iomem
*mregs
= mstk48t02_regs
;
1109 unsigned long dregs
= ds1287_regs
;
1110 void __iomem
*bregs
= bq4802_regs
;
1112 unsigned long dregs
= 0UL;
1113 void __iomem
*bregs
= 0UL;
1115 unsigned long flags
;
1119 * Not having a register set can lead to trouble.
1120 * Also starfire doesn't have a tod clock.
1122 if (!mregs
&& !dregs
& !bregs
)
1126 spin_lock_irqsave(&mostek_lock
, flags
);
1128 /* Read the current RTC minutes. */
1129 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1130 tmp
|= MSTK_CREG_READ
;
1131 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1133 chip_minutes
= MSTK_REG_MIN(mregs
);
1135 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1136 tmp
&= ~MSTK_CREG_READ
;
1137 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1140 * since we're only adjusting minutes and seconds,
1141 * don't interfere with hour overflow. This avoids
1142 * messing with unknown time zones but requires your
1143 * RTC not to be off by more than 15 minutes
1145 real_seconds
= nowtime
% 60;
1146 real_minutes
= nowtime
/ 60;
1147 if (((abs(real_minutes
- chip_minutes
) + 15)/30) & 1)
1148 real_minutes
+= 30; /* correct for half hour time zone */
1151 if (abs(real_minutes
- chip_minutes
) < 30) {
1152 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1153 tmp
|= MSTK_CREG_WRITE
;
1154 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1156 MSTK_SET_REG_SEC(mregs
,real_seconds
);
1157 MSTK_SET_REG_MIN(mregs
,real_minutes
);
1159 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1160 tmp
&= ~MSTK_CREG_WRITE
;
1161 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1163 spin_unlock_irqrestore(&mostek_lock
, flags
);
1167 spin_unlock_irqrestore(&mostek_lock
, flags
);
1173 unsigned char val
= readb(bregs
+ 0x0e);
1175 /* BQ4802 RTC chip. */
1177 writeb(val
| 0x08, bregs
+ 0x0e);
1179 chip_minutes
= readb(bregs
+ 0x02);
1180 BCD_TO_BIN(chip_minutes
);
1181 real_seconds
= nowtime
% 60;
1182 real_minutes
= nowtime
/ 60;
1183 if (((abs(real_minutes
- chip_minutes
) + 15)/30) & 1)
1187 if (abs(real_minutes
- chip_minutes
) < 30) {
1188 BIN_TO_BCD(real_seconds
);
1189 BIN_TO_BCD(real_minutes
);
1190 writeb(real_seconds
, bregs
+ 0x00);
1191 writeb(real_minutes
, bregs
+ 0x02);
1194 "set_rtc_mmss: can't update from %d to %d\n",
1195 chip_minutes
, real_minutes
);
1199 writeb(val
, bregs
+ 0x0e);
1204 unsigned char save_control
, save_freq_select
;
1206 /* Stolen from arch/i386/kernel/time.c, see there for
1207 * credits and descriptive comments.
1209 spin_lock_irqsave(&rtc_lock
, flags
);
1210 save_control
= CMOS_READ(RTC_CONTROL
); /* tell the clock it's being set */
1211 CMOS_WRITE((save_control
|RTC_SET
), RTC_CONTROL
);
1213 save_freq_select
= CMOS_READ(RTC_FREQ_SELECT
); /* stop and reset prescaler */
1214 CMOS_WRITE((save_freq_select
|RTC_DIV_RESET2
), RTC_FREQ_SELECT
);
1216 chip_minutes
= CMOS_READ(RTC_MINUTES
);
1217 if (!(save_control
& RTC_DM_BINARY
) || RTC_ALWAYS_BCD
)
1218 BCD_TO_BIN(chip_minutes
);
1219 real_seconds
= nowtime
% 60;
1220 real_minutes
= nowtime
/ 60;
1221 if (((abs(real_minutes
- chip_minutes
) + 15)/30) & 1)
1225 if (abs(real_minutes
- chip_minutes
) < 30) {
1226 if (!(save_control
& RTC_DM_BINARY
) || RTC_ALWAYS_BCD
) {
1227 BIN_TO_BCD(real_seconds
);
1228 BIN_TO_BCD(real_minutes
);
1230 CMOS_WRITE(real_seconds
,RTC_SECONDS
);
1231 CMOS_WRITE(real_minutes
,RTC_MINUTES
);
1234 "set_rtc_mmss: can't update from %d to %d\n",
1235 chip_minutes
, real_minutes
);
1239 CMOS_WRITE(save_control
, RTC_CONTROL
);
1240 CMOS_WRITE(save_freq_select
, RTC_FREQ_SELECT
);
1241 spin_unlock_irqrestore(&rtc_lock
, flags
);
1247 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1248 static unsigned char mini_rtc_status
; /* bitmapped status byte. */
1251 #define STARTOFTIME 1970
1252 #define SECDAY 86400L
1253 #define SECYR (SECDAY * 365)
1254 #define leapyear(year) ((year) % 4 == 0 && \
1255 ((year) % 100 != 0 || (year) % 400 == 0))
1256 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1257 #define days_in_month(a) (month_days[(a) - 1])
1259 static int month_days
[12] = {
1260 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1264 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1266 static void GregorianDay(struct rtc_time
* tm
)
1271 int MonthOffset
[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1273 lastYear
= tm
->tm_year
- 1;
1276 * Number of leap corrections to apply up to end of last year
1278 leapsToDate
= lastYear
/ 4 - lastYear
/ 100 + lastYear
/ 400;
1281 * This year is a leap year if it is divisible by 4 except when it is
1282 * divisible by 100 unless it is divisible by 400
1284 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1286 day
= tm
->tm_mon
> 2 && leapyear(tm
->tm_year
);
1288 day
+= lastYear
*365 + leapsToDate
+ MonthOffset
[tm
->tm_mon
-1] +
1291 tm
->tm_wday
= day
% 7;
1294 static void to_tm(int tim
, struct rtc_time
*tm
)
1297 register long hms
, day
;
1302 /* Hours, minutes, seconds are easy */
1303 tm
->tm_hour
= hms
/ 3600;
1304 tm
->tm_min
= (hms
% 3600) / 60;
1305 tm
->tm_sec
= (hms
% 3600) % 60;
1307 /* Number of years in days */
1308 for (i
= STARTOFTIME
; day
>= days_in_year(i
); i
++)
1309 day
-= days_in_year(i
);
1312 /* Number of months in days left */
1313 if (leapyear(tm
->tm_year
))
1314 days_in_month(FEBRUARY
) = 29;
1315 for (i
= 1; day
>= days_in_month(i
); i
++)
1316 day
-= days_in_month(i
);
1317 days_in_month(FEBRUARY
) = 28;
1320 /* Days are what is left over (+1) from all that. */
1321 tm
->tm_mday
= day
+ 1;
1324 * Determine the day of week
1329 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1330 * aka Unix time. So we have to convert to/from rtc_time.
1332 static void starfire_get_rtc_time(struct rtc_time
*time
)
1334 u32 seconds
= starfire_get_time();
1336 to_tm(seconds
, time
);
1337 time
->tm_year
-= 1900;
1341 static int starfire_set_rtc_time(struct rtc_time
*time
)
1343 u32 seconds
= mktime(time
->tm_year
+ 1900, time
->tm_mon
+ 1,
1344 time
->tm_mday
, time
->tm_hour
,
1345 time
->tm_min
, time
->tm_sec
);
1347 return starfire_set_time(seconds
);
1350 static void hypervisor_get_rtc_time(struct rtc_time
*time
)
1352 u32 seconds
= hypervisor_get_time();
1354 to_tm(seconds
, time
);
1355 time
->tm_year
-= 1900;
1359 static int hypervisor_set_rtc_time(struct rtc_time
*time
)
1361 u32 seconds
= mktime(time
->tm_year
+ 1900, time
->tm_mon
+ 1,
1362 time
->tm_mday
, time
->tm_hour
,
1363 time
->tm_min
, time
->tm_sec
);
1365 return hypervisor_set_time(seconds
);
1368 static void bq4802_get_rtc_time(struct rtc_time
*time
)
1370 unsigned char val
= readb(bq4802_regs
+ 0x0e);
1371 unsigned int century
;
1373 writeb(val
| 0x08, bq4802_regs
+ 0x0e);
1375 time
->tm_sec
= readb(bq4802_regs
+ 0x00);
1376 time
->tm_min
= readb(bq4802_regs
+ 0x02);
1377 time
->tm_hour
= readb(bq4802_regs
+ 0x04);
1378 time
->tm_mday
= readb(bq4802_regs
+ 0x06);
1379 time
->tm_mon
= readb(bq4802_regs
+ 0x09);
1380 time
->tm_year
= readb(bq4802_regs
+ 0x0a);
1381 time
->tm_wday
= readb(bq4802_regs
+ 0x08);
1382 century
= readb(bq4802_regs
+ 0x0f);
1384 writeb(val
, bq4802_regs
+ 0x0e);
1386 BCD_TO_BIN(time
->tm_sec
);
1387 BCD_TO_BIN(time
->tm_min
);
1388 BCD_TO_BIN(time
->tm_hour
);
1389 BCD_TO_BIN(time
->tm_mday
);
1390 BCD_TO_BIN(time
->tm_mon
);
1391 BCD_TO_BIN(time
->tm_year
);
1392 BCD_TO_BIN(time
->tm_wday
);
1393 BCD_TO_BIN(century
);
1395 time
->tm_year
+= (century
* 100);
1396 time
->tm_year
-= 1900;
1401 static int bq4802_set_rtc_time(struct rtc_time
*time
)
1403 unsigned char val
= readb(bq4802_regs
+ 0x0e);
1404 unsigned char sec
, min
, hrs
, day
, mon
, yrs
, century
;
1407 year
= time
->tm_year
+ 1900;
1408 century
= year
/ 100;
1411 mon
= time
->tm_mon
+ 1; /* tm_mon starts at zero */
1412 day
= time
->tm_mday
;
1413 hrs
= time
->tm_hour
;
1423 BIN_TO_BCD(century
);
1425 writeb(val
| 0x08, bq4802_regs
+ 0x0e);
1427 writeb(sec
, bq4802_regs
+ 0x00);
1428 writeb(min
, bq4802_regs
+ 0x02);
1429 writeb(hrs
, bq4802_regs
+ 0x04);
1430 writeb(day
, bq4802_regs
+ 0x06);
1431 writeb(mon
, bq4802_regs
+ 0x09);
1432 writeb(yrs
, bq4802_regs
+ 0x0a);
1433 writeb(century
, bq4802_regs
+ 0x0f);
1435 writeb(val
, bq4802_regs
+ 0x0e);
1440 struct mini_rtc_ops
{
1441 void (*get_rtc_time
)(struct rtc_time
*);
1442 int (*set_rtc_time
)(struct rtc_time
*);
1445 static struct mini_rtc_ops starfire_rtc_ops
= {
1446 .get_rtc_time
= starfire_get_rtc_time
,
1447 .set_rtc_time
= starfire_set_rtc_time
,
1450 static struct mini_rtc_ops hypervisor_rtc_ops
= {
1451 .get_rtc_time
= hypervisor_get_rtc_time
,
1452 .set_rtc_time
= hypervisor_set_rtc_time
,
1455 static struct mini_rtc_ops bq4802_rtc_ops
= {
1456 .get_rtc_time
= bq4802_get_rtc_time
,
1457 .set_rtc_time
= bq4802_set_rtc_time
,
1460 static struct mini_rtc_ops
*mini_rtc_ops
;
1462 static inline void mini_get_rtc_time(struct rtc_time
*time
)
1464 unsigned long flags
;
1466 spin_lock_irqsave(&rtc_lock
, flags
);
1467 mini_rtc_ops
->get_rtc_time(time
);
1468 spin_unlock_irqrestore(&rtc_lock
, flags
);
1471 static inline int mini_set_rtc_time(struct rtc_time
*time
)
1473 unsigned long flags
;
1476 spin_lock_irqsave(&rtc_lock
, flags
);
1477 err
= mini_rtc_ops
->set_rtc_time(time
);
1478 spin_unlock_irqrestore(&rtc_lock
, flags
);
1483 static int mini_rtc_ioctl(struct inode
*inode
, struct file
*file
,
1484 unsigned int cmd
, unsigned long arg
)
1486 struct rtc_time wtime
;
1487 void __user
*argp
= (void __user
*)arg
;
1497 case RTC_UIE_OFF
: /* disable ints from RTC updates. */
1500 case RTC_UIE_ON
: /* enable ints for RTC updates. */
1503 case RTC_RD_TIME
: /* Read the time/date from RTC */
1504 /* this doesn't get week-day, who cares */
1505 memset(&wtime
, 0, sizeof(wtime
));
1506 mini_get_rtc_time(&wtime
);
1508 return copy_to_user(argp
, &wtime
, sizeof(wtime
)) ? -EFAULT
: 0;
1510 case RTC_SET_TIME
: /* Set the RTC */
1514 if (!capable(CAP_SYS_TIME
))
1517 if (copy_from_user(&wtime
, argp
, sizeof(wtime
)))
1520 year
= wtime
.tm_year
+ 1900;
1521 days
= month_days
[wtime
.tm_mon
] +
1522 ((wtime
.tm_mon
== 1) && leapyear(year
));
1524 if ((wtime
.tm_mon
< 0 || wtime
.tm_mon
> 11) ||
1525 (wtime
.tm_mday
< 1))
1528 if (wtime
.tm_mday
< 0 || wtime
.tm_mday
> days
)
1531 if (wtime
.tm_hour
< 0 || wtime
.tm_hour
>= 24 ||
1532 wtime
.tm_min
< 0 || wtime
.tm_min
>= 60 ||
1533 wtime
.tm_sec
< 0 || wtime
.tm_sec
>= 60)
1536 return mini_set_rtc_time(&wtime
);
1543 static int mini_rtc_open(struct inode
*inode
, struct file
*file
)
1545 if (mini_rtc_status
& RTC_IS_OPEN
)
1548 mini_rtc_status
|= RTC_IS_OPEN
;
1553 static int mini_rtc_release(struct inode
*inode
, struct file
*file
)
1555 mini_rtc_status
&= ~RTC_IS_OPEN
;
1560 static const struct file_operations mini_rtc_fops
= {
1561 .owner
= THIS_MODULE
,
1562 .ioctl
= mini_rtc_ioctl
,
1563 .open
= mini_rtc_open
,
1564 .release
= mini_rtc_release
,
1567 static struct miscdevice rtc_mini_dev
=
1571 .fops
= &mini_rtc_fops
,
1574 static int __init
rtc_mini_init(void)
1578 if (tlb_type
== hypervisor
)
1579 mini_rtc_ops
= &hypervisor_rtc_ops
;
1580 else if (this_is_starfire
)
1581 mini_rtc_ops
= &starfire_rtc_ops
;
1582 else if (bq4802_regs
)
1583 mini_rtc_ops
= &bq4802_rtc_ops
;
1587 printk(KERN_INFO
"Mini RTC Driver\n");
1589 retval
= misc_register(&rtc_mini_dev
);
1596 static void __exit
rtc_mini_exit(void)
1598 misc_deregister(&rtc_mini_dev
);
1602 module_init(rtc_mini_init
);
1603 module_exit(rtc_mini_exit
);