2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/mmzone.h>
18 #include <linux/bootmem.h>
19 #include <linux/module.h>
20 #include <linux/node.h>
21 #include <linux/cpu.h>
22 #include <linux/ioport.h>
23 #include <linux/irq.h>
24 #include <linux/kexec.h>
25 #include <linux/pci.h>
26 #include <linux/swiotlb.h>
27 #include <linux/initrd.h>
29 #include <linux/highmem.h>
30 #include <linux/smp.h>
31 #include <linux/timex.h>
32 #include <linux/hugetlb.h>
33 #include <linux/start_kernel.h>
34 #include <linux/screen_info.h>
35 #include <asm/setup.h>
36 #include <asm/sections.h>
37 #include <asm/cacheflush.h>
38 #include <asm/pgalloc.h>
39 #include <asm/mmu_context.h>
40 #include <hv/hypervisor.h>
41 #include <arch/interrupts.h>
43 /* <linux/smp.h> doesn't provide this definition. */
45 #define setup_max_cpus 1
48 static inline int ABS(int x
) { return x
>= 0 ? x
: -x
; }
50 /* Chip information */
51 char chip_model
[64] __write_once
;
54 struct screen_info screen_info
;
57 struct pglist_data node_data
[MAX_NUMNODES
] __read_mostly
;
58 EXPORT_SYMBOL(node_data
);
60 /* Information on the NUMA nodes that we compute early */
61 unsigned long node_start_pfn
[MAX_NUMNODES
];
62 unsigned long node_end_pfn
[MAX_NUMNODES
];
63 unsigned long __initdata node_memmap_pfn
[MAX_NUMNODES
];
64 unsigned long __initdata node_percpu_pfn
[MAX_NUMNODES
];
65 unsigned long __initdata node_free_pfn
[MAX_NUMNODES
];
67 static unsigned long __initdata node_percpu
[MAX_NUMNODES
];
70 * per-CPU stack and boot info.
72 DEFINE_PER_CPU(unsigned long, boot_sp
) =
73 (unsigned long)init_stack
+ THREAD_SIZE
;
76 DEFINE_PER_CPU(unsigned long, boot_pc
) = (unsigned long)start_kernel
;
79 * The variable must be __initdata since it references __init code.
80 * With CONFIG_SMP it is per-cpu data, which is exempt from validation.
82 unsigned long __initdata boot_pc
= (unsigned long)start_kernel
;
86 /* Page frame index of end of lowmem on each controller. */
87 unsigned long node_lowmem_end_pfn
[MAX_NUMNODES
];
89 /* Number of pages that can be mapped into lowmem. */
90 static unsigned long __initdata mappable_physpages
;
93 /* Data on which physical memory controller corresponds to which NUMA node */
94 int node_controller
[MAX_NUMNODES
] = { [0 ... MAX_NUMNODES
-1] = -1 };
97 /* Map information from VAs to PAs */
98 unsigned long pbase_map
[1 << (32 - HPAGE_SHIFT
)]
99 __write_once
__attribute__((aligned(L2_CACHE_BYTES
)));
100 EXPORT_SYMBOL(pbase_map
);
102 /* Map information from PAs to VAs */
103 void *vbase_map
[NR_PA_HIGHBIT_VALUES
]
104 __write_once
__attribute__((aligned(L2_CACHE_BYTES
)));
105 EXPORT_SYMBOL(vbase_map
);
108 /* Node number as a function of the high PA bits */
109 int highbits_to_node
[NR_PA_HIGHBIT_VALUES
] __write_once
;
110 EXPORT_SYMBOL(highbits_to_node
);
112 static unsigned int __initdata maxmem_pfn
= -1U;
113 static unsigned int __initdata maxnodemem_pfn
[MAX_NUMNODES
] = {
114 [0 ... MAX_NUMNODES
-1] = -1U
116 static nodemask_t __initdata isolnodes
;
118 #if defined(CONFIG_PCI) && !defined(__tilegx__)
119 enum { DEFAULT_PCI_RESERVE_MB
= 64 };
120 static unsigned int __initdata pci_reserve_mb
= DEFAULT_PCI_RESERVE_MB
;
121 unsigned long __initdata pci_reserve_start_pfn
= -1U;
122 unsigned long __initdata pci_reserve_end_pfn
= -1U;
125 static int __init
setup_maxmem(char *str
)
127 unsigned long long maxmem
;
128 if (str
== NULL
|| (maxmem
= memparse(str
, NULL
)) == 0)
131 maxmem_pfn
= (maxmem
>> HPAGE_SHIFT
) << (HPAGE_SHIFT
- PAGE_SHIFT
);
132 pr_info("Forcing RAM used to no more than %dMB\n",
133 maxmem_pfn
>> (20 - PAGE_SHIFT
));
136 early_param("maxmem", setup_maxmem
);
138 static int __init
setup_maxnodemem(char *str
)
141 unsigned long long maxnodemem
;
144 node
= str
? simple_strtoul(str
, &endp
, 0) : INT_MAX
;
145 if (node
>= MAX_NUMNODES
|| *endp
!= ':')
148 maxnodemem
= memparse(endp
+1, NULL
);
149 maxnodemem_pfn
[node
] = (maxnodemem
>> HPAGE_SHIFT
) <<
150 (HPAGE_SHIFT
- PAGE_SHIFT
);
151 pr_info("Forcing RAM used on node %ld to no more than %dMB\n",
152 node
, maxnodemem_pfn
[node
] >> (20 - PAGE_SHIFT
));
155 early_param("maxnodemem", setup_maxnodemem
);
157 struct memmap_entry
{
158 u64 addr
; /* start of memory segment */
159 u64 size
; /* size of memory segment */
161 static struct memmap_entry memmap_map
[64];
162 static int memmap_nr
;
164 static void add_memmap_region(u64 addr
, u64 size
)
166 if (memmap_nr
>= ARRAY_SIZE(memmap_map
)) {
167 pr_err("Ooops! Too many entries in the memory map!\n");
170 memmap_map
[memmap_nr
].addr
= addr
;
171 memmap_map
[memmap_nr
].size
= size
;
175 static int __init
setup_memmap(char *p
)
178 u64 start_at
, mem_size
;
183 if (!strncmp(p
, "exactmap", 8)) {
184 pr_err("\"memmap=exactmap\" not valid on tile\n");
189 mem_size
= memparse(p
, &p
);
194 pr_err("\"memmap=nn@ss\" (force RAM) invalid on tile\n");
195 } else if (*p
== '#') {
196 pr_err("\"memmap=nn#ss\" (force ACPI data) invalid on tile\n");
197 } else if (*p
== '$') {
198 start_at
= memparse(p
+1, &p
);
199 add_memmap_region(start_at
, mem_size
);
203 maxmem_pfn
= (mem_size
>> HPAGE_SHIFT
) <<
204 (HPAGE_SHIFT
- PAGE_SHIFT
);
206 return *p
== '\0' ? 0 : -EINVAL
;
208 early_param("memmap", setup_memmap
);
210 static int __init
setup_mem(char *str
)
212 return setup_maxmem(str
);
214 early_param("mem", setup_mem
); /* compatibility with x86 */
216 static int __init
setup_isolnodes(char *str
)
218 char buf
[MAX_NUMNODES
* 5];
219 if (str
== NULL
|| nodelist_parse(str
, isolnodes
) != 0)
222 nodelist_scnprintf(buf
, sizeof(buf
), isolnodes
);
223 pr_info("Set isolnodes value to '%s'\n", buf
);
226 early_param("isolnodes", setup_isolnodes
);
228 #if defined(CONFIG_PCI) && !defined(__tilegx__)
229 static int __init
setup_pci_reserve(char* str
)
231 if (str
== NULL
|| kstrtouint(str
, 0, &pci_reserve_mb
) != 0 ||
232 pci_reserve_mb
> 3 * 1024)
235 pr_info("Reserving %dMB for PCIE root complex mappings\n",
239 early_param("pci_reserve", setup_pci_reserve
);
244 * vmalloc=size forces the vmalloc area to be exactly 'size' bytes.
245 * This can be used to increase (or decrease) the vmalloc area.
247 static int __init
parse_vmalloc(char *arg
)
252 VMALLOC_RESERVE
= (memparse(arg
, &arg
) + PGDIR_SIZE
- 1) & PGDIR_MASK
;
254 /* See validate_va() for more on this test. */
255 if ((long)_VMALLOC_START
>= 0)
256 early_panic("\"vmalloc=%#lx\" value too large: maximum %#lx\n",
257 VMALLOC_RESERVE
, _VMALLOC_END
- 0x80000000UL
);
261 early_param("vmalloc", parse_vmalloc
);
264 #ifdef CONFIG_HIGHMEM
266 * Determine for each controller where its lowmem is mapped and how much of
267 * it is mapped there. On controller zero, the first few megabytes are
268 * already mapped in as code at MEM_SV_START, so in principle we could
269 * start our data mappings higher up, but for now we don't bother, to avoid
270 * additional confusion.
272 * One question is whether, on systems with more than 768 Mb and
273 * controllers of different sizes, to map in a proportionate amount of
274 * each one, or to try to map the same amount from each controller.
275 * (E.g. if we have three controllers with 256MB, 1GB, and 256MB
276 * respectively, do we map 256MB from each, or do we map 128 MB, 512
277 * MB, and 128 MB respectively?) For now we use a proportionate
278 * solution like the latter.
280 * The VA/PA mapping demands that we align our decisions at 16 MB
281 * boundaries so that we can rapidly convert VA to PA.
283 static void *__init
setup_pa_va_mapping(void)
285 unsigned long curr_pages
= 0;
286 unsigned long vaddr
= PAGE_OFFSET
;
287 nodemask_t highonlynodes
= isolnodes
;
290 memset(pbase_map
, -1, sizeof(pbase_map
));
291 memset(vbase_map
, -1, sizeof(vbase_map
));
293 /* Node zero cannot be isolated for LOWMEM purposes. */
294 node_clear(0, highonlynodes
);
296 /* Count up the number of pages on non-highonlynodes controllers. */
297 mappable_physpages
= 0;
298 for_each_online_node(i
) {
299 if (!node_isset(i
, highonlynodes
))
300 mappable_physpages
+=
301 node_end_pfn
[i
] - node_start_pfn
[i
];
304 for_each_online_node(i
) {
305 unsigned long start
= node_start_pfn
[i
];
306 unsigned long end
= node_end_pfn
[i
];
307 unsigned long size
= end
- start
;
308 unsigned long vaddr_end
;
310 if (node_isset(i
, highonlynodes
)) {
311 /* Mark this controller as having no lowmem. */
312 node_lowmem_end_pfn
[i
] = start
;
317 if (mappable_physpages
> MAXMEM_PFN
) {
318 vaddr_end
= PAGE_OFFSET
+
319 (((u64
)curr_pages
* MAXMEM_PFN
/
323 vaddr_end
= PAGE_OFFSET
+ (curr_pages
<< PAGE_SHIFT
);
325 for (j
= 0; vaddr
< vaddr_end
; vaddr
+= HPAGE_SIZE
, ++j
) {
326 unsigned long this_pfn
=
327 start
+ (j
<< HUGETLB_PAGE_ORDER
);
328 pbase_map
[vaddr
>> HPAGE_SHIFT
] = this_pfn
;
329 if (vbase_map
[__pfn_to_highbits(this_pfn
)] ==
331 vbase_map
[__pfn_to_highbits(this_pfn
)] =
332 (void *)(vaddr
& HPAGE_MASK
);
334 node_lowmem_end_pfn
[i
] = start
+ (j
<< HUGETLB_PAGE_ORDER
);
335 BUG_ON(node_lowmem_end_pfn
[i
] > end
);
338 /* Return highest address of any mapped memory. */
339 return (void *)vaddr
;
341 #endif /* CONFIG_HIGHMEM */
344 * Register our most important memory mappings with the debug stub.
346 * This is up to 4 mappings for lowmem, one mapping per memory
347 * controller, plus one for our text segment.
349 static void store_permanent_mappings(void)
353 for_each_online_node(i
) {
354 HV_PhysAddr pa
= ((HV_PhysAddr
)node_start_pfn
[i
]) << PAGE_SHIFT
;
355 #ifdef CONFIG_HIGHMEM
356 HV_PhysAddr high_mapped_pa
= node_lowmem_end_pfn
[i
];
358 HV_PhysAddr high_mapped_pa
= node_end_pfn
[i
];
361 unsigned long pages
= high_mapped_pa
- node_start_pfn
[i
];
362 HV_VirtAddr addr
= (HV_VirtAddr
) __va(pa
);
363 hv_store_mapping(addr
, pages
<< PAGE_SHIFT
, pa
);
366 hv_store_mapping((HV_VirtAddr
)_text
,
367 (uint32_t)(_einittext
- _text
), 0);
371 * Use hv_inquire_physical() to populate node_{start,end}_pfn[]
372 * and node_online_map, doing suitable sanity-checking.
373 * Also set min_low_pfn, max_low_pfn, and max_pfn.
375 static void __init
setup_memory(void)
378 int highbits_seen
[NR_PA_HIGHBIT_VALUES
] = { 0 };
379 #ifdef CONFIG_HIGHMEM
385 #if defined(CONFIG_HIGHMEM) || defined(__tilegx__)
388 unsigned long physpages
= 0;
390 /* We are using a char to hold the cpu_2_node[] mapping */
391 BUILD_BUG_ON(MAX_NUMNODES
> 127);
393 /* Discover the ranges of memory available to us */
395 unsigned long start
, size
, end
, highbits
;
396 HV_PhysAddrRange range
= hv_inquire_physical(i
);
399 #ifdef CONFIG_FLATMEM
401 pr_err("Can't use discontiguous PAs: %#llx..%#llx\n",
402 range
.size
, range
.start
+ range
.size
);
407 if ((unsigned long)range
.start
) {
408 pr_err("Range not at 4GB multiple: %#llx..%#llx\n",
409 range
.start
, range
.start
+ range
.size
);
413 if ((range
.start
& (HPAGE_SIZE
-1)) != 0 ||
414 (range
.size
& (HPAGE_SIZE
-1)) != 0) {
415 unsigned long long start_pa
= range
.start
;
416 unsigned long long orig_size
= range
.size
;
417 range
.start
= (start_pa
+ HPAGE_SIZE
- 1) & HPAGE_MASK
;
418 range
.size
-= (range
.start
- start_pa
);
419 range
.size
&= HPAGE_MASK
;
420 pr_err("Range not hugepage-aligned: %#llx..%#llx:"
421 " now %#llx-%#llx\n",
422 start_pa
, start_pa
+ orig_size
,
423 range
.start
, range
.start
+ range
.size
);
425 highbits
= __pa_to_highbits(range
.start
);
426 if (highbits
>= NR_PA_HIGHBIT_VALUES
) {
427 pr_err("PA high bits too high: %#llx..%#llx\n",
428 range
.start
, range
.start
+ range
.size
);
431 if (highbits_seen
[highbits
]) {
432 pr_err("Range overlaps in high bits: %#llx..%#llx\n",
433 range
.start
, range
.start
+ range
.size
);
436 highbits_seen
[highbits
] = 1;
437 if (PFN_DOWN(range
.size
) > maxnodemem_pfn
[i
]) {
438 int max_size
= maxnodemem_pfn
[i
];
440 pr_err("Maxnodemem reduced node %d to"
441 " %d pages\n", i
, max_size
);
442 range
.size
= PFN_PHYS(max_size
);
444 pr_err("Maxnodemem disabled node %d\n", i
);
448 if (physpages
+ PFN_DOWN(range
.size
) > maxmem_pfn
) {
449 int max_size
= maxmem_pfn
- physpages
;
451 pr_err("Maxmem reduced node %d to %d pages\n",
453 range
.size
= PFN_PHYS(max_size
);
455 pr_err("Maxmem disabled node %d\n", i
);
459 if (i
>= MAX_NUMNODES
) {
460 pr_err("Too many PA nodes (#%d): %#llx...%#llx\n",
461 i
, range
.size
, range
.size
+ range
.start
);
465 start
= range
.start
>> PAGE_SHIFT
;
466 size
= range
.size
>> PAGE_SHIFT
;
470 if (((HV_PhysAddr
)end
<< PAGE_SHIFT
) !=
471 (range
.start
+ range
.size
)) {
472 pr_err("PAs too high to represent: %#llx..%#llx\n",
473 range
.start
, range
.start
+ range
.size
);
477 #if defined(CONFIG_PCI) && !defined(__tilegx__)
479 * Blocks that overlap the pci reserved region must
480 * have enough space to hold the maximum percpu data
481 * region at the top of the range. If there isn't
482 * enough space above the reserved region, just
485 if (start
<= pci_reserve_start_pfn
&&
486 end
> pci_reserve_start_pfn
) {
487 unsigned int per_cpu_size
=
488 __per_cpu_end
- __per_cpu_start
;
489 unsigned int percpu_pages
=
490 NR_CPUS
* (PFN_UP(per_cpu_size
) >> PAGE_SHIFT
);
491 if (end
< pci_reserve_end_pfn
+ percpu_pages
) {
492 end
= pci_reserve_start_pfn
;
493 pr_err("PCI mapping region reduced node %d to"
494 " %ld pages\n", i
, end
- start
);
499 for (j
= __pfn_to_highbits(start
);
500 j
<= __pfn_to_highbits(end
- 1); j
++)
501 highbits_to_node
[j
] = i
;
503 node_start_pfn
[i
] = start
;
504 node_end_pfn
[i
] = end
;
505 node_controller
[i
] = range
.controller
;
509 /* Mark node as online */
510 node_set(i
, node_online_map
);
511 node_set(i
, node_possible_map
);
516 * For 4KB pages, mem_map "struct page" data is 1% of the size
517 * of the physical memory, so can be quite big (640 MB for
518 * four 16G zones). These structures must be mapped in
519 * lowmem, and since we currently cap out at about 768 MB,
520 * it's impractical to try to use this much address space.
521 * For now, arbitrarily cap the amount of physical memory
522 * we're willing to use at 8 million pages (32GB of 4KB pages).
524 cap
= 8 * 1024 * 1024; /* 8 million pages */
525 if (physpages
> cap
) {
526 int num_nodes
= num_online_nodes();
527 int cap_each
= cap
/ num_nodes
;
528 unsigned long dropped_pages
= 0;
529 for (i
= 0; i
< num_nodes
; ++i
) {
530 int size
= node_end_pfn
[i
] - node_start_pfn
[i
];
531 if (size
> cap_each
) {
532 dropped_pages
+= (size
- cap_each
);
533 node_end_pfn
[i
] = node_start_pfn
[i
] + cap_each
;
536 physpages
-= dropped_pages
;
537 pr_warning("Only using %ldMB memory;"
538 " ignoring %ldMB.\n",
539 physpages
>> (20 - PAGE_SHIFT
),
540 dropped_pages
>> (20 - PAGE_SHIFT
));
541 pr_warning("Consider using a larger page size.\n");
545 /* Heap starts just above the last loaded address. */
546 min_low_pfn
= PFN_UP((unsigned long)_end
- PAGE_OFFSET
);
548 #ifdef CONFIG_HIGHMEM
549 /* Find where we map lowmem from each controller. */
550 high_memory
= setup_pa_va_mapping();
552 /* Set max_low_pfn based on what node 0 can directly address. */
553 max_low_pfn
= node_lowmem_end_pfn
[0];
555 lowmem_pages
= (mappable_physpages
> MAXMEM_PFN
) ?
556 MAXMEM_PFN
: mappable_physpages
;
557 highmem_pages
= (long) (physpages
- lowmem_pages
);
559 pr_notice("%ldMB HIGHMEM available.\n",
560 pages_to_mb(highmem_pages
> 0 ? highmem_pages
: 0));
561 pr_notice("%ldMB LOWMEM available.\n",
562 pages_to_mb(lowmem_pages
));
564 /* Set max_low_pfn based on what node 0 can directly address. */
565 max_low_pfn
= node_end_pfn
[0];
568 if (node_end_pfn
[0] > MAXMEM_PFN
) {
569 pr_warning("Only using %ldMB LOWMEM.\n",
571 pr_warning("Use a HIGHMEM enabled kernel.\n");
572 max_low_pfn
= MAXMEM_PFN
;
573 max_pfn
= MAXMEM_PFN
;
574 node_end_pfn
[0] = MAXMEM_PFN
;
576 pr_notice("%ldMB memory available.\n",
577 pages_to_mb(node_end_pfn
[0]));
579 for (i
= 1; i
< MAX_NUMNODES
; ++i
) {
580 node_start_pfn
[i
] = 0;
583 high_memory
= __va(node_end_pfn
[0]);
586 for (i
= 0; i
< MAX_NUMNODES
; ++i
) {
587 int pages
= node_end_pfn
[i
] - node_start_pfn
[i
];
588 lowmem_pages
+= pages
;
590 high_memory
= pfn_to_kaddr(node_end_pfn
[i
]);
592 pr_notice("%ldMB memory available.\n",
593 pages_to_mb(lowmem_pages
));
599 * On 32-bit machines, we only put bootmem on the low controller,
600 * since PAs > 4GB can't be used in bootmem. In principle one could
601 * imagine, e.g., multiple 1 GB controllers all of which could support
602 * bootmem, but in practice using controllers this small isn't a
603 * particularly interesting scenario, so we just keep it simple and
604 * use only the first controller for bootmem on 32-bit machines.
606 static inline int node_has_bootmem(int nid
)
615 static inline unsigned long alloc_bootmem_pfn(int nid
,
619 void *kva
= __alloc_bootmem_node(NODE_DATA(nid
), size
,
621 unsigned long pfn
= kaddr_to_pfn(kva
);
622 BUG_ON(goal
&& PFN_PHYS(pfn
) != goal
);
626 static void __init
setup_bootmem_allocator_node(int i
)
628 unsigned long start
, end
, mapsize
, mapstart
;
630 if (node_has_bootmem(i
)) {
631 NODE_DATA(i
)->bdata
= &bootmem_node_data
[i
];
633 /* Share controller zero's bdata for now. */
634 NODE_DATA(i
)->bdata
= &bootmem_node_data
[0];
638 /* Skip up to after the bss in node 0. */
639 start
= (i
== 0) ? min_low_pfn
: node_start_pfn
[i
];
641 /* Only lowmem, if we're a HIGHMEM build. */
642 #ifdef CONFIG_HIGHMEM
643 end
= node_lowmem_end_pfn
[i
];
645 end
= node_end_pfn
[i
];
648 /* No memory here. */
652 /* Figure out where the bootmem bitmap is located. */
653 mapsize
= bootmem_bootmap_pages(end
- start
);
655 /* Use some space right before the heap on node 0. */
659 /* Allocate bitmap on node 0 to avoid page table issues. */
660 mapstart
= alloc_bootmem_pfn(0, PFN_PHYS(mapsize
), 0);
663 /* Initialize a node. */
664 init_bootmem_node(NODE_DATA(i
), mapstart
, start
, end
);
666 /* Free all the space back into the allocator. */
667 free_bootmem(PFN_PHYS(start
), PFN_PHYS(end
- start
));
669 #if defined(CONFIG_PCI) && !defined(__tilegx__)
671 * Throw away any memory aliased by the PCI region.
673 if (pci_reserve_start_pfn
< end
&& pci_reserve_end_pfn
> start
) {
674 start
= max(pci_reserve_start_pfn
, start
);
675 end
= min(pci_reserve_end_pfn
, end
);
676 reserve_bootmem(PFN_PHYS(start
), PFN_PHYS(end
- start
),
682 static void __init
setup_bootmem_allocator(void)
685 for (i
= 0; i
< MAX_NUMNODES
; ++i
)
686 setup_bootmem_allocator_node(i
);
688 /* Reserve any memory excluded by "memmap" arguments. */
689 for (i
= 0; i
< memmap_nr
; ++i
) {
690 struct memmap_entry
*m
= &memmap_map
[i
];
691 reserve_bootmem(m
->addr
, m
->size
, BOOTMEM_DEFAULT
);
694 #ifdef CONFIG_BLK_DEV_INITRD
696 /* Make sure the initrd memory region is not modified. */
697 if (reserve_bootmem(initrd_start
, initrd_end
- initrd_start
,
698 BOOTMEM_EXCLUSIVE
)) {
699 pr_crit("The initrd memory region has been polluted. Disabling it.\n");
704 * Translate initrd_start & initrd_end from PA to VA for
707 initrd_start
+= PAGE_OFFSET
;
708 initrd_end
+= PAGE_OFFSET
;
714 if (crashk_res
.start
!= crashk_res
.end
)
715 reserve_bootmem(crashk_res
.start
, resource_size(&crashk_res
),
720 void *__init
alloc_remap(int nid
, unsigned long size
)
722 int pages
= node_end_pfn
[nid
] - node_start_pfn
[nid
];
723 void *map
= pfn_to_kaddr(node_memmap_pfn
[nid
]);
724 BUG_ON(size
!= pages
* sizeof(struct page
));
725 memset(map
, 0, size
);
729 static int __init
percpu_size(void)
731 int size
= __per_cpu_end
- __per_cpu_start
;
732 size
+= PERCPU_MODULE_RESERVE
;
733 size
+= PERCPU_DYNAMIC_EARLY_SIZE
;
734 if (size
< PCPU_MIN_UNIT_SIZE
)
735 size
= PCPU_MIN_UNIT_SIZE
;
736 size
= roundup(size
, PAGE_SIZE
);
738 /* In several places we assume the per-cpu data fits on a huge page. */
739 BUG_ON(kdata_huge
&& size
> HPAGE_SIZE
);
743 static void __init
zone_sizes_init(void)
745 unsigned long zones_size
[MAX_NR_ZONES
] = { 0 };
746 int size
= percpu_size();
747 int num_cpus
= smp_height
* smp_width
;
748 const unsigned long dma_end
= (1UL << (32 - PAGE_SHIFT
));
752 for (i
= 0; i
< num_cpus
; ++i
)
753 node_percpu
[cpu_to_node(i
)] += size
;
755 for_each_online_node(i
) {
756 unsigned long start
= node_start_pfn
[i
];
757 unsigned long end
= node_end_pfn
[i
];
758 #ifdef CONFIG_HIGHMEM
759 unsigned long lowmem_end
= node_lowmem_end_pfn
[i
];
761 unsigned long lowmem_end
= end
;
763 int memmap_size
= (end
- start
) * sizeof(struct page
);
764 node_free_pfn
[i
] = start
;
767 * Set aside pages for per-cpu data and the mem_map array.
769 * Since the per-cpu data requires special homecaching,
770 * if we are in kdata_huge mode, we put it at the end of
771 * the lowmem region. If we're not in kdata_huge mode,
772 * we take the per-cpu pages from the bottom of the
773 * controller, since that avoids fragmenting a huge page
774 * that users might want. We always take the memmap
775 * from the bottom of the controller, since with
776 * kdata_huge that lets it be under a huge TLB entry.
778 * If the user has requested isolnodes for a controller,
779 * though, there'll be no lowmem, so we just alloc_bootmem
780 * the memmap. There will be no percpu memory either.
782 if (i
!= 0 && cpu_isset(i
, isolnodes
)) {
784 alloc_bootmem_pfn(0, memmap_size
, 0);
785 BUG_ON(node_percpu
[i
] != 0);
786 } else if (node_has_bootmem(start
)) {
787 unsigned long goal
= 0;
789 alloc_bootmem_pfn(i
, memmap_size
, 0);
791 goal
= PFN_PHYS(lowmem_end
) - node_percpu
[i
];
794 alloc_bootmem_pfn(i
, node_percpu
[i
],
797 /* In non-bootmem zones, just reserve some pages. */
798 node_memmap_pfn
[i
] = node_free_pfn
[i
];
799 node_free_pfn
[i
] += PFN_UP(memmap_size
);
801 node_percpu_pfn
[i
] = node_free_pfn
[i
];
802 node_free_pfn
[i
] += PFN_UP(node_percpu
[i
]);
805 lowmem_end
- PFN_UP(node_percpu
[i
]);
809 #ifdef CONFIG_HIGHMEM
810 if (start
> lowmem_end
) {
811 zones_size
[ZONE_NORMAL
] = 0;
812 zones_size
[ZONE_HIGHMEM
] = end
- start
;
814 zones_size
[ZONE_NORMAL
] = lowmem_end
- start
;
815 zones_size
[ZONE_HIGHMEM
] = end
- lowmem_end
;
818 zones_size
[ZONE_NORMAL
] = end
- start
;
821 if (start
< dma_end
) {
822 zones_size
[ZONE_DMA
] = min(zones_size
[ZONE_NORMAL
],
824 zones_size
[ZONE_NORMAL
] -= zones_size
[ZONE_DMA
];
826 zones_size
[ZONE_DMA
] = 0;
829 /* Take zone metadata from controller 0 if we're isolnode. */
830 if (node_isset(i
, isolnodes
))
831 NODE_DATA(i
)->bdata
= &bootmem_node_data
[0];
833 free_area_init_node(i
, zones_size
, start
, NULL
);
834 printk(KERN_DEBUG
" Normal zone: %ld per-cpu pages\n",
835 PFN_UP(node_percpu
[i
]));
837 /* Track the type of memory on each node */
838 if (zones_size
[ZONE_NORMAL
] || zones_size
[ZONE_DMA
])
839 node_set_state(i
, N_NORMAL_MEMORY
);
840 #ifdef CONFIG_HIGHMEM
842 node_set_state(i
, N_HIGH_MEMORY
);
851 /* which logical CPUs are on which nodes */
852 struct cpumask node_2_cpu_mask
[MAX_NUMNODES
] __write_once
;
853 EXPORT_SYMBOL(node_2_cpu_mask
);
855 /* which node each logical CPU is on */
856 char cpu_2_node
[NR_CPUS
] __write_once
__attribute__((aligned(L2_CACHE_BYTES
)));
857 EXPORT_SYMBOL(cpu_2_node
);
859 /* Return cpu_to_node() except for cpus not yet assigned, which return -1 */
860 static int __init
cpu_to_bound_node(int cpu
, struct cpumask
* unbound_cpus
)
862 if (!cpu_possible(cpu
) || cpumask_test_cpu(cpu
, unbound_cpus
))
865 return cpu_to_node(cpu
);
868 /* Return number of immediately-adjacent tiles sharing the same NUMA node. */
869 static int __init
node_neighbors(int node
, int cpu
,
870 struct cpumask
*unbound_cpus
)
877 if (x
> 0 && cpu_to_bound_node(cpu
-1, unbound_cpus
) == node
)
879 if (x
< w
-1 && cpu_to_bound_node(cpu
+1, unbound_cpus
) == node
)
881 if (y
> 0 && cpu_to_bound_node(cpu
-w
, unbound_cpus
) == node
)
883 if (y
< h
-1 && cpu_to_bound_node(cpu
+w
, unbound_cpus
) == node
)
888 static void __init
setup_numa_mapping(void)
890 int distance
[MAX_NUMNODES
][NR_CPUS
];
892 int cpu
, node
, cpus
, i
, x
, y
;
893 int num_nodes
= num_online_nodes();
894 struct cpumask unbound_cpus
;
895 nodemask_t default_nodes
;
897 cpumask_clear(&unbound_cpus
);
899 /* Get set of nodes we will use for defaults */
900 nodes_andnot(default_nodes
, node_online_map
, isolnodes
);
901 if (nodes_empty(default_nodes
)) {
902 BUG_ON(!node_isset(0, node_online_map
));
903 pr_err("Forcing NUMA node zero available as a default node\n");
904 node_set(0, default_nodes
);
907 /* Populate the distance[] array */
908 memset(distance
, -1, sizeof(distance
));
910 for (coord
.y
= 0; coord
.y
< smp_height
; ++coord
.y
) {
911 for (coord
.x
= 0; coord
.x
< smp_width
;
913 BUG_ON(cpu
>= nr_cpu_ids
);
914 if (!cpu_possible(cpu
)) {
915 cpu_2_node
[cpu
] = -1;
918 for_each_node_mask(node
, default_nodes
) {
919 HV_MemoryControllerInfo info
=
920 hv_inquire_memory_controller(
921 coord
, node_controller
[node
]);
922 distance
[node
][cpu
] =
923 ABS(info
.coord
.x
) + ABS(info
.coord
.y
);
925 cpumask_set_cpu(cpu
, &unbound_cpus
);
931 * Round-robin through the NUMA nodes until all the cpus are
932 * assigned. We could be more clever here (e.g. create four
933 * sorted linked lists on the same set of cpu nodes, and pull
934 * off them in round-robin sequence, removing from all four
935 * lists each time) but given the relatively small numbers
936 * involved, O(n^2) seem OK for a one-time cost.
938 node
= first_node(default_nodes
);
939 while (!cpumask_empty(&unbound_cpus
)) {
941 int best_distance
= INT_MAX
;
942 for (cpu
= 0; cpu
< cpus
; ++cpu
) {
943 if (cpumask_test_cpu(cpu
, &unbound_cpus
)) {
945 * Compute metric, which is how much
946 * closer the cpu is to this memory
947 * controller than the others, shifted
948 * up, and then the number of
949 * neighbors already in the node as an
950 * epsilon adjustment to try to keep
953 int d
= distance
[node
][cpu
] * num_nodes
;
954 for_each_node_mask(i
, default_nodes
) {
956 d
-= distance
[i
][cpu
];
958 d
*= 8; /* allow space for epsilon */
959 d
-= node_neighbors(node
, cpu
, &unbound_cpus
);
960 if (d
< best_distance
) {
966 BUG_ON(best_cpu
< 0);
967 cpumask_set_cpu(best_cpu
, &node_2_cpu_mask
[node
]);
968 cpu_2_node
[best_cpu
] = node
;
969 cpumask_clear_cpu(best_cpu
, &unbound_cpus
);
970 node
= next_node(node
, default_nodes
);
971 if (node
== MAX_NUMNODES
)
972 node
= first_node(default_nodes
);
975 /* Print out node assignments and set defaults for disabled cpus */
977 for (y
= 0; y
< smp_height
; ++y
) {
978 printk(KERN_DEBUG
"NUMA cpu-to-node row %d:", y
);
979 for (x
= 0; x
< smp_width
; ++x
, ++cpu
) {
980 if (cpu_to_node(cpu
) < 0) {
982 cpu_2_node
[cpu
] = first_node(default_nodes
);
984 pr_cont(" %d", cpu_to_node(cpu
));
991 static struct cpu cpu_devices
[NR_CPUS
];
993 static int __init
topology_init(void)
997 for_each_online_node(i
)
998 register_one_node(i
);
1000 for (i
= 0; i
< smp_height
* smp_width
; ++i
)
1001 register_cpu(&cpu_devices
[i
], i
);
1006 subsys_initcall(topology_init
);
1008 #else /* !CONFIG_NUMA */
1010 #define setup_numa_mapping() do { } while (0)
1012 #endif /* CONFIG_NUMA */
1015 * Initialize hugepage support on this cpu. We do this on all cores
1016 * early in boot: before argument parsing for the boot cpu, and after
1017 * argument parsing but before the init functions run on the secondaries.
1018 * So the values we set up here in the hypervisor may be overridden on
1019 * the boot cpu as arguments are parsed.
1021 static void init_super_pages(void)
1023 #ifdef CONFIG_HUGETLB_SUPER_PAGES
1025 for (i
= 0; i
< HUGE_SHIFT_ENTRIES
; ++i
)
1026 hv_set_pte_super_shift(i
, huge_shift
[i
]);
1031 * setup_cpu() - Do all necessary per-cpu, tile-specific initialization.
1032 * @boot: Is this the boot cpu?
1034 * Called from setup_arch() on the boot cpu, or online_secondary().
1036 void setup_cpu(int boot
)
1038 /* The boot cpu sets up its permanent mappings much earlier. */
1040 store_permanent_mappings();
1042 /* Allow asynchronous TLB interrupts. */
1043 #if CHIP_HAS_TILE_DMA()
1044 arch_local_irq_unmask(INT_DMATLB_MISS
);
1045 arch_local_irq_unmask(INT_DMATLB_ACCESS
);
1048 arch_local_irq_unmask(INT_SINGLE_STEP_K
);
1052 * Allow user access to many generic SPRs, like the cycle
1053 * counter, PASS/FAIL/DONE, INTERRUPT_CRITICAL_SECTION, etc.
1055 __insn_mtspr(SPR_MPL_WORLD_ACCESS_SET_0
, 1);
1058 /* Static network is not restricted. */
1059 __insn_mtspr(SPR_MPL_SN_ACCESS_SET_0
, 1);
1063 * Set the MPL for interrupt control 0 & 1 to the corresponding
1064 * values. This includes access to the SYSTEM_SAVE and EX_CONTEXT
1065 * SPRs, as well as the interrupt mask.
1067 __insn_mtspr(SPR_MPL_INTCTRL_0_SET_0
, 1);
1068 __insn_mtspr(SPR_MPL_INTCTRL_1_SET_1
, 1);
1070 /* Initialize IRQ support for this cpu. */
1073 #ifdef CONFIG_HARDWALL
1074 /* Reset the network state on this cpu. */
1075 reset_network_state();
1081 #ifdef CONFIG_BLK_DEV_INITRD
1083 static int __initdata set_initramfs_file
;
1084 static char __initdata initramfs_file
[128] = "initramfs";
1086 static int __init
setup_initramfs_file(char *str
)
1090 strncpy(initramfs_file
, str
, sizeof(initramfs_file
) - 1);
1091 set_initramfs_file
= 1;
1095 early_param("initramfs_file", setup_initramfs_file
);
1098 * We look for a file called "initramfs" in the hvfs. If there is one, we
1099 * allocate some memory for it and it will be unpacked to the initramfs.
1100 * If it's compressed, the initd code will uncompress it first.
1102 static void __init
load_hv_initrd(void)
1104 HV_FS_StatInfo stat
;
1108 /* If initrd has already been set, skip initramfs file in hvfs. */
1112 fd
= hv_fs_findfile((HV_VirtAddr
) initramfs_file
);
1113 if (fd
== HV_ENOENT
) {
1114 if (set_initramfs_file
) {
1115 pr_warning("No such hvfs initramfs file '%s'\n",
1119 /* Try old backwards-compatible name. */
1120 fd
= hv_fs_findfile((HV_VirtAddr
)"initramfs.cpio.gz");
1121 if (fd
== HV_ENOENT
)
1126 stat
= hv_fs_fstat(fd
);
1127 BUG_ON(stat
.size
< 0);
1128 if (stat
.flags
& HV_FS_ISDIR
) {
1129 pr_warning("Ignoring hvfs file '%s': it's a directory.\n",
1133 initrd
= alloc_bootmem_pages(stat
.size
);
1134 rc
= hv_fs_pread(fd
, (HV_VirtAddr
) initrd
, stat
.size
, 0);
1135 if (rc
!= stat
.size
) {
1136 pr_err("Error reading %d bytes from hvfs file '%s': %d\n",
1137 stat
.size
, initramfs_file
, rc
);
1138 free_initrd_mem((unsigned long) initrd
, stat
.size
);
1141 initrd_start
= (unsigned long) initrd
;
1142 initrd_end
= initrd_start
+ stat
.size
;
1145 void __init
free_initrd_mem(unsigned long begin
, unsigned long end
)
1147 free_bootmem(__pa(begin
), end
- begin
);
1150 static int __init
setup_initrd(char *str
)
1153 unsigned long initrd_size
;
1155 initrd_size
= str
? simple_strtoul(str
, &endp
, 0) : 0;
1156 if (initrd_size
== 0 || *endp
!= '@')
1159 initrd_start
= simple_strtoul(endp
+1, &endp
, 0);
1160 if (initrd_start
== 0)
1163 initrd_end
= initrd_start
+ initrd_size
;
1167 early_param("initrd", setup_initrd
);
1170 static inline void load_hv_initrd(void) {}
1171 #endif /* CONFIG_BLK_DEV_INITRD */
1173 static void __init
validate_hv(void)
1176 * It may already be too late, but let's check our built-in
1177 * configuration against what the hypervisor is providing.
1179 unsigned long glue_size
= hv_sysconf(HV_SYSCONF_GLUE_SIZE
);
1180 int hv_page_size
= hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL
);
1181 int hv_hpage_size
= hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE
);
1182 HV_ASIDRange asid_range
;
1185 HV_Topology topology
= hv_inquire_topology();
1186 BUG_ON(topology
.coord
.x
!= 0 || topology
.coord
.y
!= 0);
1187 if (topology
.width
!= 1 || topology
.height
!= 1) {
1188 pr_warning("Warning: booting UP kernel on %dx%d grid;"
1189 " will ignore all but first tile.\n",
1190 topology
.width
, topology
.height
);
1194 if (PAGE_OFFSET
+ HV_GLUE_START_CPA
+ glue_size
> (unsigned long)_text
)
1195 early_panic("Hypervisor glue size %ld is too big!\n",
1197 if (hv_page_size
!= PAGE_SIZE
)
1198 early_panic("Hypervisor page size %#x != our %#lx\n",
1199 hv_page_size
, PAGE_SIZE
);
1200 if (hv_hpage_size
!= HPAGE_SIZE
)
1201 early_panic("Hypervisor huge page size %#x != our %#lx\n",
1202 hv_hpage_size
, HPAGE_SIZE
);
1206 * Some hypervisor APIs take a pointer to a bitmap array
1207 * whose size is at least the number of cpus on the chip.
1208 * We use a struct cpumask for this, so it must be big enough.
1210 if ((smp_height
* smp_width
) > nr_cpu_ids
)
1211 early_panic("Hypervisor %d x %d grid too big for Linux"
1212 " NR_CPUS %d\n", smp_height
, smp_width
,
1217 * Check that we're using allowed ASIDs, and initialize the
1218 * various asid variables to their appropriate initial states.
1220 asid_range
= hv_inquire_asid(0);
1221 __get_cpu_var(current_asid
) = min_asid
= asid_range
.start
;
1222 max_asid
= asid_range
.start
+ asid_range
.size
- 1;
1224 if (hv_confstr(HV_CONFSTR_CHIP_MODEL
, (HV_VirtAddr
)chip_model
,
1225 sizeof(chip_model
)) < 0) {
1226 pr_err("Warning: HV_CONFSTR_CHIP_MODEL not available\n");
1227 strlcpy(chip_model
, "unknown", sizeof(chip_model
));
1231 static void __init
validate_va(void)
1233 #ifndef __tilegx__ /* FIXME: GX: probably some validation relevant here */
1235 * Similarly, make sure we're only using allowed VAs.
1236 * We assume we can contiguously use MEM_USER_INTRPT .. MEM_HV_START,
1237 * and 0 .. KERNEL_HIGH_VADDR.
1238 * In addition, make sure we CAN'T use the end of memory, since
1239 * we use the last chunk of each pgd for the pgd_list.
1241 int i
, user_kernel_ok
= 0;
1242 unsigned long max_va
= 0;
1243 unsigned long list_va
=
1244 ((PGD_LIST_OFFSET
/ sizeof(pgd_t
)) << PGDIR_SHIFT
);
1246 for (i
= 0; ; ++i
) {
1247 HV_VirtAddrRange range
= hv_inquire_virtual(i
);
1248 if (range
.size
== 0)
1250 if (range
.start
<= MEM_USER_INTRPT
&&
1251 range
.start
+ range
.size
>= MEM_HV_START
)
1253 if (range
.start
== 0)
1254 max_va
= range
.size
;
1255 BUG_ON(range
.start
+ range
.size
> list_va
);
1257 if (!user_kernel_ok
)
1258 early_panic("Hypervisor not configured for user/kernel VAs\n");
1260 early_panic("Hypervisor not configured for low VAs\n");
1261 if (max_va
< KERNEL_HIGH_VADDR
)
1262 early_panic("Hypervisor max VA %#lx smaller than %#lx\n",
1263 max_va
, KERNEL_HIGH_VADDR
);
1265 /* Kernel PCs must have their high bit set; see intvec.S. */
1266 if ((long)VMALLOC_START
>= 0)
1268 "Linux VMALLOC region below the 2GB line (%#lx)!\n"
1269 "Reconfigure the kernel with smaller VMALLOC_RESERVE.\n",
1275 * cpu_lotar_map lists all the cpus that are valid for the supervisor
1276 * to cache data on at a page level, i.e. what cpus can be placed in
1277 * the LOTAR field of a PTE. It is equivalent to the set of possible
1278 * cpus plus any other cpus that are willing to share their cache.
1279 * It is set by hv_inquire_tiles(HV_INQ_TILES_LOTAR).
1281 struct cpumask __write_once cpu_lotar_map
;
1282 EXPORT_SYMBOL(cpu_lotar_map
);
1285 * hash_for_home_map lists all the tiles that hash-for-home data
1286 * will be cached on. Note that this may includes tiles that are not
1287 * valid for this supervisor to use otherwise (e.g. if a hypervisor
1288 * device is being shared between multiple supervisors).
1289 * It is set by hv_inquire_tiles(HV_INQ_TILES_HFH_CACHE).
1291 struct cpumask hash_for_home_map
;
1292 EXPORT_SYMBOL(hash_for_home_map
);
1295 * cpu_cacheable_map lists all the cpus whose caches the hypervisor can
1296 * flush on our behalf. It is set to cpu_possible_mask OR'ed with
1297 * hash_for_home_map, and it is what should be passed to
1298 * hv_flush_remote() to flush all caches. Note that if there are
1299 * dedicated hypervisor driver tiles that have authorized use of their
1300 * cache, those tiles will only appear in cpu_lotar_map, NOT in
1301 * cpu_cacheable_map, as they are a special case.
1303 struct cpumask __write_once cpu_cacheable_map
;
1304 EXPORT_SYMBOL(cpu_cacheable_map
);
1306 static __initdata
struct cpumask disabled_map
;
1308 static int __init
disabled_cpus(char *str
)
1310 int boot_cpu
= smp_processor_id();
1312 if (str
== NULL
|| cpulist_parse_crop(str
, &disabled_map
) != 0)
1314 if (cpumask_test_cpu(boot_cpu
, &disabled_map
)) {
1315 pr_err("disabled_cpus: can't disable boot cpu %d\n", boot_cpu
);
1316 cpumask_clear_cpu(boot_cpu
, &disabled_map
);
1321 early_param("disabled_cpus", disabled_cpus
);
1323 void __init
print_disabled_cpus(void)
1325 if (!cpumask_empty(&disabled_map
)) {
1327 cpulist_scnprintf(buf
, sizeof(buf
), &disabled_map
);
1328 pr_info("CPUs not available for Linux: %s\n", buf
);
1332 static void __init
setup_cpu_maps(void)
1334 struct cpumask hv_disabled_map
, cpu_possible_init
;
1335 int boot_cpu
= smp_processor_id();
1338 /* Learn which cpus are allowed by the hypervisor. */
1339 rc
= hv_inquire_tiles(HV_INQ_TILES_AVAIL
,
1340 (HV_VirtAddr
) cpumask_bits(&cpu_possible_init
),
1341 sizeof(cpu_cacheable_map
));
1343 early_panic("hv_inquire_tiles(AVAIL) failed: rc %d\n", rc
);
1344 if (!cpumask_test_cpu(boot_cpu
, &cpu_possible_init
))
1345 early_panic("Boot CPU %d disabled by hypervisor!\n", boot_cpu
);
1347 /* Compute the cpus disabled by the hvconfig file. */
1348 cpumask_complement(&hv_disabled_map
, &cpu_possible_init
);
1350 /* Include them with the cpus disabled by "disabled_cpus". */
1351 cpumask_or(&disabled_map
, &disabled_map
, &hv_disabled_map
);
1354 * Disable every cpu after "setup_max_cpus". But don't mark
1355 * as disabled the cpus that are outside of our initial rectangle,
1356 * since that turns out to be confusing.
1358 cpus
= 1; /* this cpu */
1359 cpumask_set_cpu(boot_cpu
, &disabled_map
); /* ignore this cpu */
1360 for (i
= 0; cpus
< setup_max_cpus
; ++i
)
1361 if (!cpumask_test_cpu(i
, &disabled_map
))
1363 for (; i
< smp_height
* smp_width
; ++i
)
1364 cpumask_set_cpu(i
, &disabled_map
);
1365 cpumask_clear_cpu(boot_cpu
, &disabled_map
); /* reset this cpu */
1366 for (i
= smp_height
* smp_width
; i
< NR_CPUS
; ++i
)
1367 cpumask_clear_cpu(i
, &disabled_map
);
1370 * Setup cpu_possible map as every cpu allocated to us, minus
1371 * the results of any "disabled_cpus" settings.
1373 cpumask_andnot(&cpu_possible_init
, &cpu_possible_init
, &disabled_map
);
1374 init_cpu_possible(&cpu_possible_init
);
1376 /* Learn which cpus are valid for LOTAR caching. */
1377 rc
= hv_inquire_tiles(HV_INQ_TILES_LOTAR
,
1378 (HV_VirtAddr
) cpumask_bits(&cpu_lotar_map
),
1379 sizeof(cpu_lotar_map
));
1381 pr_err("warning: no HV_INQ_TILES_LOTAR; using AVAIL\n");
1382 cpu_lotar_map
= *cpu_possible_mask
;
1385 /* Retrieve set of CPUs used for hash-for-home caching */
1386 rc
= hv_inquire_tiles(HV_INQ_TILES_HFH_CACHE
,
1387 (HV_VirtAddr
) hash_for_home_map
.bits
,
1388 sizeof(hash_for_home_map
));
1390 early_panic("hv_inquire_tiles(HFH_CACHE) failed: rc %d\n", rc
);
1391 cpumask_or(&cpu_cacheable_map
, cpu_possible_mask
, &hash_for_home_map
);
1395 static int __init
dataplane(char *str
)
1397 pr_warning("WARNING: dataplane support disabled in this kernel\n");
1401 early_param("dataplane", dataplane
);
1403 #ifdef CONFIG_CMDLINE_BOOL
1404 static char __initdata builtin_cmdline
[COMMAND_LINE_SIZE
] = CONFIG_CMDLINE
;
1407 void __init
setup_arch(char **cmdline_p
)
1411 #if defined(CONFIG_CMDLINE_BOOL) && defined(CONFIG_CMDLINE_OVERRIDE)
1412 len
= hv_get_command_line((HV_VirtAddr
) boot_command_line
,
1414 if (boot_command_line
[0])
1415 pr_warning("WARNING: ignoring dynamic command line \"%s\"\n",
1417 strlcpy(boot_command_line
, builtin_cmdline
, COMMAND_LINE_SIZE
);
1420 #if defined(CONFIG_CMDLINE_BOOL)
1421 if (builtin_cmdline
[0]) {
1422 int builtin_len
= strlcpy(boot_command_line
, builtin_cmdline
,
1424 if (builtin_len
< COMMAND_LINE_SIZE
-1)
1425 boot_command_line
[builtin_len
++] = ' ';
1426 hv_cmdline
= &boot_command_line
[builtin_len
];
1427 len
= COMMAND_LINE_SIZE
- builtin_len
;
1431 hv_cmdline
= boot_command_line
;
1432 len
= COMMAND_LINE_SIZE
;
1434 len
= hv_get_command_line((HV_VirtAddr
) hv_cmdline
, len
);
1435 if (len
< 0 || len
> COMMAND_LINE_SIZE
)
1436 early_panic("hv_get_command_line failed: %d\n", len
);
1439 *cmdline_p
= boot_command_line
;
1441 /* Set disabled_map and setup_max_cpus very early */
1442 parse_early_param();
1444 /* Make sure the kernel is compatible with the hypervisor. */
1451 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1453 * Initialize the PCI structures. This is done before memory
1454 * setup so that we know whether or not a pci_reserve region
1457 if (tile_pci_init() == 0)
1460 /* PCI systems reserve a region just below 4GB for mapping iomem. */
1461 pci_reserve_end_pfn
= (1 << (32 - PAGE_SHIFT
));
1462 pci_reserve_start_pfn
= pci_reserve_end_pfn
-
1463 (pci_reserve_mb
<< (20 - PAGE_SHIFT
));
1466 init_mm
.start_code
= (unsigned long) _text
;
1467 init_mm
.end_code
= (unsigned long) _etext
;
1468 init_mm
.end_data
= (unsigned long) _edata
;
1469 init_mm
.brk
= (unsigned long) _end
;
1472 store_permanent_mappings();
1473 setup_bootmem_allocator();
1476 * NOTE: before this point _nobody_ is allowed to allocate
1477 * any memory using the bootmem allocator.
1480 #ifdef CONFIG_SWIOTLB
1485 setup_numa_mapping();
1495 * Set up per-cpu memory.
1498 unsigned long __per_cpu_offset
[NR_CPUS
] __write_once
;
1499 EXPORT_SYMBOL(__per_cpu_offset
);
1501 static size_t __initdata pfn_offset
[MAX_NUMNODES
] = { 0 };
1502 static unsigned long __initdata percpu_pfn
[NR_CPUS
] = { 0 };
1505 * As the percpu code allocates pages, we return the pages from the
1506 * end of the node for the specified cpu.
1508 static void *__init
pcpu_fc_alloc(unsigned int cpu
, size_t size
, size_t align
)
1510 int nid
= cpu_to_node(cpu
);
1511 unsigned long pfn
= node_percpu_pfn
[nid
] + pfn_offset
[nid
];
1513 BUG_ON(size
% PAGE_SIZE
!= 0);
1514 pfn_offset
[nid
] += size
/ PAGE_SIZE
;
1515 BUG_ON(node_percpu
[nid
] < size
);
1516 node_percpu
[nid
] -= size
;
1517 if (percpu_pfn
[cpu
] == 0)
1518 percpu_pfn
[cpu
] = pfn
;
1519 return pfn_to_kaddr(pfn
);
1523 * Pages reserved for percpu memory are not freeable, and in any case we are
1524 * on a short path to panic() in setup_per_cpu_area() at this point anyway.
1526 static void __init
pcpu_fc_free(void *ptr
, size_t size
)
1531 * Set up vmalloc page tables using bootmem for the percpu code.
1533 static void __init
pcpu_fc_populate_pte(unsigned long addr
)
1540 BUG_ON(pgd_addr_invalid(addr
));
1541 if (addr
< VMALLOC_START
|| addr
>= VMALLOC_END
)
1542 panic("PCPU addr %#lx outside vmalloc range %#lx..%#lx;"
1543 " try increasing CONFIG_VMALLOC_RESERVE\n",
1544 addr
, VMALLOC_START
, VMALLOC_END
);
1546 pgd
= swapper_pg_dir
+ pgd_index(addr
);
1547 pud
= pud_offset(pgd
, addr
);
1548 BUG_ON(!pud_present(*pud
));
1549 pmd
= pmd_offset(pud
, addr
);
1550 if (pmd_present(*pmd
)) {
1551 BUG_ON(pmd_huge_page(*pmd
));
1553 pte
= __alloc_bootmem(L2_KERNEL_PGTABLE_SIZE
,
1554 HV_PAGE_TABLE_ALIGN
, 0);
1555 pmd_populate_kernel(&init_mm
, pmd
, pte
);
1559 void __init
setup_per_cpu_areas(void)
1562 unsigned long delta
, pfn
, lowmem_va
;
1563 unsigned long size
= percpu_size();
1567 rc
= pcpu_page_first_chunk(PERCPU_MODULE_RESERVE
, pcpu_fc_alloc
,
1568 pcpu_fc_free
, pcpu_fc_populate_pte
);
1570 panic("Cannot initialize percpu area (err=%d)", rc
);
1572 delta
= (unsigned long)pcpu_base_addr
- (unsigned long)__per_cpu_start
;
1573 for_each_possible_cpu(cpu
) {
1574 __per_cpu_offset
[cpu
] = delta
+ pcpu_unit_offsets
[cpu
];
1576 /* finv the copy out of cache so we can change homecache */
1577 ptr
= pcpu_base_addr
+ pcpu_unit_offsets
[cpu
];
1578 __finv_buffer(ptr
, size
);
1579 pfn
= percpu_pfn
[cpu
];
1581 /* Rewrite the page tables to cache on that cpu */
1582 pg
= pfn_to_page(pfn
);
1583 for (i
= 0; i
< size
; i
+= PAGE_SIZE
, ++pfn
, ++pg
) {
1585 /* Update the vmalloc mapping and page home. */
1586 unsigned long addr
= (unsigned long)ptr
+ i
;
1587 pte_t
*ptep
= virt_to_kpte(addr
);
1589 BUG_ON(pfn
!= pte_pfn(pte
));
1590 pte
= hv_pte_set_mode(pte
, HV_PTE_MODE_CACHE_TILE_L3
);
1591 pte
= set_remote_cache_cpu(pte
, cpu
);
1592 set_pte_at(&init_mm
, addr
, ptep
, pte
);
1594 /* Update the lowmem mapping for consistency. */
1595 lowmem_va
= (unsigned long)pfn_to_kaddr(pfn
);
1596 ptep
= virt_to_kpte(lowmem_va
);
1597 if (pte_huge(*ptep
)) {
1598 printk(KERN_DEBUG
"early shatter of huge page"
1599 " at %#lx\n", lowmem_va
);
1600 shatter_pmd((pmd_t
*)ptep
);
1601 ptep
= virt_to_kpte(lowmem_va
);
1602 BUG_ON(pte_huge(*ptep
));
1604 BUG_ON(pfn
!= pte_pfn(*ptep
));
1605 set_pte_at(&init_mm
, lowmem_va
, ptep
, pte
);
1609 /* Set our thread pointer appropriately. */
1610 set_my_cpu_offset(__per_cpu_offset
[smp_processor_id()]);
1612 /* Make sure the finv's have completed. */
1615 /* Flush the TLB so we reference it properly from here on out. */
1616 local_flush_tlb_all();
1619 static struct resource data_resource
= {
1620 .name
= "Kernel data",
1623 .flags
= IORESOURCE_BUSY
| IORESOURCE_MEM
1626 static struct resource code_resource
= {
1627 .name
= "Kernel code",
1630 .flags
= IORESOURCE_BUSY
| IORESOURCE_MEM
1634 * On Pro, we reserve all resources above 4GB so that PCI won't try to put
1635 * mappings above 4GB.
1637 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1638 static struct resource
* __init
1639 insert_non_bus_resource(void)
1641 struct resource
*res
=
1642 kzalloc(sizeof(struct resource
), GFP_ATOMIC
);
1645 res
->name
= "Non-Bus Physical Address Space";
1646 res
->start
= (1ULL << 32);
1648 res
->flags
= IORESOURCE_BUSY
| IORESOURCE_MEM
;
1649 if (insert_resource(&iomem_resource
, res
)) {
1657 static struct resource
* __init
1658 insert_ram_resource(u64 start_pfn
, u64 end_pfn
, bool reserved
)
1660 struct resource
*res
=
1661 kzalloc(sizeof(struct resource
), GFP_ATOMIC
);
1664 res
->name
= reserved
? "Reserved" : "System RAM";
1665 res
->start
= start_pfn
<< PAGE_SHIFT
;
1666 res
->end
= (end_pfn
<< PAGE_SHIFT
) - 1;
1667 res
->flags
= IORESOURCE_BUSY
| IORESOURCE_MEM
;
1668 if (insert_resource(&iomem_resource
, res
)) {
1676 * Request address space for all standard resources
1678 * If the system includes PCI root complex drivers, we need to create
1679 * a window just below 4GB where PCI BARs can be mapped.
1681 static int __init
request_standard_resources(void)
1684 enum { CODE_DELTA
= MEM_SV_START
- PAGE_OFFSET
};
1686 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1687 insert_non_bus_resource();
1690 for_each_online_node(i
) {
1691 u64 start_pfn
= node_start_pfn
[i
];
1692 u64 end_pfn
= node_end_pfn
[i
];
1694 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1695 if (start_pfn
<= pci_reserve_start_pfn
&&
1696 end_pfn
> pci_reserve_start_pfn
) {
1697 if (end_pfn
> pci_reserve_end_pfn
)
1698 insert_ram_resource(pci_reserve_end_pfn
,
1700 end_pfn
= pci_reserve_start_pfn
;
1703 insert_ram_resource(start_pfn
, end_pfn
, 0);
1706 code_resource
.start
= __pa(_text
- CODE_DELTA
);
1707 code_resource
.end
= __pa(_etext
- CODE_DELTA
)-1;
1708 data_resource
.start
= __pa(_sdata
);
1709 data_resource
.end
= __pa(_end
)-1;
1711 insert_resource(&iomem_resource
, &code_resource
);
1712 insert_resource(&iomem_resource
, &data_resource
);
1714 /* Mark any "memmap" regions busy for the resource manager. */
1715 for (i
= 0; i
< memmap_nr
; ++i
) {
1716 struct memmap_entry
*m
= &memmap_map
[i
];
1717 insert_ram_resource(PFN_DOWN(m
->addr
),
1718 PFN_UP(m
->addr
+ m
->size
- 1), 1);
1722 insert_resource(&iomem_resource
, &crashk_res
);
1728 subsys_initcall(request_standard_resources
);