arch/tile/kernel/time.c

   1 /*
   2  * Copyright 2010 Tilera Corporation. All Rights Reserved.
   3  *
   4  *   This program is free software; you can redistribute it and/or
   5  *   modify it under the terms of the GNU General Public License
   6  *   as published by the Free Software Foundation, version 2.
   7  *
   8  *   This program is distributed in the hope that it will be useful, but
   9  *   WITHOUT ANY WARRANTY; without even the implied warranty of
  10  *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11  *   NON INFRINGEMENT.  See the GNU General Public License for
  12  *   more details.
  13  *
  14  * Support the cycle counter clocksource and tile timer clock event device.
  15  */
  16
  17 #include <linux/time.h>
  18 #include <linux/timex.h>
  19 #include <linux/clocksource.h>
  20 #include <linux/clockchips.h>
  21 #include <linux/hardirq.h>
  22 #include <linux/sched.h>
  23 #include <linux/smp.h>
  24 #include <linux/delay.h>
  25 #include <linux/module.h>
  26 #include <linux/timekeeper_internal.h>
  27 #include <asm/irq_regs.h>
  28 #include <asm/traps.h>
  29 #include <asm/vdso.h>
  30 #include <hv/hypervisor.h>
  31 #include <arch/interrupts.h>
  32 #include <arch/spr_def.h>
  33
  34
  35 /*
  36  * Define the cycle counter clock source.
  37  */
  38
  39 /* How many cycles per second we are running at. */
  40 static cycles_t cycles_per_sec __write_once;
  41
  42 cycles_t get_clock_rate(void)
  43 {
  44         return cycles_per_sec;
  45 }
  46
  47 #if CHIP_HAS_SPLIT_CYCLE()
  48 cycles_t get_cycles(void)
  49 {
  50         unsigned int high = __insn_mfspr(SPR_CYCLE_HIGH);
  51         unsigned int low = __insn_mfspr(SPR_CYCLE_LOW);
  52         unsigned int high2 = __insn_mfspr(SPR_CYCLE_HIGH);
  53
  54         while (unlikely(high != high2)) {
  55                 low = __insn_mfspr(SPR_CYCLE_LOW);
  56                 high = high2;
  57                 high2 = __insn_mfspr(SPR_CYCLE_HIGH);
  58         }
  59
  60         return (((cycles_t)high) << 32) | low;
  61 }
  62 EXPORT_SYMBOL(get_cycles);
  63 #endif
  64
  65 /*
  66  * We use a relatively small shift value so that sched_clock()
  67  * won't wrap around very often.
  68  */
  69 #define SCHED_CLOCK_SHIFT 10
  70
  71 static unsigned long sched_clock_mult __write_once;
  72
  73 static cycles_t clocksource_get_cycles(struct clocksource *cs)
  74 {
  75         return get_cycles();
  76 }
  77
  78 static struct clocksource cycle_counter_cs = {
  79         .name = "cycle counter",
  80         .rating = 300,
  81         .read = clocksource_get_cycles,
  82         .mask = CLOCKSOURCE_MASK(64),
  83         .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  84 };
  85
  86 /*
  87  * Called very early from setup_arch() to set cycles_per_sec.
  88  * We initialize it early so we can use it to set up loops_per_jiffy.
  89  */
  90 void __init setup_clock(void)
  91 {
  92         cycles_per_sec = hv_sysconf(HV_SYSCONF_CPU_SPEED);
  93         sched_clock_mult =
  94                 clocksource_hz2mult(cycles_per_sec, SCHED_CLOCK_SHIFT);
  95 }
  96
  97 void __init calibrate_delay(void)
  98 {
  99         loops_per_jiffy = get_clock_rate() / HZ;
 100         pr_info("Clock rate yields %lu.%02lu BogoMIPS (lpj=%lu)\n",
 101                 loops_per_jiffy/(500000/HZ),
 102                 (loops_per_jiffy/(5000/HZ)) % 100, loops_per_jiffy);
 103 }
 104
 105 /* Called fairly late in init/main.c, but before we go smp. */
 106 void __init time_init(void)
 107 {
 108         /* Initialize and register the clock source. */
 109         clocksource_register_hz(&cycle_counter_cs, cycles_per_sec);
 110
 111         /* Start up the tile-timer interrupt source on the boot cpu. */
 112         setup_tile_timer();
 113 }
 114
 115 /*
 116  * Define the tile timer clock event device.  The timer is driven by
 117  * the TILE_TIMER_CONTROL register, which consists of a 31-bit down
 118  * counter, plus bit 31, which signifies that the counter has wrapped
 119  * from zero to (2**31) - 1.  The INT_TILE_TIMER interrupt will be
 120  * raised as long as bit 31 is set.
 121  *
 122  * The TILE_MINSEC value represents the largest range of real-time
 123  * we can possibly cover with the timer, based on MAX_TICK combined
 124  * with the slowest reasonable clock rate we might run at.
 125  */
 126
 127 #define MAX_TICK 0x7fffffff   /* we have 31 bits of countdown timer */
 128 #define TILE_MINSEC 5         /* timer covers no more than 5 seconds */
 129
 130 static int tile_timer_set_next_event(unsigned long ticks,
 131                                      struct clock_event_device *evt)
 132 {
 133         BUG_ON(ticks > MAX_TICK);
 134         __insn_mtspr(SPR_TILE_TIMER_CONTROL, ticks);
 135         arch_local_irq_unmask_now(INT_TILE_TIMER);
 136         return 0;
 137 }
 138
 139 /*
 140  * Whenever anyone tries to change modes, we just mask interrupts
 141  * and wait for the next event to get set.
 142  */
 143 static void tile_timer_set_mode(enum clock_event_mode mode,
 144                                 struct clock_event_device *evt)
 145 {
 146         arch_local_irq_mask_now(INT_TILE_TIMER);
 147 }
 148
 149 /*
 150  * Set min_delta_ns to 1 microsecond, since it takes about
 151  * that long to fire the interrupt.
 152  */
 153 static DEFINE_PER_CPU(struct clock_event_device, tile_timer) = {
 154         .name = "tile timer",
 155         .features = CLOCK_EVT_FEAT_ONESHOT,
 156         .min_delta_ns = 1000,
 157         .rating = 100,
 158         .irq = -1,
 159         .set_next_event = tile_timer_set_next_event,
 160         .set_mode = tile_timer_set_mode,
 161 };
 162
 163 void setup_tile_timer(void)
 164 {
 165         struct clock_event_device *evt = &__get_cpu_var(tile_timer);
 166
 167         /* Fill in fields that are speed-specific. */
 168         clockevents_calc_mult_shift(evt, cycles_per_sec, TILE_MINSEC);
 169         evt->max_delta_ns = clockevent_delta2ns(MAX_TICK, evt);
 170
 171         /* Mark as being for this cpu only. */
 172         evt->cpumask = cpumask_of(smp_processor_id());
 173
 174         /* Start out with timer not firing. */
 175         arch_local_irq_mask_now(INT_TILE_TIMER);
 176
 177         /* Register tile timer. */
 178         clockevents_register_device(evt);
 179 }
 180
 181 /* Called from the interrupt vector. */
 182 void do_timer_interrupt(struct pt_regs *regs, int fault_num)
 183 {
 184         struct pt_regs *old_regs = set_irq_regs(regs);
 185         struct clock_event_device *evt = &__get_cpu_var(tile_timer);
 186
 187         /*
 188          * Mask the timer interrupt here, since we are a oneshot timer
 189          * and there are now by definition no events pending.
 190          */
 191         arch_local_irq_mask(INT_TILE_TIMER);
 192
 193         /* Track time spent here in an interrupt context */
 194         irq_enter();
 195
 196         /* Track interrupt count. */
 197         __get_cpu_var(irq_stat).irq_timer_count++;
 198
 199         /* Call the generic timer handler */
 200         evt->event_handler(evt);
 201
 202         /*
 203          * Track time spent against the current process again and
 204          * process any softirqs if they are waiting.
 205          */
 206         irq_exit();
 207
 208         set_irq_regs(old_regs);
 209 }
 210
 211 /*
 212  * Scheduler clock - returns current time in nanosec units.
 213  * Note that with LOCKDEP, this is called during lockdep_init(), and
 214  * we will claim that sched_clock() is zero for a little while, until
 215  * we run setup_clock(), above.
 216  */
 217 unsigned long long sched_clock(void)
 218 {
 219         return clocksource_cyc2ns(get_cycles(),
 220                                   sched_clock_mult, SCHED_CLOCK_SHIFT);
 221 }
 222
 223 int setup_profiling_timer(unsigned int multiplier)
 224 {
 225         return -EINVAL;
 226 }
 227
 228 /*
 229  * Use the tile timer to convert nsecs to core clock cycles, relying
 230  * on it having the same frequency as SPR_CYCLE.
 231  */
 232 cycles_t ns2cycles(unsigned long nsecs)
 233 {
 234         /*
 235          * We do not have to disable preemption here as each core has the same
 236          * clock frequency.
 237          */
 238         struct clock_event_device *dev = &__raw_get_cpu_var(tile_timer);
 239
 240         /*
 241          * as in clocksource.h and x86's timer.h, we split the calculation
 242          * into 2 parts to avoid unecessary overflow of the intermediate
 243          * value. This will not lead to any loss of precision.
 244          */
 245         u64 quot = (u64)nsecs >> dev->shift;
 246         u64 rem  = (u64)nsecs & ((1ULL << dev->shift) - 1);
 247         return quot * dev->mult + ((rem * dev->mult) >> dev->shift);
 248 }
 249
 250 void update_vsyscall_tz(void)
 251 {
 252         /* Userspace gettimeofday will spin while this value is odd. */
 253         ++vdso_data->tz_update_count;
 254         smp_wmb();
 255         vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
 256         vdso_data->tz_dsttime = sys_tz.tz_dsttime;
 257         smp_wmb();
 258         ++vdso_data->tz_update_count;
 259 }
 260
 261 void update_vsyscall(struct timekeeper *tk)
 262 {
 263         struct timespec *wtm = &tk->wall_to_monotonic;
 264         struct clocksource *clock = tk->tkr.clock;
 265
 266         if (clock != &cycle_counter_cs)
 267                 return;
 268
 269         /* Userspace gettimeofday will spin while this value is odd. */
 270         ++vdso_data->tb_update_count;
 271         smp_wmb();
 272         vdso_data->xtime_tod_stamp = tk->tkr.cycle_last;
 273         vdso_data->xtime_clock_sec = tk->xtime_sec;
 274         vdso_data->xtime_clock_nsec = tk->tkr.xtime_nsec;
 275         vdso_data->wtom_clock_sec = wtm->tv_sec;
 276         vdso_data->wtom_clock_nsec = wtm->tv_nsec;
 277         vdso_data->mult = tk->tkr.mult;
 278         vdso_data->shift = tk->tkr.shift;
 279         smp_wmb();
 280         ++vdso_data->tb_update_count;
 281 }