arch/unicore32/include/asm/tlb.h

   1 /*
   2  * linux/arch/unicore32/include/asm/tlb.h
   3  *
   4  * Code specific to PKUnity SoC and UniCore ISA
   5  *
   6  * Copyright (C) 2001-2010 GUAN Xue-tao
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #ifndef __UNICORE_TLB_H__
  13 #define __UNICORE_TLB_H__
  14
  15 #include <asm/cacheflush.h>
  16 #include <asm/tlbflush.h>
  17 #include <asm/pgalloc.h>
  18
  19 /*
  20  * TLB handling.  This allows us to remove pages from the page
  21  * tables, and efficiently handle the TLB issues.
  22  */
  23 struct mmu_gather {
  24         struct mm_struct        *mm;
  25         unsigned int            fullmm;
  26         unsigned long           range_start;
  27         unsigned long           range_end;
  28 };
  29
  30 DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
  31
  32 static inline struct mmu_gather *
  33 tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
  34 {
  35         struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
  36
  37         tlb->mm = mm;
  38         tlb->fullmm = full_mm_flush;
  39
  40         return tlb;
  41 }
  42
  43 static inline void
  44 tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
  45 {
  46         if (tlb->fullmm)
  47                 flush_tlb_mm(tlb->mm);
  48
  49         /* keep the page table cache within bounds */
  50         check_pgt_cache();
  51
  52         put_cpu_var(mmu_gathers);
  53 }
  54
  55 /*
  56  * Memorize the range for the TLB flush.
  57  */
  58 static inline void
  59 tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long addr)
  60 {
  61         if (!tlb->fullmm) {
  62                 if (addr < tlb->range_start)
  63                         tlb->range_start = addr;
  64                 if (addr + PAGE_SIZE > tlb->range_end)
  65                         tlb->range_end = addr + PAGE_SIZE;
  66         }
  67 }
  68
  69 /*
  70  * In the case of tlb vma handling, we can optimise these away in the
  71  * case where we're doing a full MM flush.  When we're doing a munmap,
  72  * the vmas are adjusted to only cover the region to be torn down.
  73  */
  74 static inline void
  75 tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
  76 {
  77         if (!tlb->fullmm) {
  78                 flush_cache_range(vma, vma->vm_start, vma->vm_end);
  79                 tlb->range_start = TASK_SIZE;
  80                 tlb->range_end = 0;
  81         }
  82 }
  83
  84 static inline void
  85 tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
  86 {
  87         if (!tlb->fullmm && tlb->range_end > 0)
  88                 flush_tlb_range(vma, tlb->range_start, tlb->range_end);
  89 }
  90
  91 #define tlb_remove_page(tlb, page)      free_page_and_swap_cache(page)
  92 #define pte_free_tlb(tlb, ptep, addr)   pte_free((tlb)->mm, ptep)
  93 #define pmd_free_tlb(tlb, pmdp, addr)   pmd_free((tlb)->mm, pmdp)
  94 #define pud_free_tlb(tlb, x, addr)      do { } while (0)
  95
  96 #define tlb_migrate_finish(mm)          do { } while (0)
  97
  98 #endif