Merge tag 'for-3.7-rc1' of git://gitorious.org/linux-pwm/linux-pwm
[deliverable/linux.git] / arch / x86 / Kconfig.cpu
1 # Put here option for CPU selection and depending optimization
2 choice
3 prompt "Processor family"
4 default M686 if X86_32
5 default GENERIC_CPU if X86_64
6
7 config M386
8 bool "386"
9 depends on X86_32 && !UML
10 ---help---
11 This is the processor type of your CPU. This information is used for
12 optimizing purposes. In order to compile a kernel that can run on
13 all x86 CPU types (albeit not optimally fast), you can specify
14 "386" here.
15
16 The kernel will not necessarily run on earlier architectures than
17 the one you have chosen, e.g. a Pentium optimized kernel will run on
18 a PPro, but not necessarily on a i486.
19
20 Here are the settings recommended for greatest speed:
21 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
22 486DLC/DLC2, and UMC 486SX-S. Only "386" kernels will run on a 386
23 class machine.
24 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
25 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
26 - "586" for generic Pentium CPUs lacking the TSC
27 (time stamp counter) register.
28 - "Pentium-Classic" for the Intel Pentium.
29 - "Pentium-MMX" for the Intel Pentium MMX.
30 - "Pentium-Pro" for the Intel Pentium Pro.
31 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
32 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
33 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
34 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
35 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
36 - "Crusoe" for the Transmeta Crusoe series.
37 - "Efficeon" for the Transmeta Efficeon series.
38 - "Winchip-C6" for original IDT Winchip.
39 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
40 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
41 - "Geode GX/LX" For AMD Geode GX and LX processors.
42 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
43 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
44 - "VIA C7" for VIA C7.
45
46 If you don't know what to do, choose "386".
47
48 config M486
49 bool "486"
50 depends on X86_32
51 ---help---
52 Select this for a 486 series processor, either Intel or one of the
53 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
54 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
55 U5S.
56
57 config M586
58 bool "586/K5/5x86/6x86/6x86MX"
59 depends on X86_32
60 ---help---
61 Select this for an 586 or 686 series processor such as the AMD K5,
62 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
63 assume the RDTSC (Read Time Stamp Counter) instruction.
64
65 config M586TSC
66 bool "Pentium-Classic"
67 depends on X86_32
68 ---help---
69 Select this for a Pentium Classic processor with the RDTSC (Read
70 Time Stamp Counter) instruction for benchmarking.
71
72 config M586MMX
73 bool "Pentium-MMX"
74 depends on X86_32
75 ---help---
76 Select this for a Pentium with the MMX graphics/multimedia
77 extended instructions.
78
79 config M686
80 bool "Pentium-Pro"
81 depends on X86_32
82 ---help---
83 Select this for Intel Pentium Pro chips. This enables the use of
84 Pentium Pro extended instructions, and disables the init-time guard
85 against the f00f bug found in earlier Pentiums.
86
87 config MPENTIUMII
88 bool "Pentium-II/Celeron(pre-Coppermine)"
89 depends on X86_32
90 ---help---
91 Select this for Intel chips based on the Pentium-II and
92 pre-Coppermine Celeron core. This option enables an unaligned
93 copy optimization, compiles the kernel with optimization flags
94 tailored for the chip, and applies any applicable Pentium Pro
95 optimizations.
96
97 config MPENTIUMIII
98 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
99 depends on X86_32
100 ---help---
101 Select this for Intel chips based on the Pentium-III and
102 Celeron-Coppermine core. This option enables use of some
103 extended prefetch instructions in addition to the Pentium II
104 extensions.
105
106 config MPENTIUMM
107 bool "Pentium M"
108 depends on X86_32
109 ---help---
110 Select this for Intel Pentium M (not Pentium-4 M)
111 notebook chips.
112
113 config MPENTIUM4
114 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
115 depends on X86_32
116 ---help---
117 Select this for Intel Pentium 4 chips. This includes the
118 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
119 Pentium-4 M (not Pentium M) chips. This option enables compile
120 flags optimized for the chip, uses the correct cache line size, and
121 applies any applicable optimizations.
122
123 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
124
125 Select this for:
126 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
127 -Willamette
128 -Northwood
129 -Mobile Pentium 4
130 -Mobile Pentium 4 M
131 -Extreme Edition (Gallatin)
132 -Prescott
133 -Prescott 2M
134 -Cedar Mill
135 -Presler
136 -Smithfiled
137 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
138 -Foster
139 -Prestonia
140 -Gallatin
141 -Nocona
142 -Irwindale
143 -Cranford
144 -Potomac
145 -Paxville
146 -Dempsey
147
148
149 config MK6
150 bool "K6/K6-II/K6-III"
151 depends on X86_32
152 ---help---
153 Select this for an AMD K6-family processor. Enables use of
154 some extended instructions, and passes appropriate optimization
155 flags to GCC.
156
157 config MK7
158 bool "Athlon/Duron/K7"
159 depends on X86_32
160 ---help---
161 Select this for an AMD Athlon K7-family processor. Enables use of
162 some extended instructions, and passes appropriate optimization
163 flags to GCC.
164
165 config MK8
166 bool "Opteron/Athlon64/Hammer/K8"
167 ---help---
168 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
169 Enables use of some extended instructions, and passes appropriate
170 optimization flags to GCC.
171
172 config MCRUSOE
173 bool "Crusoe"
174 depends on X86_32
175 ---help---
176 Select this for a Transmeta Crusoe processor. Treats the processor
177 like a 586 with TSC, and sets some GCC optimization flags (like a
178 Pentium Pro with no alignment requirements).
179
180 config MEFFICEON
181 bool "Efficeon"
182 depends on X86_32
183 ---help---
184 Select this for a Transmeta Efficeon processor.
185
186 config MWINCHIPC6
187 bool "Winchip-C6"
188 depends on X86_32
189 ---help---
190 Select this for an IDT Winchip C6 chip. Linux and GCC
191 treat this chip as a 586TSC with some extended instructions
192 and alignment requirements.
193
194 config MWINCHIP3D
195 bool "Winchip-2/Winchip-2A/Winchip-3"
196 depends on X86_32
197 ---help---
198 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
199 treat this chip as a 586TSC with some extended instructions
200 and alignment requirements. Also enable out of order memory
201 stores for this CPU, which can increase performance of some
202 operations.
203
204 config MELAN
205 bool "AMD Elan"
206 depends on X86_32
207 ---help---
208 Select this for an AMD Elan processor.
209
210 Do not use this option for K6/Athlon/Opteron processors!
211
212 config MGEODEGX1
213 bool "GeodeGX1"
214 depends on X86_32
215 ---help---
216 Select this for a Geode GX1 (Cyrix MediaGX) chip.
217
218 config MGEODE_LX
219 bool "Geode GX/LX"
220 depends on X86_32
221 ---help---
222 Select this for AMD Geode GX and LX processors.
223
224 config MCYRIXIII
225 bool "CyrixIII/VIA-C3"
226 depends on X86_32
227 ---help---
228 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
229 treat this chip as a generic 586. Whilst the CPU is 686 class,
230 it lacks the cmov extension which gcc assumes is present when
231 generating 686 code.
232 Note that Nehemiah (Model 9) and above will not boot with this
233 kernel due to them lacking the 3DNow! instructions used in earlier
234 incarnations of the CPU.
235
236 config MVIAC3_2
237 bool "VIA C3-2 (Nehemiah)"
238 depends on X86_32
239 ---help---
240 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
241 of SSE and tells gcc to treat the CPU as a 686.
242 Note, this kernel will not boot on older (pre model 9) C3s.
243
244 config MVIAC7
245 bool "VIA C7"
246 depends on X86_32
247 ---help---
248 Select this for a VIA C7. Selecting this uses the correct cache
249 shift and tells gcc to treat the CPU as a 686.
250
251 config MPSC
252 bool "Intel P4 / older Netburst based Xeon"
253 depends on X86_64
254 ---help---
255 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
256 Xeon CPUs with Intel 64bit which is compatible with x86-64.
257 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
258 Netburst core and shouldn't use this option. You can distinguish them
259 using the cpu family field
260 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
261
262 config MCORE2
263 bool "Core 2/newer Xeon"
264 ---help---
265
266 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
267 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
268 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
269 (not a typo)
270
271 config MATOM
272 bool "Intel Atom"
273 ---help---
274
275 Select this for the Intel Atom platform. Intel Atom CPUs have an
276 in-order pipelining architecture and thus can benefit from
277 accordingly optimized code. Use a recent GCC with specific Atom
278 support in order to fully benefit from selecting this option.
279
280 config GENERIC_CPU
281 bool "Generic-x86-64"
282 depends on X86_64
283 ---help---
284 Generic x86-64 CPU.
285 Run equally well on all x86-64 CPUs.
286
287 endchoice
288
289 config X86_GENERIC
290 bool "Generic x86 support"
291 depends on X86_32
292 ---help---
293 Instead of just including optimizations for the selected
294 x86 variant (e.g. PII, Crusoe or Athlon), include some more
295 generic optimizations as well. This will make the kernel
296 perform better on x86 CPUs other than that selected.
297
298 This is really intended for distributors who need more
299 generic optimizations.
300
301 #
302 # Define implied options from the CPU selection here
303 config X86_INTERNODE_CACHE_SHIFT
304 int
305 default "12" if X86_VSMP
306 default X86_L1_CACHE_SHIFT
307
308 config X86_CMPXCHG
309 def_bool y
310 depends on X86_64 || (X86_32 && !M386)
311
312 config X86_L1_CACHE_SHIFT
313 int
314 default "7" if MPENTIUM4 || MPSC
315 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
316 default "4" if MELAN || M486 || M386 || MGEODEGX1
317 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
318
319 config X86_XADD
320 def_bool y
321 depends on !M386
322
323 config X86_PPRO_FENCE
324 bool "PentiumPro memory ordering errata workaround"
325 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
326 ---help---
327 Old PentiumPro multiprocessor systems had errata that could cause
328 memory operations to violate the x86 ordering standard in rare cases.
329 Enabling this option will attempt to work around some (but not all)
330 occurrences of this problem, at the cost of much heavier spinlock and
331 memory barrier operations.
332
333 If unsure, say n here. Even distro kernels should think twice before
334 enabling this: there are few systems, and an unlikely bug.
335
336 config X86_F00F_BUG
337 def_bool y
338 depends on M586MMX || M586TSC || M586 || M486 || M386
339
340 config X86_INVD_BUG
341 def_bool y
342 depends on M486 || M386
343
344 config X86_WP_WORKS_OK
345 def_bool y
346 depends on !M386
347
348 config X86_INVLPG
349 def_bool y
350 depends on X86_32 && !M386
351
352 config X86_BSWAP
353 def_bool y
354 depends on X86_32 && !M386
355
356 config X86_POPAD_OK
357 def_bool y
358 depends on X86_32 && !M386
359
360 config X86_ALIGNMENT_16
361 def_bool y
362 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
363
364 config X86_INTEL_USERCOPY
365 def_bool y
366 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
367
368 config X86_USE_PPRO_CHECKSUM
369 def_bool y
370 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
371
372 config X86_USE_3DNOW
373 def_bool y
374 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
375
376 config X86_OOSTORE
377 def_bool y
378 depends on (MWINCHIP3D || MWINCHIPC6) && MTRR
379
380 #
381 # P6_NOPs are a relatively minor optimization that require a family >=
382 # 6 processor, except that it is broken on certain VIA chips.
383 # Furthermore, AMD chips prefer a totally different sequence of NOPs
384 # (which work on all CPUs). In addition, it looks like Virtual PC
385 # does not understand them.
386 #
387 # As a result, disallow these if we're not compiling for X86_64 (these
388 # NOPs do work on all x86-64 capable chips); the list of processors in
389 # the right-hand clause are the cores that benefit from this optimization.
390 #
391 config X86_P6_NOP
392 def_bool y
393 depends on X86_64
394 depends on (MCORE2 || MPENTIUM4 || MPSC)
395
396 config X86_TSC
397 def_bool y
398 depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) && !X86_NUMAQ) || X86_64
399
400 config X86_CMPXCHG64
401 def_bool y
402 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
403
404 # this should be set for all -march=.. options where the compiler
405 # generates cmov.
406 config X86_CMOV
407 def_bool y
408 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
409
410 config X86_MINIMUM_CPU_FAMILY
411 int
412 default "64" if X86_64
413 default "6" if X86_32 && X86_P6_NOP
414 default "5" if X86_32 && X86_CMPXCHG64
415 default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK)
416 default "3"
417
418 config X86_DEBUGCTLMSR
419 def_bool y
420 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) && !UML
421
422 menuconfig PROCESSOR_SELECT
423 bool "Supported processor vendors" if EXPERT
424 ---help---
425 This lets you choose what x86 vendor support code your kernel
426 will include.
427
428 config CPU_SUP_INTEL
429 default y
430 bool "Support Intel processors" if PROCESSOR_SELECT
431 ---help---
432 This enables detection, tunings and quirks for Intel processors
433
434 You need this enabled if you want your kernel to run on an
435 Intel CPU. Disabling this option on other types of CPUs
436 makes the kernel a tiny bit smaller. Disabling it on an Intel
437 CPU might render the kernel unbootable.
438
439 If unsure, say N.
440
441 config CPU_SUP_CYRIX_32
442 default y
443 bool "Support Cyrix processors" if PROCESSOR_SELECT
444 depends on M386 || M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
445 ---help---
446 This enables detection, tunings and quirks for Cyrix processors
447
448 You need this enabled if you want your kernel to run on a
449 Cyrix CPU. Disabling this option on other types of CPUs
450 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
451 CPU might render the kernel unbootable.
452
453 If unsure, say N.
454
455 config CPU_SUP_AMD
456 default y
457 bool "Support AMD processors" if PROCESSOR_SELECT
458 ---help---
459 This enables detection, tunings and quirks for AMD processors
460
461 You need this enabled if you want your kernel to run on an
462 AMD CPU. Disabling this option on other types of CPUs
463 makes the kernel a tiny bit smaller. Disabling it on an AMD
464 CPU might render the kernel unbootable.
465
466 If unsure, say N.
467
468 config CPU_SUP_CENTAUR
469 default y
470 bool "Support Centaur processors" if PROCESSOR_SELECT
471 ---help---
472 This enables detection, tunings and quirks for Centaur processors
473
474 You need this enabled if you want your kernel to run on a
475 Centaur CPU. Disabling this option on other types of CPUs
476 makes the kernel a tiny bit smaller. Disabling it on a Centaur
477 CPU might render the kernel unbootable.
478
479 If unsure, say N.
480
481 config CPU_SUP_TRANSMETA_32
482 default y
483 bool "Support Transmeta processors" if PROCESSOR_SELECT
484 depends on !64BIT
485 ---help---
486 This enables detection, tunings and quirks for Transmeta processors
487
488 You need this enabled if you want your kernel to run on a
489 Transmeta CPU. Disabling this option on other types of CPUs
490 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
491 CPU might render the kernel unbootable.
492
493 If unsure, say N.
494
495 config CPU_SUP_UMC_32
496 default y
497 bool "Support UMC processors" if PROCESSOR_SELECT
498 depends on M386 || M486 || (EXPERT && !64BIT)
499 ---help---
500 This enables detection, tunings and quirks for UMC processors
501
502 You need this enabled if you want your kernel to run on a
503 UMC CPU. Disabling this option on other types of CPUs
504 makes the kernel a tiny bit smaller. Disabling it on a UMC
505 CPU might render the kernel unbootable.
506
507 If unsure, say N.
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