1 /* -*- linux-c -*- ------------------------------------------------------- *
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 * Copyright 2007 rPath, Inc. - All Rights Reserved
6 * This file is part of the Linux kernel, and is made available under
7 * the terms of the GNU General Public License version 2.
9 * ----------------------------------------------------------------------- */
12 * Check for obligatory CPU features and abort if the features are not
13 * present. This code should be compilable as 16-, 32- or 64-bit
14 * code, so be very careful with types and inline assembly.
16 * This code should not contain any messages; that requires an
19 * As written, this code is not safe for inclusion into the kernel
20 * proper (after FPU initialization, in particular).
26 #include <linux/types.h>
27 #include <asm/processor-flags.h>
28 #include <asm/required-features.h>
29 #include <asm/msr-index.h>
31 static u32 err_flags
[NCAPINTS
];
33 static const int req_level
= CONFIG_X86_MINIMUM_CPU_FAMILY
;
35 static const u32 req_flags
[NCAPINTS
] =
39 0, /* REQUIRED_MASK2 not implemented in this file */
40 0, /* REQUIRED_MASK3 not implemented in this file */
42 0, /* REQUIRED_MASK5 not implemented in this file */
44 0, /* REQUIRED_MASK7 not implemented in this file */
47 #define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a))
49 static int is_amd(void)
51 return cpu_vendor
[0] == A32('A', 'u', 't', 'h') &&
52 cpu_vendor
[1] == A32('e', 'n', 't', 'i') &&
53 cpu_vendor
[2] == A32('c', 'A', 'M', 'D');
56 static int is_centaur(void)
58 return cpu_vendor
[0] == A32('C', 'e', 'n', 't') &&
59 cpu_vendor
[1] == A32('a', 'u', 'r', 'H') &&
60 cpu_vendor
[2] == A32('a', 'u', 'l', 's');
63 static int is_transmeta(void)
65 return cpu_vendor
[0] == A32('G', 'e', 'n', 'u') &&
66 cpu_vendor
[1] == A32('i', 'n', 'e', 'T') &&
67 cpu_vendor
[2] == A32('M', 'x', '8', '6');
70 /* Returns a bitmask of which words we have error bits in */
71 static int check_cpuflags(void)
77 for (i
= 0; i
< NCAPINTS
; i
++) {
78 err_flags
[i
] = req_flags
[i
] & ~cpu
.flags
[i
];
87 * Returns -1 on error.
89 * *cpu_level is set to the current CPU level; *req_level to the required
90 * level. x86-64 is considered level 64 for this purpose.
92 * *err_flags_ptr is set to the flags error array if there are flags missing.
94 int check_cpu(int *cpu_level_ptr
, int *req_level_ptr
, u32
**err_flags_ptr
)
98 memset(&cpu
.flags
, 0, sizeof cpu
.flags
);
101 if (has_eflag(X86_EFLAGS_AC
))
105 err
= check_cpuflags();
107 if (test_bit(X86_FEATURE_LM
, cpu
.flags
))
112 ~((1 << X86_FEATURE_XMM
)|(1 << X86_FEATURE_XMM2
))) &&
114 /* If this is an AMD and we're only missing SSE+SSE2, try to
117 u32 ecx
= MSR_K7_HWCR
;
120 asm("rdmsr" : "=a" (eax
), "=d" (edx
) : "c" (ecx
));
122 asm("wrmsr" : : "a" (eax
), "d" (edx
), "c" (ecx
));
124 get_cpuflags(); /* Make sure it really did something */
125 err
= check_cpuflags();
126 } else if (err
== 0x01 &&
127 !(err_flags
[0] & ~(1 << X86_FEATURE_CX8
)) &&
128 is_centaur() && cpu
.model
>= 6) {
129 /* If this is a VIA C3, we might have to enable CX8
132 u32 ecx
= MSR_VIA_FCR
;
135 asm("rdmsr" : "=a" (eax
), "=d" (edx
) : "c" (ecx
));
136 eax
|= (1<<1)|(1<<7);
137 asm("wrmsr" : : "a" (eax
), "d" (edx
), "c" (ecx
));
139 set_bit(X86_FEATURE_CX8
, cpu
.flags
);
140 err
= check_cpuflags();
141 } else if (err
== 0x01 && is_transmeta()) {
142 /* Transmeta might have masked feature bits in word 0 */
144 u32 ecx
= 0x80860004;
148 asm("rdmsr" : "=a" (eax
), "=d" (edx
) : "c" (ecx
));
149 asm("wrmsr" : : "a" (~0), "d" (edx
), "c" (ecx
));
151 : "+a" (level
), "=d" (cpu
.flags
[0])
153 asm("wrmsr" : : "a" (eax
), "d" (edx
), "c" (ecx
));
155 err
= check_cpuflags();
159 *err_flags_ptr
= err
? err_flags
: NULL
;
161 *cpu_level_ptr
= cpu
.level
;
163 *req_level_ptr
= req_level
;
165 return (cpu
.level
< req_level
|| err
) ? -1 : 0;