arch/x86/boot/cpucheck.c

   1 /* -*- linux-c -*- ------------------------------------------------------- *
   2  *
   3  *   Copyright (C) 1991, 1992 Linus Torvalds
   4  *   Copyright 2007 rPath, Inc. - All Rights Reserved
   5  *
   6  *   This file is part of the Linux kernel, and is made available under
   7  *   the terms of the GNU General Public License version 2.
   8  *
   9  * ----------------------------------------------------------------------- */
  10
  11 /*
  12  * Check for obligatory CPU features and abort if the features are not
  13  * present.  This code should be compilable as 16-, 32- or 64-bit
  14  * code, so be very careful with types and inline assembly.
  15  *
  16  * This code should not contain any messages; that requires an
  17  * additional wrapper.
  18  *
  19  * As written, this code is not safe for inclusion into the kernel
  20  * proper (after FPU initialization, in particular).
  21  */
  22
  23 #ifdef _SETUP
  24 # include "boot.h"
  25 #endif
  26 #include <linux/types.h>
  27 #include <asm/processor-flags.h>
  28 #include <asm/required-features.h>
  29 #include <asm/msr-index.h>
  30
  31 static u32 err_flags[NCAPINTS];
  32
  33 static const int req_level = CONFIG_X86_MINIMUM_CPU_FAMILY;
  34
  35 static const u32 req_flags[NCAPINTS] =
  36 {
  37         REQUIRED_MASK0,
  38         REQUIRED_MASK1,
  39         0, /* REQUIRED_MASK2 not implemented in this file */
  40         0, /* REQUIRED_MASK3 not implemented in this file */
  41         REQUIRED_MASK4,
  42         0, /* REQUIRED_MASK5 not implemented in this file */
  43         REQUIRED_MASK6,
  44         0, /* REQUIRED_MASK7 not implemented in this file */
  45 };
  46
  47 #define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a))
  48
  49 static int is_amd(void)
  50 {
  51         return cpu_vendor[0] == A32('A', 'u', 't', 'h') &&
  52                cpu_vendor[1] == A32('e', 'n', 't', 'i') &&
  53                cpu_vendor[2] == A32('c', 'A', 'M', 'D');
  54 }
  55
  56 static int is_centaur(void)
  57 {
  58         return cpu_vendor[0] == A32('C', 'e', 'n', 't') &&
  59                cpu_vendor[1] == A32('a', 'u', 'r', 'H') &&
  60                cpu_vendor[2] == A32('a', 'u', 'l', 's');
  61 }
  62
  63 static int is_transmeta(void)
  64 {
  65         return cpu_vendor[0] == A32('G', 'e', 'n', 'u') &&
  66                cpu_vendor[1] == A32('i', 'n', 'e', 'T') &&
  67                cpu_vendor[2] == A32('M', 'x', '8', '6');
  68 }
  69
  70 static int is_intel(void)
  71 {
  72         return cpu_vendor[0] == A32('G', 'e', 'n', 'u') &&
  73                cpu_vendor[1] == A32('i', 'n', 'e', 'I') &&
  74                cpu_vendor[2] == A32('n', 't', 'e', 'l');
  75 }
  76
  77 /* Returns a bitmask of which words we have error bits in */
  78 static int check_cpuflags(void)
  79 {
  80         u32 err;
  81         int i;
  82
  83         err = 0;
  84         for (i = 0; i < NCAPINTS; i++) {
  85                 err_flags[i] = req_flags[i] & ~cpu.flags[i];
  86                 if (err_flags[i])
  87                         err |= 1 << i;
  88         }
  89
  90         return err;
  91 }
  92
  93 /*
  94  * Returns -1 on error.
  95  *
  96  * *cpu_level is set to the current CPU level; *req_level to the required
  97  * level.  x86-64 is considered level 64 for this purpose.
  98  *
  99  * *err_flags_ptr is set to the flags error array if there are flags missing.
 100  */
 101 int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr)
 102 {
 103         int err;
 104
 105         memset(&cpu.flags, 0, sizeof cpu.flags);
 106         cpu.level = 3;
 107
 108         if (has_eflag(X86_EFLAGS_AC))
 109                 cpu.level = 4;
 110
 111         get_cpuflags();
 112         err = check_cpuflags();
 113
 114         if (test_bit(X86_FEATURE_LM, cpu.flags))
 115                 cpu.level = 64;
 116
 117         if (err == 0x01 &&
 118             !(err_flags[0] &
 119               ~((1 << X86_FEATURE_XMM)|(1 << X86_FEATURE_XMM2))) &&
 120             is_amd()) {
 121                 /* If this is an AMD and we're only missing SSE+SSE2, try to
 122                    turn them on */
 123
 124                 u32 ecx = MSR_K7_HWCR;
 125                 u32 eax, edx;
 126
 127                 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx));
 128                 eax &= ~(1 << 15);
 129                 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx));
 130
 131                 get_cpuflags(); /* Make sure it really did something */
 132                 err = check_cpuflags();
 133         } else if (err == 0x01 &&
 134                    !(err_flags[0] & ~(1 << X86_FEATURE_CX8)) &&
 135                    is_centaur() && cpu.model >= 6) {
 136                 /* If this is a VIA C3, we might have to enable CX8
 137                    explicitly */
 138
 139                 u32 ecx = MSR_VIA_FCR;
 140                 u32 eax, edx;
 141
 142                 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx));
 143                 eax |= (1<<1)|(1<<7);
 144                 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx));
 145
 146                 set_bit(X86_FEATURE_CX8, cpu.flags);
 147                 err = check_cpuflags();
 148         } else if (err == 0x01 && is_transmeta()) {
 149                 /* Transmeta might have masked feature bits in word 0 */
 150
 151                 u32 ecx = 0x80860004;
 152                 u32 eax, edx;
 153                 u32 level = 1;
 154
 155                 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx));
 156                 asm("wrmsr" : : "a" (~0), "d" (edx), "c" (ecx));
 157                 asm("cpuid"
 158                     : "+a" (level), "=d" (cpu.flags[0])
 159                     : : "ecx", "ebx");
 160                 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx));
 161
 162                 err = check_cpuflags();
 163         } else if (err == 0x01 &&
 164                    !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) &&
 165                    is_intel() && cpu.level == 6 &&
 166                    (cpu.model == 9 || cpu.model == 13)) {
 167                 /* PAE is disabled on this Pentium M but can be forced */
 168                 if (cmdline_find_option_bool("forcepae")) {
 169                         puts("WARNING: Forcing PAE in CPU flags\n");
 170                         set_bit(X86_FEATURE_PAE, cpu.flags);
 171                         err = check_cpuflags();
 172                 }
 173                 else {
 174                         puts("WARNING: PAE disabled. Use parameter 'forcepae' to enable at your own risk!\n");
 175                 }
 176         }
 177
 178         if (err_flags_ptr)
 179                 *err_flags_ptr = err ? err_flags : NULL;
 180         if (cpu_level_ptr)
 181                 *cpu_level_ptr = cpu.level;
 182         if (req_level_ptr)
 183                 *req_level_ptr = req_level;
 184
 185         return (cpu.level < req_level || err) ? -1 : 0;
 186 }