arch/x86/boot/cpucheck.c

   1 /* -*- linux-c -*- ------------------------------------------------------- *
   2  *
   3  *   Copyright (C) 1991, 1992 Linus Torvalds
   4  *   Copyright 2007 rPath, Inc. - All Rights Reserved
   5  *
   6  *   This file is part of the Linux kernel, and is made available under
   7  *   the terms of the GNU General Public License version 2.
   8  *
   9  * ----------------------------------------------------------------------- */
  10
  11 /*
  12  * Check for obligatory CPU features and abort if the features are not
  13  * present.  This code should be compilable as 16-, 32- or 64-bit
  14  * code, so be very careful with types and inline assembly.
  15  *
  16  * This code should not contain any messages; that requires an
  17  * additional wrapper.
  18  *
  19  * As written, this code is not safe for inclusion into the kernel
  20  * proper (after FPU initialization, in particular).
  21  */
  22
  23 #ifdef _SETUP
  24 # include "boot.h"
  25 #endif
  26 #include <linux/types.h>
  27 #include <asm/processor-flags.h>
  28 #include <asm/required-features.h>
  29 #include <asm/msr-index.h>
  30 #include "string.h"
  31
  32 static u32 err_flags[NCAPINTS];
  33
  34 static const int req_level = CONFIG_X86_MINIMUM_CPU_FAMILY;
  35
  36 static const u32 req_flags[NCAPINTS] =
  37 {
  38         REQUIRED_MASK0,
  39         REQUIRED_MASK1,
  40         0, /* REQUIRED_MASK2 not implemented in this file */
  41         0, /* REQUIRED_MASK3 not implemented in this file */
  42         REQUIRED_MASK4,
  43         0, /* REQUIRED_MASK5 not implemented in this file */
  44         REQUIRED_MASK6,
  45         0, /* REQUIRED_MASK7 not implemented in this file */
  46 };
  47
  48 #define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a))
  49
  50 static int is_amd(void)
  51 {
  52         return cpu_vendor[0] == A32('A', 'u', 't', 'h') &&
  53                cpu_vendor[1] == A32('e', 'n', 't', 'i') &&
  54                cpu_vendor[2] == A32('c', 'A', 'M', 'D');
  55 }
  56
  57 static int is_centaur(void)
  58 {
  59         return cpu_vendor[0] == A32('C', 'e', 'n', 't') &&
  60                cpu_vendor[1] == A32('a', 'u', 'r', 'H') &&
  61                cpu_vendor[2] == A32('a', 'u', 'l', 's');
  62 }
  63
  64 static int is_transmeta(void)
  65 {
  66         return cpu_vendor[0] == A32('G', 'e', 'n', 'u') &&
  67                cpu_vendor[1] == A32('i', 'n', 'e', 'T') &&
  68                cpu_vendor[2] == A32('M', 'x', '8', '6');
  69 }
  70
  71 static int is_intel(void)
  72 {
  73         return cpu_vendor[0] == A32('G', 'e', 'n', 'u') &&
  74                cpu_vendor[1] == A32('i', 'n', 'e', 'I') &&
  75                cpu_vendor[2] == A32('n', 't', 'e', 'l');
  76 }
  77
  78 /* Returns a bitmask of which words we have error bits in */
  79 static int check_cpuflags(void)
  80 {
  81         u32 err;
  82         int i;
  83
  84         err = 0;
  85         for (i = 0; i < NCAPINTS; i++) {
  86                 err_flags[i] = req_flags[i] & ~cpu.flags[i];
  87                 if (err_flags[i])
  88                         err |= 1 << i;
  89         }
  90
  91         return err;
  92 }
  93
  94 /*
  95  * Returns -1 on error.
  96  *
  97  * *cpu_level is set to the current CPU level; *req_level to the required
  98  * level.  x86-64 is considered level 64 for this purpose.
  99  *
 100  * *err_flags_ptr is set to the flags error array if there are flags missing.
 101  */
 102 int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr)
 103 {
 104         int err;
 105
 106         memset(&cpu.flags, 0, sizeof cpu.flags);
 107         cpu.level = 3;
 108
 109         if (has_eflag(X86_EFLAGS_AC))
 110                 cpu.level = 4;
 111
 112         get_cpuflags();
 113         err = check_cpuflags();
 114
 115         if (test_bit(X86_FEATURE_LM, cpu.flags))
 116                 cpu.level = 64;
 117
 118         if (err == 0x01 &&
 119             !(err_flags[0] &
 120               ~((1 << X86_FEATURE_XMM)|(1 << X86_FEATURE_XMM2))) &&
 121             is_amd()) {
 122                 /* If this is an AMD and we're only missing SSE+SSE2, try to
 123                    turn them on */
 124
 125                 u32 ecx = MSR_K7_HWCR;
 126                 u32 eax, edx;
 127
 128                 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx));
 129                 eax &= ~(1 << 15);
 130                 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx));
 131
 132                 get_cpuflags(); /* Make sure it really did something */
 133                 err = check_cpuflags();
 134         } else if (err == 0x01 &&
 135                    !(err_flags[0] & ~(1 << X86_FEATURE_CX8)) &&
 136                    is_centaur() && cpu.model >= 6) {
 137                 /* If this is a VIA C3, we might have to enable CX8
 138                    explicitly */
 139
 140                 u32 ecx = MSR_VIA_FCR;
 141                 u32 eax, edx;
 142
 143                 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx));
 144                 eax |= (1<<1)|(1<<7);
 145                 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx));
 146
 147                 set_bit(X86_FEATURE_CX8, cpu.flags);
 148                 err = check_cpuflags();
 149         } else if (err == 0x01 && is_transmeta()) {
 150                 /* Transmeta might have masked feature bits in word 0 */
 151
 152                 u32 ecx = 0x80860004;
 153                 u32 eax, edx;
 154                 u32 level = 1;
 155
 156                 asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx));
 157                 asm("wrmsr" : : "a" (~0), "d" (edx), "c" (ecx));
 158                 asm("cpuid"
 159                     : "+a" (level), "=d" (cpu.flags[0])
 160                     : : "ecx", "ebx");
 161                 asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx));
 162
 163                 err = check_cpuflags();
 164         } else if (err == 0x01 &&
 165                    !(err_flags[0] & ~(1 << X86_FEATURE_PAE)) &&
 166                    is_intel() && cpu.level == 6 &&
 167                    (cpu.model == 9 || cpu.model == 13)) {
 168                 /* PAE is disabled on this Pentium M but can be forced */
 169                 if (cmdline_find_option_bool("forcepae")) {
 170                         puts("WARNING: Forcing PAE in CPU flags\n");
 171                         set_bit(X86_FEATURE_PAE, cpu.flags);
 172                         err = check_cpuflags();
 173                 }
 174                 else {
 175                         puts("WARNING: PAE disabled. Use parameter 'forcepae' to enable at your own risk!\n");
 176                 }
 177         }
 178
 179         if (err_flags_ptr)
 180                 *err_flags_ptr = err ? err_flags : NULL;
 181         if (cpu_level_ptr)
 182                 *cpu_level_ptr = cpu.level;
 183         if (req_level_ptr)
 184                 *req_level_ptr = req_level;
 185
 186         return (cpu.level < req_level || err) ? -1 : 0;
 187 }