2 * Copyright (C) 1991,1992 Linus Torvalds
4 * entry_32.S contains the system-call and low-level fault and trap handling routines.
6 * Stack layout while running C code:
7 * ptrace needs to have all registers on the stack.
8 * If the order here is changed, it needs to be
9 * updated in fork.c:copy_process(), signal.c:do_signal(),
10 * ptrace.c and ptrace.h
22 * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS
31 #include <linux/linkage.h>
32 #include <linux/err.h>
33 #include <asm/thread_info.h>
34 #include <asm/irqflags.h>
35 #include <asm/errno.h>
36 #include <asm/segment.h>
38 #include <asm/page_types.h>
39 #include <asm/percpu.h>
40 #include <asm/processor-flags.h>
41 #include <asm/ftrace.h>
42 #include <asm/irq_vectors.h>
43 #include <asm/cpufeatures.h>
44 #include <asm/alternative-asm.h>
48 .section .entry.text, "ax"
51 * We use macros for low-level operations which need to be overridden
52 * for paravirtualization. The following will never clobber any registers:
53 * INTERRUPT_RETURN (aka. "iret")
54 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
55 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
57 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
58 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
59 * Allowing a register to be clobbered can shrink the paravirt replacement
60 * enough to patch inline, increasing performance.
64 # define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF
66 # define preempt_stop(clobbers)
67 # define resume_kernel restore_all
70 .macro TRACE_IRQS_IRET
71 #ifdef CONFIG_TRACE_IRQFLAGS
72 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off?
80 * User gs save/restore
82 * %gs is used for userland TLS and kernel only uses it for stack
83 * canary which is required to be at %gs:20 by gcc. Read the comment
84 * at the top of stackprotector.h for more info.
86 * Local labels 98 and 99 are used.
88 #ifdef CONFIG_X86_32_LAZY_GS
90 /* unfortunately push/pop can't be no-op */
95 addl $(4 + \pop), %esp
100 /* all the rest are no-op */
107 .macro REG_TO_PTGS reg
109 .macro SET_KERNEL_GS reg
112 #else /* CONFIG_X86_32_LAZY_GS */
125 .pushsection .fixup, "ax"
129 _ASM_EXTABLE(98b, 99b)
133 98: mov PT_GS(%esp), %gs
136 .pushsection .fixup, "ax"
137 99: movl $0, PT_GS(%esp)
140 _ASM_EXTABLE(98b, 99b)
146 .macro REG_TO_PTGS reg
147 movl \reg, PT_GS(%esp)
149 .macro SET_KERNEL_GS reg
150 movl $(__KERNEL_STACK_CANARY), \reg
154 #endif /* CONFIG_X86_32_LAZY_GS */
156 .macro SAVE_ALL pt_regs_ax=%eax
169 movl $(__USER_DS), %edx
172 movl $(__KERNEL_PERCPU), %edx
177 .macro RESTORE_INT_REGS
187 .macro RESTORE_REGS pop=0
193 .pushsection .fixup, "ax"
212 /* When we fork, we trace the syscall return in the child, too. */
214 call syscall_return_slowpath
218 ENTRY(ret_from_kernel_thread)
222 movl PT_EBP(%esp), %eax
224 movl $0, PT_EAX(%esp)
227 * Kernel threads return to userspace as if returning from a syscall.
228 * We should check whether anything actually uses this path and, if so,
229 * consider switching it over to ret_from_fork.
232 call syscall_return_slowpath
234 ENDPROC(ret_from_kernel_thread)
237 * Return to user mode is not as complex as all this looks,
238 * but we want the default path for a system call return to
239 * go as quickly as possible which is why some of this is
240 * less clear than it otherwise should be.
243 # userspace resumption stub bypassing syscall exit tracing
246 preempt_stop(CLBR_ANY)
249 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS
250 movb PT_CS(%esp), %al
251 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax
254 * We can be coming here from child spawned by kernel_thread().
256 movl PT_CS(%esp), %eax
257 andl $SEGMENT_RPL_MASK, %eax
260 jb resume_kernel # not returning to v8086 or userspace
262 ENTRY(resume_userspace)
263 DISABLE_INTERRUPTS(CLBR_ANY)
266 call prepare_exit_to_usermode
268 END(ret_from_exception)
270 #ifdef CONFIG_PREEMPT
272 DISABLE_INTERRUPTS(CLBR_ANY)
274 cmpl $0, PER_CPU_VAR(__preempt_count)
276 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ?
278 call preempt_schedule_irq
283 GLOBAL(__begin_SYSENTER_singlestep_region)
285 * All code from here through __end_SYSENTER_singlestep_region is subject
286 * to being single-stepped if a user program sets TF and executes SYSENTER.
287 * There is absolutely nothing that we can do to prevent this from happening
288 * (thanks Intel!). To keep our handling of this situation as simple as
289 * possible, we handle TF just like AC and NT, except that our #DB handler
290 * will ignore all of the single-step traps generated in this range.
295 * Xen doesn't set %esp to be precisely what the normal SYSENTER
296 * entry point expects, so fix it up before using the normal path.
298 ENTRY(xen_sysenter_target)
299 addl $5*4, %esp /* remove xen-provided frame */
300 jmp sysenter_past_esp
304 * 32-bit SYSENTER entry.
306 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
307 * if X86_FEATURE_SEP is available. This is the preferred system call
308 * entry on 32-bit systems.
310 * The SYSENTER instruction, in principle, should *only* occur in the
311 * vDSO. In practice, a small number of Android devices were shipped
312 * with a copy of Bionic that inlined a SYSENTER instruction. This
313 * never happened in any of Google's Bionic versions -- it only happened
314 * in a narrow range of Intel-provided versions.
316 * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs.
317 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
318 * SYSENTER does not save anything on the stack,
319 * and does not save old EIP (!!!), ESP, or EFLAGS.
321 * To avoid losing track of EFLAGS.VM (and thus potentially corrupting
322 * user and/or vm86 state), we explicitly disable the SYSENTER
323 * instruction in vm86 mode by reprogramming the MSRs.
326 * eax system call number
335 ENTRY(entry_SYSENTER_32)
336 movl TSS_sysenter_sp0(%esp), %esp
338 pushl $__USER_DS /* pt_regs->ss */
339 pushl %ebp /* pt_regs->sp (stashed in bp) */
340 pushfl /* pt_regs->flags (except IF = 0) */
341 orl $X86_EFLAGS_IF, (%esp) /* Fix IF */
342 pushl $__USER_CS /* pt_regs->cs */
343 pushl $0 /* pt_regs->ip = 0 (placeholder) */
344 pushl %eax /* pt_regs->orig_ax */
345 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */
348 * SYSENTER doesn't filter flags, so we need to clear NT, AC
349 * and TF ourselves. To save a few cycles, we can check whether
350 * either was set instead of doing an unconditional popfq.
351 * This needs to happen before enabling interrupts so that
352 * we don't get preempted with NT set.
354 * If TF is set, we will single-step all the way to here -- do_debug
355 * will ignore all the traps. (Yes, this is slow, but so is
356 * single-stepping in general. This allows us to avoid having
357 * a more complicated code to handle the case where a user program
358 * forces us to single-step through the SYSENTER entry code.)
360 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
361 * out-of-line as an optimization: NT is unlikely to be set in the
362 * majority of the cases and instead of polluting the I$ unnecessarily,
363 * we're keeping that code behind a branch which will predict as
364 * not-taken and therefore its instructions won't be fetched.
366 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp)
367 jnz .Lsysenter_fix_flags
368 .Lsysenter_flags_fixed:
371 * User mode is traced as though IRQs are on, and SYSENTER
377 call do_fast_syscall_32
378 /* XEN PV guests always use IRET path */
379 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
380 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
382 /* Opportunistic SYSEXIT */
383 TRACE_IRQS_ON /* User mode traces as IRQs on. */
384 movl PT_EIP(%esp), %edx /* pt_regs->ip */
385 movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */
386 1: mov PT_FS(%esp), %fs
388 popl %ebx /* pt_regs->bx */
389 addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */
390 popl %esi /* pt_regs->si */
391 popl %edi /* pt_regs->di */
392 popl %ebp /* pt_regs->bp */
393 popl %eax /* pt_regs->ax */
396 * Restore all flags except IF. (We restore IF separately because
397 * STI gives a one-instruction window in which we won't be interrupted,
398 * whereas POPF does not.)
400 addl $PT_EFLAGS-PT_DS, %esp /* point esp at pt_regs->flags */
401 btr $X86_EFLAGS_IF_BIT, (%esp)
405 * Return back to the vDSO, which will pop ecx and edx.
406 * Don't bother with DS and ES (they already contain __USER_DS).
411 .pushsection .fixup, "ax"
412 2: movl $0, PT_FS(%esp)
418 .Lsysenter_fix_flags:
419 pushl $X86_EFLAGS_FIXED
421 jmp .Lsysenter_flags_fixed
422 GLOBAL(__end_SYSENTER_singlestep_region)
423 ENDPROC(entry_SYSENTER_32)
426 * 32-bit legacy system call entry.
428 * 32-bit x86 Linux system calls traditionally used the INT $0x80
429 * instruction. INT $0x80 lands here.
431 * This entry point can be used by any 32-bit perform system calls.
432 * Instances of INT $0x80 can be found inline in various programs and
433 * libraries. It is also used by the vDSO's __kernel_vsyscall
434 * fallback for hardware that doesn't support a faster entry method.
435 * Restarted 32-bit system calls also fall back to INT $0x80
436 * regardless of what instruction was originally used to do the system
437 * call. (64-bit programs can use INT $0x80 as well, but they can
438 * only run on 64-bit kernels and therefore land in
439 * entry_INT80_compat.)
441 * This is considered a slow path. It is not used by most libc
442 * implementations on modern hardware except during process startup.
445 * eax system call number
453 ENTRY(entry_INT80_32)
455 pushl %eax /* pt_regs->orig_ax */
456 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */
459 * User mode is traced as though IRQs are on, and the interrupt gate
465 call do_int80_syscall_32
471 #ifdef CONFIG_X86_ESPFIX32
472 ALTERNATIVE "jmp restore_nocheck", "", X86_BUG_ESPFIX
474 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
476 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we
477 * are returning to the kernel.
478 * See comments in process.c:copy_thread() for details.
480 movb PT_OLDSS(%esp), %ah
481 movb PT_CS(%esp), %al
482 andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
483 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax
484 je ldt_ss # returning to user-space with LDT SS
487 RESTORE_REGS 4 # skip orig_eax/error_code
490 .section .fixup, "ax"
492 pushl $0 # no error code
496 _ASM_EXTABLE(irq_return, iret_exc)
498 #ifdef CONFIG_X86_ESPFIX32
501 * Setup and switch to ESPFIX stack
503 * We're returning to userspace with a 16 bit stack. The CPU will not
504 * restore the high word of ESP for us on executing iret... This is an
505 * "official" bug of all the x86-compatible CPUs, which we can work
506 * around to make dosemu and wine happy. We do this by preloading the
507 * high word of ESP with the high word of the userspace ESP while
508 * compensating for the offset by changing to the ESPFIX segment with
509 * a base address that matches for the difference.
511 #define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8)
512 mov %esp, %edx /* load kernel esp */
513 mov PT_OLDESP(%esp), %eax /* load userspace esp */
514 mov %dx, %ax /* eax: new kernel esp */
515 sub %eax, %edx /* offset (low word is 0) */
517 mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */
518 mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */
520 pushl %eax /* new kernel esp */
522 * Disable interrupts, but do not irqtrace this section: we
523 * will soon execute iret and the tracer was already set to
524 * the irqstate after the IRET:
526 DISABLE_INTERRUPTS(CLBR_EAX)
527 lss (%esp), %esp /* switch to espfix segment */
530 ENDPROC(entry_INT80_32)
532 .macro FIXUP_ESPFIX_STACK
534 * Switch back for ESPFIX stack to the normal zerobased stack
536 * We can't call C functions using the ESPFIX stack. This code reads
537 * the high word of the segment base from the GDT and swiches to the
538 * normal stack and adjusts ESP with the matching offset.
540 #ifdef CONFIG_X86_ESPFIX32
541 /* fixup the stack */
542 mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */
543 mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */
545 addl %esp, %eax /* the adjusted stack pointer */
548 lss (%esp), %esp /* switch to the normal stack segment */
551 .macro UNWIND_ESPFIX_STACK
552 #ifdef CONFIG_X86_ESPFIX32
554 /* see if on espfix stack */
555 cmpw $__ESPFIX_SS, %ax
557 movl $__KERNEL_DS, %eax
560 /* switch to normal stack */
567 * Build the entry stubs with some assembler magic.
568 * We pack 1 stub into every 8-byte block.
571 ENTRY(irq_entries_start)
572 vector=FIRST_EXTERNAL_VECTOR
573 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
574 pushl $(~vector+0x80) /* Note: always in signed byte range */
579 END(irq_entries_start)
582 * the CPU automatically disables interrupts when executing an IRQ vector,
583 * so IRQ-flags tracing has to follow that:
585 .p2align CONFIG_X86_L1_CACHE_SHIFT
588 addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */
594 ENDPROC(common_interrupt)
596 #define BUILD_INTERRUPT3(name, nr, fn) \
608 #ifdef CONFIG_TRACING
609 # define TRACE_BUILD_INTERRUPT(name, nr) BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name)
611 # define TRACE_BUILD_INTERRUPT(name, nr)
614 #define BUILD_INTERRUPT(name, nr) \
615 BUILD_INTERRUPT3(name, nr, smp_##name); \
616 TRACE_BUILD_INTERRUPT(name, nr)
618 /* The include is where all of the SMP etc. interrupts come from */
619 #include <asm/entry_arch.h>
621 ENTRY(coprocessor_error)
624 pushl $do_coprocessor_error
626 END(coprocessor_error)
628 ENTRY(simd_coprocessor_error)
631 #ifdef CONFIG_X86_INVD_BUG
632 /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
633 ALTERNATIVE "pushl $do_general_protection", \
634 "pushl $do_simd_coprocessor_error", \
637 pushl $do_simd_coprocessor_error
640 END(simd_coprocessor_error)
642 ENTRY(device_not_available)
644 pushl $-1 # mark this as an int
645 pushl $do_device_not_available
647 END(device_not_available)
649 #ifdef CONFIG_PARAVIRT
652 _ASM_EXTABLE(native_iret, iret_exc)
677 ENTRY(coprocessor_segment_overrun)
680 pushl $do_coprocessor_segment_overrun
682 END(coprocessor_segment_overrun)
686 pushl $do_invalid_TSS
690 ENTRY(segment_not_present)
692 pushl $do_segment_not_present
694 END(segment_not_present)
698 pushl $do_stack_segment
702 ENTRY(alignment_check)
704 pushl $do_alignment_check
710 pushl $0 # no error code
711 pushl $do_divide_error
715 #ifdef CONFIG_X86_MCE
719 pushl machine_check_vector
724 ENTRY(spurious_interrupt_bug)
727 pushl $do_spurious_interrupt_bug
729 END(spurious_interrupt_bug)
732 ENTRY(xen_hypervisor_callback)
733 pushl $-1 /* orig_ax = -1 => not a system call */
738 * Check to see if we got the event in the critical
739 * region in xen_iret_direct, after we've reenabled
740 * events and checked for pending events. This simulates
741 * iret instruction's behaviour where it delivers a
742 * pending interrupt when enabling interrupts:
744 movl PT_EIP(%esp), %eax
745 cmpl $xen_iret_start_crit, %eax
747 cmpl $xen_iret_end_crit, %eax
750 jmp xen_iret_crit_fixup
754 call xen_evtchn_do_upcall
755 #ifndef CONFIG_PREEMPT
756 call xen_maybe_preempt_hcall
759 ENDPROC(xen_hypervisor_callback)
762 * Hypervisor uses this for application faults while it executes.
763 * We get here for two reasons:
764 * 1. Fault while reloading DS, ES, FS or GS
765 * 2. Fault while executing IRET
766 * Category 1 we fix up by reattempting the load, and zeroing the segment
767 * register if the load fails.
768 * Category 2 we fix up by jumping to do_iret_error. We cannot use the
769 * normal Linux return path in this case because if we use the IRET hypercall
770 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
771 * We distinguish between categories by maintaining a status value in EAX.
773 ENTRY(xen_failsafe_callback)
780 /* EAX == 0 => Category 1 (Bad segment)
781 EAX != 0 => Category 2 (Bad IRET) */
787 5: pushl $-1 /* orig_ax = -1 => not a system call */
789 jmp ret_from_exception
791 .section .fixup, "ax"
809 ENDPROC(xen_failsafe_callback)
811 BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
812 xen_evtchn_do_upcall)
814 #endif /* CONFIG_XEN */
816 #if IS_ENABLED(CONFIG_HYPERV)
818 BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
819 hyperv_vector_handler)
821 #endif /* CONFIG_HYPERV */
823 #ifdef CONFIG_FUNCTION_TRACER
824 #ifdef CONFIG_DYNAMIC_FTRACE
834 pushl $0 /* Pass NULL as regs pointer */
837 movl function_trace_op, %ecx
838 subl $MCOUNT_INSN_SIZE, %eax
844 addl $4, %esp /* skip NULL pointer */
849 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
850 .globl ftrace_graph_call
860 ENTRY(ftrace_regs_caller)
861 pushf /* push flags before compare (in cs location) */
864 * i386 does not save SS and ESP when coming from kernel.
865 * Instead, to get sp, ®s->sp is used (see ptrace.h).
866 * Unfortunately, that means eflags must be at the same location
867 * as the current return ip is. We move the return ip into the
868 * ip location, and move flags into the return ip location.
870 pushl 4(%esp) /* save return ip into ip slot */
872 pushl $0 /* Load 0 into orig_ax */
885 movl 13*4(%esp), %eax /* Get the saved flags */
886 movl %eax, 14*4(%esp) /* Move saved flags into regs->flags location */
887 /* clobbering return ip */
888 movl $__KERNEL_CS, 13*4(%esp)
890 movl 12*4(%esp), %eax /* Load ip (1st parameter) */
891 subl $MCOUNT_INSN_SIZE, %eax /* Adjust ip */
892 movl 0x4(%ebp), %edx /* Load parent ip (2nd parameter) */
893 movl function_trace_op, %ecx /* Save ftrace_pos in 3rd parameter */
894 pushl %esp /* Save pt_regs as 4th parameter */
896 GLOBAL(ftrace_regs_call)
899 addl $4, %esp /* Skip pt_regs */
900 movl 14*4(%esp), %eax /* Move flags back into cs */
901 movl %eax, 13*4(%esp) /* Needed to keep addl from modifying flags */
902 movl 12*4(%esp), %eax /* Get return ip from regs->ip */
903 movl %eax, 14*4(%esp) /* Put return ip back for ret */
916 addl $8, %esp /* Skip orig_ax and ip */
917 popf /* Pop flags at end (no addl to corrupt flags) */
922 #else /* ! CONFIG_DYNAMIC_FTRACE */
925 cmpl $__PAGE_OFFSET, %esp
926 jb ftrace_stub /* Paging not enabled yet? */
928 cmpl $ftrace_stub, ftrace_trace_function
930 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
931 cmpl $ftrace_stub, ftrace_graph_return
932 jnz ftrace_graph_caller
934 cmpl $ftrace_graph_entry_stub, ftrace_graph_entry
935 jnz ftrace_graph_caller
941 /* taken from glibc */
948 subl $MCOUNT_INSN_SIZE, %eax
950 call *ftrace_trace_function
957 #endif /* CONFIG_DYNAMIC_FTRACE */
958 #endif /* CONFIG_FUNCTION_TRACER */
960 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
961 ENTRY(ftrace_graph_caller)
968 subl $MCOUNT_INSN_SIZE, %eax
969 call prepare_ftrace_return
974 END(ftrace_graph_caller)
976 .globl return_to_handler
981 call ftrace_return_to_handler
988 #ifdef CONFIG_TRACING
989 ENTRY(trace_page_fault)
991 pushl $trace_do_page_fault
993 END(trace_page_fault)
1001 /* the function address is in %gs's slot on the stack */
1013 movl $(__KERNEL_PERCPU), %ecx
1017 movl PT_GS(%esp), %edi # get the function address
1018 movl PT_ORIG_EAX(%esp), %edx # get the error code
1019 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
1022 movl $(__USER_DS), %ecx
1026 movl %esp, %eax # pt_regs pointer
1028 jmp ret_from_exception
1033 * #DB can happen at the first instruction of
1034 * entry_SYSENTER_32 or in Xen's SYSENTER prologue. If this
1035 * happens, then we will be running on a very small stack. We
1036 * need to detect this condition and switch to the thread
1037 * stack before calling any C code at all.
1039 * If you edit this code, keep in mind that NMIs can happen in here.
1042 pushl $-1 # mark this as an int
1044 xorl %edx, %edx # error code 0
1045 movl %esp, %eax # pt_regs pointer
1047 /* Are we currently on the SYSENTER stack? */
1048 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx)
1049 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
1050 cmpl $SIZEOF_SYSENTER_stack, %ecx
1051 jb .Ldebug_from_sysenter_stack
1055 jmp ret_from_exception
1057 .Ldebug_from_sysenter_stack:
1058 /* We're on the SYSENTER stack. Switch off. */
1060 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1064 jmp ret_from_exception
1068 * NMI is doubly nasty. It can happen on the first instruction of
1069 * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning
1070 * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32
1071 * switched stacks. We handle both conditions by simply checking whether we
1072 * interrupted kernel code running on the SYSENTER stack.
1076 #ifdef CONFIG_X86_ESPFIX32
1079 cmpw $__ESPFIX_SS, %ax
1084 pushl %eax # pt_regs->orig_ax
1086 xorl %edx, %edx # zero error code
1087 movl %esp, %eax # pt_regs pointer
1089 /* Are we currently on the SYSENTER stack? */
1090 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx)
1091 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
1092 cmpl $SIZEOF_SYSENTER_stack, %ecx
1093 jb .Lnmi_from_sysenter_stack
1095 /* Not on SYSENTER stack. */
1097 jmp restore_all_notrace
1099 .Lnmi_from_sysenter_stack:
1101 * We're on the SYSENTER stack. Switch off. No one (not even debug)
1102 * is using the thread stack right now, so it's safe for us to use it.
1105 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1108 jmp restore_all_notrace
1110 #ifdef CONFIG_X86_ESPFIX32
1113 * create the pointer to lss back
1118 /* copy the iret frame of 12 bytes */
1124 FIXUP_ESPFIX_STACK # %eax == %esp
1125 xorl %edx, %edx # zero error code
1128 lss 12+4(%esp), %esp # back to espfix stack
1135 pushl $-1 # mark this as an int
1138 xorl %edx, %edx # zero error code
1139 movl %esp, %eax # pt_regs pointer
1141 jmp ret_from_exception
1144 ENTRY(general_protection)
1145 pushl $do_general_protection
1147 END(general_protection)
1149 #ifdef CONFIG_KVM_GUEST
1150 ENTRY(async_page_fault)
1152 pushl $do_async_page_fault
1154 END(async_page_fault)