arch/x86/events/intel/uncore.h

   1 #include <linux/module.h>
   2 #include <linux/slab.h>
   3 #include <linux/pci.h>
   4 #include <asm/apicdef.h>
   5
   6 #include <linux/perf_event.h>
   7 #include "../perf_event.h"
   8
   9 #define UNCORE_PMU_NAME_LEN             32
  10 #define UNCORE_PMU_HRTIMER_INTERVAL     (60LL * NSEC_PER_SEC)
  11 #define UNCORE_SNB_IMC_HRTIMER_INTERVAL (5ULL * NSEC_PER_SEC)
  12
  13 #define UNCORE_FIXED_EVENT              0xff
  14 #define UNCORE_PMC_IDX_MAX_GENERIC      8
  15 #define UNCORE_PMC_IDX_FIXED            UNCORE_PMC_IDX_MAX_GENERIC
  16 #define UNCORE_PMC_IDX_MAX              (UNCORE_PMC_IDX_FIXED + 1)
  17
  18 #define UNCORE_PCI_DEV_FULL_DATA(dev, func, type, idx)  \
  19                 ((dev << 24) | (func << 16) | (type << 8) | idx)
  20 #define UNCORE_PCI_DEV_DATA(type, idx)  ((type << 8) | idx)
  21 #define UNCORE_PCI_DEV_DEV(data)        ((data >> 24) & 0xff)
  22 #define UNCORE_PCI_DEV_FUNC(data)       ((data >> 16) & 0xff)
  23 #define UNCORE_PCI_DEV_TYPE(data)       ((data >> 8) & 0xff)
  24 #define UNCORE_PCI_DEV_IDX(data)        (data & 0xff)
  25 #define UNCORE_EXTRA_PCI_DEV            0xff
  26 #define UNCORE_EXTRA_PCI_DEV_MAX        3
  27
  28 #define UNCORE_EVENT_CONSTRAINT(c, n) EVENT_CONSTRAINT(c, n, 0xff)
  29
  30 struct pci_extra_dev {
  31         struct pci_dev *dev[UNCORE_EXTRA_PCI_DEV_MAX];
  32 };
  33
  34 struct intel_uncore_ops;
  35 struct intel_uncore_pmu;
  36 struct intel_uncore_box;
  37 struct uncore_event_desc;
  38
  39 struct intel_uncore_type {
  40         const char *name;
  41         int num_counters;
  42         int num_boxes;
  43         int perf_ctr_bits;
  44         int fixed_ctr_bits;
  45         unsigned perf_ctr;
  46         unsigned event_ctl;
  47         unsigned event_mask;
  48         unsigned fixed_ctr;
  49         unsigned fixed_ctl;
  50         unsigned box_ctl;
  51         unsigned msr_offset;
  52         unsigned num_shared_regs:8;
  53         unsigned single_fixed:1;
  54         unsigned pair_ctr_ctl:1;
  55         unsigned *msr_offsets;
  56         struct event_constraint unconstrainted;
  57         struct event_constraint *constraints;
  58         struct intel_uncore_pmu *pmus;
  59         struct intel_uncore_ops *ops;
  60         struct uncore_event_desc *event_descs;
  61         const struct attribute_group *attr_groups[4];
  62         struct pmu *pmu; /* for custom pmu ops */
  63 };
  64
  65 #define pmu_group attr_groups[0]
  66 #define format_group attr_groups[1]
  67 #define events_group attr_groups[2]
  68
  69 struct intel_uncore_ops {
  70         void (*init_box)(struct intel_uncore_box *);
  71         void (*exit_box)(struct intel_uncore_box *);
  72         void (*disable_box)(struct intel_uncore_box *);
  73         void (*enable_box)(struct intel_uncore_box *);
  74         void (*disable_event)(struct intel_uncore_box *, struct perf_event *);
  75         void (*enable_event)(struct intel_uncore_box *, struct perf_event *);
  76         u64 (*read_counter)(struct intel_uncore_box *, struct perf_event *);
  77         int (*hw_config)(struct intel_uncore_box *, struct perf_event *);
  78         struct event_constraint *(*get_constraint)(struct intel_uncore_box *,
  79                                                    struct perf_event *);
  80         void (*put_constraint)(struct intel_uncore_box *, struct perf_event *);
  81 };
  82
  83 struct intel_uncore_pmu {
  84         struct pmu                      pmu;
  85         char                            name[UNCORE_PMU_NAME_LEN];
  86         int                             pmu_idx;
  87         int                             func_id;
  88         bool                            registered;
  89         atomic_t                        activeboxes;
  90         struct intel_uncore_type        *type;
  91         struct intel_uncore_box         **boxes;
  92 };
  93
  94 struct intel_uncore_extra_reg {
  95         raw_spinlock_t lock;
  96         u64 config, config1, config2;
  97         atomic_t ref;
  98 };
  99
 100 struct intel_uncore_box {
 101         int pci_phys_id;
 102         int pkgid;
 103         int n_active;   /* number of active events */
 104         int n_events;
 105         int cpu;        /* cpu to collect events */
 106         unsigned long flags;
 107         atomic_t refcnt;
 108         struct perf_event *events[UNCORE_PMC_IDX_MAX];
 109         struct perf_event *event_list[UNCORE_PMC_IDX_MAX];
 110         struct event_constraint *event_constraint[UNCORE_PMC_IDX_MAX];
 111         unsigned long active_mask[BITS_TO_LONGS(UNCORE_PMC_IDX_MAX)];
 112         u64 tags[UNCORE_PMC_IDX_MAX];
 113         struct pci_dev *pci_dev;
 114         struct intel_uncore_pmu *pmu;
 115         u64 hrtimer_duration; /* hrtimer timeout for this box */
 116         struct hrtimer hrtimer;
 117         struct list_head list;
 118         struct list_head active_list;
 119         void *io_addr;
 120         struct intel_uncore_extra_reg shared_regs[0];
 121 };
 122
 123 #define UNCORE_BOX_FLAG_INITIATED       0
 124
 125 struct uncore_event_desc {
 126         struct kobj_attribute attr;
 127         const char *config;
 128 };
 129
 130 struct pci2phy_map {
 131         struct list_head list;
 132         int segment;
 133         int pbus_to_physid[256];
 134 };
 135
 136 struct pci2phy_map *__find_pci2phy_map(int segment);
 137
 138 ssize_t uncore_event_show(struct kobject *kobj,
 139                           struct kobj_attribute *attr, char *buf);
 140
 141 #define INTEL_UNCORE_EVENT_DESC(_name, _config)                 \
 142 {                                                               \
 143         .attr   = __ATTR(_name, 0444, uncore_event_show, NULL), \
 144         .config = _config,                                      \
 145 }
 146
 147 #define DEFINE_UNCORE_FORMAT_ATTR(_var, _name, _format)                 \
 148 static ssize_t __uncore_##_var##_show(struct kobject *kobj,             \
 149                                 struct kobj_attribute *attr,            \
 150                                 char *page)                             \
 151 {                                                                       \
 152         BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE);                     \
 153         return sprintf(page, _format "\n");                             \
 154 }                                                                       \
 155 static struct kobj_attribute format_attr_##_var =                       \
 156         __ATTR(_name, 0444, __uncore_##_var##_show, NULL)
 157
 158 static inline unsigned uncore_pci_box_ctl(struct intel_uncore_box *box)
 159 {
 160         return box->pmu->type->box_ctl;
 161 }
 162
 163 static inline unsigned uncore_pci_fixed_ctl(struct intel_uncore_box *box)
 164 {
 165         return box->pmu->type->fixed_ctl;
 166 }
 167
 168 static inline unsigned uncore_pci_fixed_ctr(struct intel_uncore_box *box)
 169 {
 170         return box->pmu->type->fixed_ctr;
 171 }
 172
 173 static inline
 174 unsigned uncore_pci_event_ctl(struct intel_uncore_box *box, int idx)
 175 {
 176         return idx * 4 + box->pmu->type->event_ctl;
 177 }
 178
 179 static inline
 180 unsigned uncore_pci_perf_ctr(struct intel_uncore_box *box, int idx)
 181 {
 182         return idx * 8 + box->pmu->type->perf_ctr;
 183 }
 184
 185 static inline unsigned uncore_msr_box_offset(struct intel_uncore_box *box)
 186 {
 187         struct intel_uncore_pmu *pmu = box->pmu;
 188         return pmu->type->msr_offsets ?
 189                 pmu->type->msr_offsets[pmu->pmu_idx] :
 190                 pmu->type->msr_offset * pmu->pmu_idx;
 191 }
 192
 193 static inline unsigned uncore_msr_box_ctl(struct intel_uncore_box *box)
 194 {
 195         if (!box->pmu->type->box_ctl)
 196                 return 0;
 197         return box->pmu->type->box_ctl + uncore_msr_box_offset(box);
 198 }
 199
 200 static inline unsigned uncore_msr_fixed_ctl(struct intel_uncore_box *box)
 201 {
 202         if (!box->pmu->type->fixed_ctl)
 203                 return 0;
 204         return box->pmu->type->fixed_ctl + uncore_msr_box_offset(box);
 205 }
 206
 207 static inline unsigned uncore_msr_fixed_ctr(struct intel_uncore_box *box)
 208 {
 209         return box->pmu->type->fixed_ctr + uncore_msr_box_offset(box);
 210 }
 211
 212 static inline
 213 unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx)
 214 {
 215         return box->pmu->type->event_ctl +
 216                 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
 217                 uncore_msr_box_offset(box);
 218 }
 219
 220 static inline
 221 unsigned uncore_msr_perf_ctr(struct intel_uncore_box *box, int idx)
 222 {
 223         return box->pmu->type->perf_ctr +
 224                 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
 225                 uncore_msr_box_offset(box);
 226 }
 227
 228 static inline
 229 unsigned uncore_fixed_ctl(struct intel_uncore_box *box)
 230 {
 231         if (box->pci_dev)
 232                 return uncore_pci_fixed_ctl(box);
 233         else
 234                 return uncore_msr_fixed_ctl(box);
 235 }
 236
 237 static inline
 238 unsigned uncore_fixed_ctr(struct intel_uncore_box *box)
 239 {
 240         if (box->pci_dev)
 241                 return uncore_pci_fixed_ctr(box);
 242         else
 243                 return uncore_msr_fixed_ctr(box);
 244 }
 245
 246 static inline
 247 unsigned uncore_event_ctl(struct intel_uncore_box *box, int idx)
 248 {
 249         if (box->pci_dev)
 250                 return uncore_pci_event_ctl(box, idx);
 251         else
 252                 return uncore_msr_event_ctl(box, idx);
 253 }
 254
 255 static inline
 256 unsigned uncore_perf_ctr(struct intel_uncore_box *box, int idx)
 257 {
 258         if (box->pci_dev)
 259                 return uncore_pci_perf_ctr(box, idx);
 260         else
 261                 return uncore_msr_perf_ctr(box, idx);
 262 }
 263
 264 static inline int uncore_perf_ctr_bits(struct intel_uncore_box *box)
 265 {
 266         return box->pmu->type->perf_ctr_bits;
 267 }
 268
 269 static inline int uncore_fixed_ctr_bits(struct intel_uncore_box *box)
 270 {
 271         return box->pmu->type->fixed_ctr_bits;
 272 }
 273
 274 static inline int uncore_num_counters(struct intel_uncore_box *box)
 275 {
 276         return box->pmu->type->num_counters;
 277 }
 278
 279 static inline void uncore_disable_box(struct intel_uncore_box *box)
 280 {
 281         if (box->pmu->type->ops->disable_box)
 282                 box->pmu->type->ops->disable_box(box);
 283 }
 284
 285 static inline void uncore_enable_box(struct intel_uncore_box *box)
 286 {
 287         if (box->pmu->type->ops->enable_box)
 288                 box->pmu->type->ops->enable_box(box);
 289 }
 290
 291 static inline void uncore_disable_event(struct intel_uncore_box *box,
 292                                 struct perf_event *event)
 293 {
 294         box->pmu->type->ops->disable_event(box, event);
 295 }
 296
 297 static inline void uncore_enable_event(struct intel_uncore_box *box,
 298                                 struct perf_event *event)
 299 {
 300         box->pmu->type->ops->enable_event(box, event);
 301 }
 302
 303 static inline u64 uncore_read_counter(struct intel_uncore_box *box,
 304                                 struct perf_event *event)
 305 {
 306         return box->pmu->type->ops->read_counter(box, event);
 307 }
 308
 309 static inline void uncore_box_init(struct intel_uncore_box *box)
 310 {
 311         if (!test_and_set_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
 312                 if (box->pmu->type->ops->init_box)
 313                         box->pmu->type->ops->init_box(box);
 314         }
 315 }
 316
 317 static inline void uncore_box_exit(struct intel_uncore_box *box)
 318 {
 319         if (test_and_clear_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
 320                 if (box->pmu->type->ops->exit_box)
 321                         box->pmu->type->ops->exit_box(box);
 322         }
 323 }
 324
 325 static inline bool uncore_box_is_fake(struct intel_uncore_box *box)
 326 {
 327         return (box->pkgid < 0);
 328 }
 329
 330 static inline struct intel_uncore_pmu *uncore_event_to_pmu(struct perf_event *event)
 331 {
 332         return container_of(event->pmu, struct intel_uncore_pmu, pmu);
 333 }
 334
 335 static inline struct intel_uncore_box *uncore_event_to_box(struct perf_event *event)
 336 {
 337         return event->pmu_private;
 338 }
 339
 340 struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
 341 u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *event);
 342 void uncore_pmu_start_hrtimer(struct intel_uncore_box *box);
 343 void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box);
 344 void uncore_pmu_event_read(struct perf_event *event);
 345 void uncore_perf_event_update(struct intel_uncore_box *box, struct perf_event *event);
 346 struct event_constraint *
 347 uncore_get_constraint(struct intel_uncore_box *box, struct perf_event *event);
 348 void uncore_put_constraint(struct intel_uncore_box *box, struct perf_event *event);
 349 u64 uncore_shared_reg_config(struct intel_uncore_box *box, int idx);
 350
 351 extern struct intel_uncore_type **uncore_msr_uncores;
 352 extern struct intel_uncore_type **uncore_pci_uncores;
 353 extern struct pci_driver *uncore_pci_driver;
 354 extern raw_spinlock_t pci2phy_map_lock;
 355 extern struct list_head pci2phy_map_head;
 356 extern struct pci_extra_dev *uncore_extra_pci_dev;
 357 extern struct event_constraint uncore_constraint_empty;
 358
 359 /* perf_event_intel_uncore_snb.c */
 360 int snb_uncore_pci_init(void);
 361 int ivb_uncore_pci_init(void);
 362 int hsw_uncore_pci_init(void);
 363 int bdw_uncore_pci_init(void);
 364 int skl_uncore_pci_init(void);
 365 void snb_uncore_cpu_init(void);
 366 void nhm_uncore_cpu_init(void);
 367 void skl_uncore_cpu_init(void);
 368 int snb_pci2phy_map_init(int devid);
 369
 370 /* perf_event_intel_uncore_snbep.c */
 371 int snbep_uncore_pci_init(void);
 372 void snbep_uncore_cpu_init(void);
 373 int ivbep_uncore_pci_init(void);
 374 void ivbep_uncore_cpu_init(void);
 375 int hswep_uncore_pci_init(void);
 376 void hswep_uncore_cpu_init(void);
 377 int bdx_uncore_pci_init(void);
 378 void bdx_uncore_cpu_init(void);
 379 int knl_uncore_pci_init(void);
 380 void knl_uncore_cpu_init(void);
 381
 382 /* perf_event_intel_uncore_nhmex.c */
 383 void nhmex_uncore_cpu_init(void);