arch/x86/include/asm/bitops.h

   1 #ifndef _ASM_X86_BITOPS_H
   2 #define _ASM_X86_BITOPS_H
   3
   4 /*
   5  * Copyright 1992, Linus Torvalds.
   6  */
   7
   8 #ifndef _LINUX_BITOPS_H
   9 #error only <linux/bitops.h> can be included directly
  10 #endif
  11
  12 #include <linux/compiler.h>
  13 #include <asm/alternative.h>
  14
  15 /*
  16  * These have to be done with inline assembly: that way the bit-setting
  17  * is guaranteed to be atomic. All bit operations return 0 if the bit
  18  * was cleared before the operation and != 0 if it was not.
  19  *
  20  * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
  21  */
  22
  23 #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
  24 /* Technically wrong, but this avoids compilation errors on some gcc
  25    versions. */
  26 #define BITOP_ADDR(x) "=m" (*(volatile long *) (x))
  27 #else
  28 #define BITOP_ADDR(x) "+m" (*(volatile long *) (x))
  29 #endif
  30
  31 #define ADDR                            BITOP_ADDR(addr)
  32
  33 /*
  34  * We do the locked ops that don't return the old value as
  35  * a mask operation on a byte.
  36  */
  37 #define IS_IMMEDIATE(nr)                (__builtin_constant_p(nr))
  38 #define CONST_MASK_ADDR(nr, addr)       BITOP_ADDR((void *)(addr) + ((nr)>>3))
  39 #define CONST_MASK(nr)                  (1 << ((nr) & 7))
  40
  41 /**
  42  * set_bit - Atomically set a bit in memory
  43  * @nr: the bit to set
  44  * @addr: the address to start counting from
  45  *
  46  * This function is atomic and may not be reordered.  See __set_bit()
  47  * if you do not require the atomic guarantees.
  48  *
  49  * Note: there are no guarantees that this function will not be reordered
  50  * on non x86 architectures, so if you are writing portable code,
  51  * make sure not to rely on its reordering guarantees.
  52  *
  53  * Note that @nr may be almost arbitrarily large; this function is not
  54  * restricted to acting on a single-word quantity.
  55  */
  56 static inline void set_bit(unsigned int nr, volatile unsigned long *addr)
  57 {
  58         if (IS_IMMEDIATE(nr)) {
  59                 asm volatile(LOCK_PREFIX "orb %1,%0"
  60                         : CONST_MASK_ADDR(nr, addr)
  61                         : "iq" ((u8)CONST_MASK(nr))
  62                         : "memory");
  63         } else {
  64                 asm volatile(LOCK_PREFIX "bts %1,%0"
  65                         : BITOP_ADDR(addr) : "Ir" (nr) : "memory");
  66         }
  67 }
  68
  69 /**
  70  * __set_bit - Set a bit in memory
  71  * @nr: the bit to set
  72  * @addr: the address to start counting from
  73  *
  74  * Unlike set_bit(), this function is non-atomic and may be reordered.
  75  * If it's called on the same region of memory simultaneously, the effect
  76  * may be that only one operation succeeds.
  77  */
  78 static inline void __set_bit(int nr, volatile unsigned long *addr)
  79 {
  80         asm volatile("bts %1,%0" : ADDR : "Ir" (nr) : "memory");
  81 }
  82
  83 /**
  84  * clear_bit - Clears a bit in memory
  85  * @nr: Bit to clear
  86  * @addr: Address to start counting from
  87  *
  88  * clear_bit() is atomic and may not be reordered.  However, it does
  89  * not contain a memory barrier, so if it is used for locking purposes,
  90  * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
  91  * in order to ensure changes are visible on other processors.
  92  */
  93 static inline void clear_bit(int nr, volatile unsigned long *addr)
  94 {
  95         if (IS_IMMEDIATE(nr)) {
  96                 asm volatile(LOCK_PREFIX "andb %1,%0"
  97                         : CONST_MASK_ADDR(nr, addr)
  98                         : "iq" ((u8)~CONST_MASK(nr)));
  99         } else {
 100                 asm volatile(LOCK_PREFIX "btr %1,%0"
 101                         : BITOP_ADDR(addr)
 102                         : "Ir" (nr));
 103         }
 104 }
 105
 106 /*
 107  * clear_bit_unlock - Clears a bit in memory
 108  * @nr: Bit to clear
 109  * @addr: Address to start counting from
 110  *
 111  * clear_bit() is atomic and implies release semantics before the memory
 112  * operation. It can be used for an unlock.
 113  */
 114 static inline void clear_bit_unlock(unsigned nr, volatile unsigned long *addr)
 115 {
 116         barrier();
 117         clear_bit(nr, addr);
 118 }
 119
 120 static inline void __clear_bit(int nr, volatile unsigned long *addr)
 121 {
 122         asm volatile("btr %1,%0" : ADDR : "Ir" (nr));
 123 }
 124
 125 /*
 126  * __clear_bit_unlock - Clears a bit in memory
 127  * @nr: Bit to clear
 128  * @addr: Address to start counting from
 129  *
 130  * __clear_bit() is non-atomic and implies release semantics before the memory
 131  * operation. It can be used for an unlock if no other CPUs can concurrently
 132  * modify other bits in the word.
 133  *
 134  * No memory barrier is required here, because x86 cannot reorder stores past
 135  * older loads. Same principle as spin_unlock.
 136  */
 137 static inline void __clear_bit_unlock(unsigned nr, volatile unsigned long *addr)
 138 {
 139         barrier();
 140         __clear_bit(nr, addr);
 141 }
 142
 143 #define smp_mb__before_clear_bit()      barrier()
 144 #define smp_mb__after_clear_bit()       barrier()
 145
 146 /**
 147  * __change_bit - Toggle a bit in memory
 148  * @nr: the bit to change
 149  * @addr: the address to start counting from
 150  *
 151  * Unlike change_bit(), this function is non-atomic and may be reordered.
 152  * If it's called on the same region of memory simultaneously, the effect
 153  * may be that only one operation succeeds.
 154  */
 155 static inline void __change_bit(int nr, volatile unsigned long *addr)
 156 {
 157         asm volatile("btc %1,%0" : ADDR : "Ir" (nr));
 158 }
 159
 160 /**
 161  * change_bit - Toggle a bit in memory
 162  * @nr: Bit to change
 163  * @addr: Address to start counting from
 164  *
 165  * change_bit() is atomic and may not be reordered.
 166  * Note that @nr may be almost arbitrarily large; this function is not
 167  * restricted to acting on a single-word quantity.
 168  */
 169 static inline void change_bit(int nr, volatile unsigned long *addr)
 170 {
 171         if (IS_IMMEDIATE(nr)) {
 172                 asm volatile(LOCK_PREFIX "xorb %1,%0"
 173                         : CONST_MASK_ADDR(nr, addr)
 174                         : "iq" ((u8)CONST_MASK(nr)));
 175         } else {
 176                 asm volatile(LOCK_PREFIX "btc %1,%0"
 177                         : BITOP_ADDR(addr)
 178                         : "Ir" (nr));
 179         }
 180 }
 181
 182 /**
 183  * test_and_set_bit - Set a bit and return its old value
 184  * @nr: Bit to set
 185  * @addr: Address to count from
 186  *
 187  * This operation is atomic and cannot be reordered.
 188  * It also implies a memory barrier.
 189  */
 190 static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
 191 {
 192         int oldbit;
 193
 194         asm volatile(LOCK_PREFIX "bts %2,%1\n\t"
 195                      "sbb %0,%0" : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
 196
 197         return oldbit;
 198 }
 199
 200 /**
 201  * test_and_set_bit_lock - Set a bit and return its old value for lock
 202  * @nr: Bit to set
 203  * @addr: Address to count from
 204  *
 205  * This is the same as test_and_set_bit on x86.
 206  */
 207 static inline int test_and_set_bit_lock(int nr, volatile unsigned long *addr)
 208 {
 209         return test_and_set_bit(nr, addr);
 210 }
 211
 212 /**
 213  * __test_and_set_bit - Set a bit and return its old value
 214  * @nr: Bit to set
 215  * @addr: Address to count from
 216  *
 217  * This operation is non-atomic and can be reordered.
 218  * If two examples of this operation race, one can appear to succeed
 219  * but actually fail.  You must protect multiple accesses with a lock.
 220  */
 221 static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
 222 {
 223         int oldbit;
 224
 225         asm("bts %2,%1\n\t"
 226             "sbb %0,%0"
 227             : "=r" (oldbit), ADDR
 228             : "Ir" (nr));
 229         return oldbit;
 230 }
 231
 232 /**
 233  * test_and_clear_bit - Clear a bit and return its old value
 234  * @nr: Bit to clear
 235  * @addr: Address to count from
 236  *
 237  * This operation is atomic and cannot be reordered.
 238  * It also implies a memory barrier.
 239  */
 240 static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
 241 {
 242         int oldbit;
 243
 244         asm volatile(LOCK_PREFIX "btr %2,%1\n\t"
 245                      "sbb %0,%0"
 246                      : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
 247
 248         return oldbit;
 249 }
 250
 251 /**
 252  * __test_and_clear_bit - Clear a bit and return its old value
 253  * @nr: Bit to clear
 254  * @addr: Address to count from
 255  *
 256  * This operation is non-atomic and can be reordered.
 257  * If two examples of this operation race, one can appear to succeed
 258  * but actually fail.  You must protect multiple accesses with a lock.
 259  */
 260 static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
 261 {
 262         int oldbit;
 263
 264         asm volatile("btr %2,%1\n\t"
 265                      "sbb %0,%0"
 266                      : "=r" (oldbit), ADDR
 267                      : "Ir" (nr));
 268         return oldbit;
 269 }
 270
 271 /* WARNING: non atomic and it can be reordered! */
 272 static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
 273 {
 274         int oldbit;
 275
 276         asm volatile("btc %2,%1\n\t"
 277                      "sbb %0,%0"
 278                      : "=r" (oldbit), ADDR
 279                      : "Ir" (nr) : "memory");
 280
 281         return oldbit;
 282 }
 283
 284 /**
 285  * test_and_change_bit - Change a bit and return its old value
 286  * @nr: Bit to change
 287  * @addr: Address to count from
 288  *
 289  * This operation is atomic and cannot be reordered.
 290  * It also implies a memory barrier.
 291  */
 292 static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
 293 {
 294         int oldbit;
 295
 296         asm volatile(LOCK_PREFIX "btc %2,%1\n\t"
 297                      "sbb %0,%0"
 298                      : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
 299
 300         return oldbit;
 301 }
 302
 303 static inline int constant_test_bit(unsigned int nr, const volatile unsigned long *addr)
 304 {
 305         return ((1UL << (nr % BITS_PER_LONG)) &
 306                 (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0;
 307 }
 308
 309 static inline int variable_test_bit(int nr, volatile const unsigned long *addr)
 310 {
 311         int oldbit;
 312
 313         asm volatile("bt %2,%1\n\t"
 314                      "sbb %0,%0"
 315                      : "=r" (oldbit)
 316                      : "m" (*(unsigned long *)addr), "Ir" (nr));
 317
 318         return oldbit;
 319 }
 320
 321 #if 0 /* Fool kernel-doc since it doesn't do macros yet */
 322 /**
 323  * test_bit - Determine whether a bit is set
 324  * @nr: bit number to test
 325  * @addr: Address to start counting from
 326  */
 327 static int test_bit(int nr, const volatile unsigned long *addr);
 328 #endif
 329
 330 #define test_bit(nr, addr)                      \
 331         (__builtin_constant_p((nr))             \
 332          ? constant_test_bit((nr), (addr))      \
 333          : variable_test_bit((nr), (addr)))
 334
 335 /**
 336  * __ffs - find first set bit in word
 337  * @word: The word to search
 338  *
 339  * Undefined if no bit exists, so code should check against 0 first.
 340  */
 341 static inline unsigned long __ffs(unsigned long word)
 342 {
 343         asm("bsf %1,%0"
 344                 : "=r" (word)
 345                 : "rm" (word));
 346         return word;
 347 }
 348
 349 /**
 350  * ffz - find first zero bit in word
 351  * @word: The word to search
 352  *
 353  * Undefined if no zero exists, so code should check against ~0UL first.
 354  */
 355 static inline unsigned long ffz(unsigned long word)
 356 {
 357         asm("bsf %1,%0"
 358                 : "=r" (word)
 359                 : "r" (~word));
 360         return word;
 361 }
 362
 363 /*
 364  * __fls: find last set bit in word
 365  * @word: The word to search
 366  *
 367  * Undefined if no set bit exists, so code should check against 0 first.
 368  */
 369 static inline unsigned long __fls(unsigned long word)
 370 {
 371         asm("bsr %1,%0"
 372             : "=r" (word)
 373             : "rm" (word));
 374         return word;
 375 }
 376
 377 #ifdef __KERNEL__
 378 /**
 379  * ffs - find first set bit in word
 380  * @x: the word to search
 381  *
 382  * This is defined the same way as the libc and compiler builtin ffs
 383  * routines, therefore differs in spirit from the other bitops.
 384  *
 385  * ffs(value) returns 0 if value is 0 or the position of the first
 386  * set bit if value is nonzero. The first (least significant) bit
 387  * is at position 1.
 388  */
 389 static inline int ffs(int x)
 390 {
 391         int r;
 392 #ifdef CONFIG_X86_CMOV
 393         asm("bsfl %1,%0\n\t"
 394             "cmovzl %2,%0"
 395             : "=r" (r) : "rm" (x), "r" (-1));
 396 #else
 397         asm("bsfl %1,%0\n\t"
 398             "jnz 1f\n\t"
 399             "movl $-1,%0\n"
 400             "1:" : "=r" (r) : "rm" (x));
 401 #endif
 402         return r + 1;
 403 }
 404
 405 /**
 406  * fls - find last set bit in word
 407  * @x: the word to search
 408  *
 409  * This is defined in a similar way as the libc and compiler builtin
 410  * ffs, but returns the position of the most significant set bit.
 411  *
 412  * fls(value) returns 0 if value is 0 or the position of the last
 413  * set bit if value is nonzero. The last (most significant) bit is
 414  * at position 32.
 415  */
 416 static inline int fls(int x)
 417 {
 418         int r;
 419 #ifdef CONFIG_X86_CMOV
 420         asm("bsrl %1,%0\n\t"
 421             "cmovzl %2,%0"
 422             : "=&r" (r) : "rm" (x), "rm" (-1));
 423 #else
 424         asm("bsrl %1,%0\n\t"
 425             "jnz 1f\n\t"
 426             "movl $-1,%0\n"
 427             "1:" : "=r" (r) : "rm" (x));
 428 #endif
 429         return r + 1;
 430 }
 431 #endif /* __KERNEL__ */
 432
 433 #undef ADDR
 434
 435 #ifdef __KERNEL__
 436
 437 #include <asm-generic/bitops/sched.h>
 438
 439 #define ARCH_HAS_FAST_MULTIPLIER 1
 440
 441 #include <asm-generic/bitops/hweight.h>
 442
 443 #endif /* __KERNEL__ */
 444
 445 #include <asm-generic/bitops/fls64.h>
 446
 447 #ifdef __KERNEL__
 448
 449 #include <asm-generic/bitops/ext2-non-atomic.h>
 450
 451 #define ext2_set_bit_atomic(lock, nr, addr)                     \
 452         test_and_set_bit((nr), (unsigned long *)(addr))
 453 #define ext2_clear_bit_atomic(lock, nr, addr)                   \
 454         test_and_clear_bit((nr), (unsigned long *)(addr))
 455
 456 #include <asm-generic/bitops/minix.h>
 457
 458 #endif /* __KERNEL__ */
 459 #endif /* _ASM_X86_BITOPS_H */