arch/x86/include/asm/irq_vectors.h

   1 #ifndef _ASM_X86_IRQ_VECTORS_H
   2 #define _ASM_X86_IRQ_VECTORS_H
   3
   4 #include <linux/threads.h>
   5
   6 #define NMI_VECTOR              0x02
   7
   8 /*
   9  * IDT vectors usable for external interrupt sources start
  10  * at 0x20:
  11  */
  12 #define FIRST_EXTERNAL_VECTOR   0x20
  13
  14 #ifdef CONFIG_X86_32
  15 # define SYSCALL_VECTOR         0x80
  16 #else
  17 # define IA32_SYSCALL_VECTOR    0x80
  18 #endif
  19
  20 /*
  21  * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
  22  * cleanup after irq migration.
  23  */
  24 #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
  25
  26 /*
  27  * Vectors 0x30-0x3f are used for ISA interrupts.
  28  */
  29 #define IRQ0_VECTOR             (FIRST_EXTERNAL_VECTOR + 0x10)
  30 #define IRQ1_VECTOR             (IRQ0_VECTOR + 1)
  31 #define IRQ2_VECTOR             (IRQ0_VECTOR + 2)
  32 #define IRQ3_VECTOR             (IRQ0_VECTOR + 3)
  33 #define IRQ4_VECTOR             (IRQ0_VECTOR + 4)
  34 #define IRQ5_VECTOR             (IRQ0_VECTOR + 5)
  35 #define IRQ6_VECTOR             (IRQ0_VECTOR + 6)
  36 #define IRQ7_VECTOR             (IRQ0_VECTOR + 7)
  37 #define IRQ8_VECTOR             (IRQ0_VECTOR + 8)
  38 #define IRQ9_VECTOR             (IRQ0_VECTOR + 9)
  39 #define IRQ10_VECTOR            (IRQ0_VECTOR + 10)
  40 #define IRQ11_VECTOR            (IRQ0_VECTOR + 11)
  41 #define IRQ12_VECTOR            (IRQ0_VECTOR + 12)
  42 #define IRQ13_VECTOR            (IRQ0_VECTOR + 13)
  43 #define IRQ14_VECTOR            (IRQ0_VECTOR + 14)
  44 #define IRQ15_VECTOR            (IRQ0_VECTOR + 15)
  45
  46 /*
  47  * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
  48  *
  49  *  some of the following vectors are 'rare', they are merged
  50  *  into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
  51  *  TLB, reschedule and local APIC vectors are performance-critical.
  52  *
  53  *  Vectors 0xf0-0xfa are free (reserved for future Linux use).
  54  */
  55 #ifdef CONFIG_X86_32
  56
  57 # define SPURIOUS_APIC_VECTOR           0xff
  58 # define ERROR_APIC_VECTOR              0xfe
  59 # define INVALIDATE_TLB_VECTOR          0xfd
  60 # define RESCHEDULE_VECTOR              0xfc
  61 # define CALL_FUNCTION_VECTOR           0xfb
  62 # define CALL_FUNCTION_SINGLE_VECTOR    0xfa
  63 # define THERMAL_APIC_VECTOR            0xf0
  64
  65 #else
  66
  67 #define SPURIOUS_APIC_VECTOR            0xff
  68 #define ERROR_APIC_VECTOR               0xfe
  69 #define RESCHEDULE_VECTOR               0xfd
  70 #define CALL_FUNCTION_VECTOR            0xfc
  71 #define CALL_FUNCTION_SINGLE_VECTOR     0xfb
  72 #define THERMAL_APIC_VECTOR             0xfa
  73 #define THRESHOLD_APIC_VECTOR           0xf9
  74 #define UV_BAU_MESSAGE                  0xf8
  75 #define INVALIDATE_TLB_VECTOR_END       0xf7
  76 #define INVALIDATE_TLB_VECTOR_START     0xf0    /* f0-f7 used for TLB flush */
  77
  78 #define NUM_INVALIDATE_TLB_VECTORS      8
  79
  80 #endif
  81
  82 /*
  83  * Local APIC timer IRQ vector is on a different priority level,
  84  * to work around the 'lost local interrupt if more than 2 IRQ
  85  * sources per level' errata.
  86  */
  87 #define LOCAL_TIMER_VECTOR      0xef
  88
  89 /*
  90  * First APIC vector available to drivers: (vectors 0x30-0xee) we
  91  * start at 0x31(0x41) to spread out vectors evenly between priority
  92  * levels. (0x80 is the syscall vector)
  93  */
  94 #define FIRST_DEVICE_VECTOR     (IRQ15_VECTOR + 2)
  95
  96 #define NR_VECTORS              256
  97
  98 #define FPU_IRQ                 13
  99
 100 #define FIRST_VM86_IRQ          3
 101 #define LAST_VM86_IRQ           15
 102 #define invalid_vm86_irq(irq)   ((irq) < 3 || (irq) > 15)
 103
 104 #if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER)
 105 # if NR_CPUS < MAX_IO_APICS
 106 #  define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
 107 # else
 108 #  define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
 109 # endif
 110
 111 #elif defined(CONFIG_X86_VOYAGER)
 112
 113 # define NR_IRQS                224
 114
 115 #else /* IO_APIC || VOYAGER */
 116
 117 # define NR_IRQS                16
 118
 119 #endif
 120
 121 /* Voyager specific defines */
 122 /* These define the CPIs we use in linux */
 123 #define VIC_CPI_LEVEL0                  0
 124 #define VIC_CPI_LEVEL1                  1
 125 /* now the fake CPIs */
 126 #define VIC_TIMER_CPI                   2
 127 #define VIC_INVALIDATE_CPI              3
 128 #define VIC_RESCHEDULE_CPI              4
 129 #define VIC_ENABLE_IRQ_CPI              5
 130 #define VIC_CALL_FUNCTION_CPI           6
 131 #define VIC_CALL_FUNCTION_SINGLE_CPI    7
 132
 133 /* Now the QIC CPIs:  Since we don't need the two initial levels,
 134  * these are 2 less than the VIC CPIs */
 135 #define QIC_CPI_OFFSET                  1
 136 #define QIC_TIMER_CPI                   (VIC_TIMER_CPI - QIC_CPI_OFFSET)
 137 #define QIC_INVALIDATE_CPI              (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
 138 #define QIC_RESCHEDULE_CPI              (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
 139 #define QIC_ENABLE_IRQ_CPI              (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
 140 #define QIC_CALL_FUNCTION_CPI           (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
 141 #define QIC_CALL_FUNCTION_SINGLE_CPI    (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
 142
 143 #define VIC_START_FAKE_CPI              VIC_TIMER_CPI
 144 #define VIC_END_FAKE_CPI                VIC_CALL_FUNCTION_SINGLE_CPI
 145
 146 /* this is the SYS_INT CPI. */
 147 #define VIC_SYS_INT                     8
 148 #define VIC_CMN_INT                     15
 149
 150 /* This is the boot CPI for alternate processors.  It gets overwritten
 151  * by the above once the system has activated all available processors */
 152 #define VIC_CPU_BOOT_CPI                VIC_CPI_LEVEL0
 153 #define VIC_CPU_BOOT_ERRATA_CPI         (VIC_CPI_LEVEL0 + 8)
 154
 155
 156 #endif /* _ASM_X86_IRQ_VECTORS_H */