arch/x86/include/asm/kvm_host.h

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This header defines architecture specific interfaces, x86 version
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2.  See
   7  * the COPYING file in the top-level directory.
   8  *
   9  */
  10
  11 #ifndef _ASM_X86_KVM_HOST_H
  12 #define _ASM_X86_KVM_HOST_H
  13
  14 #include <linux/types.h>
  15 #include <linux/mm.h>
  16 #include <linux/mmu_notifier.h>
  17 #include <linux/tracepoint.h>
  18 #include <linux/cpumask.h>
  19 #include <linux/irq_work.h>
  20
  21 #include <linux/kvm.h>
  22 #include <linux/kvm_para.h>
  23 #include <linux/kvm_types.h>
  24 #include <linux/perf_event.h>
  25 #include <linux/pvclock_gtod.h>
  26 #include <linux/clocksource.h>
  27
  28 #include <asm/pvclock-abi.h>
  29 #include <asm/desc.h>
  30 #include <asm/mtrr.h>
  31 #include <asm/msr-index.h>
  32 #include <asm/asm.h>
  33
  34 #define KVM_MAX_VCPUS 255
  35 #define KVM_SOFT_MAX_VCPUS 160
  36 #define KVM_USER_MEM_SLOTS 125
  37 /* memory slots that are not exposed to userspace */
  38 #define KVM_PRIVATE_MEM_SLOTS 3
  39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
  40
  41 #define KVM_MMIO_SIZE 16
  42
  43 #define KVM_PIO_PAGE_OFFSET 1
  44 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
  45
  46 #define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
  47
  48 #define CR0_RESERVED_BITS                                               \
  49         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  50                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  51                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  52
  53 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL
  54 #define CR4_RESERVED_BITS                                               \
  55         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  56                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  57                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
  58                           | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
  59                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
  60
  61 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  62
  63
  64
  65 #define INVALID_PAGE (~(hpa_t)0)
  66 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  67
  68 #define UNMAPPED_GVA (~(gpa_t)0)
  69
  70 /* KVM Hugepage definitions for x86 */
  71 #define KVM_NR_PAGE_SIZES       3
  72 #define KVM_HPAGE_GFN_SHIFT(x)  (((x) - 1) * 9)
  73 #define KVM_HPAGE_SHIFT(x)      (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
  74 #define KVM_HPAGE_SIZE(x)       (1UL << KVM_HPAGE_SHIFT(x))
  75 #define KVM_HPAGE_MASK(x)       (~(KVM_HPAGE_SIZE(x) - 1))
  76 #define KVM_PAGES_PER_HPAGE(x)  (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
  77
  78 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
  79 {
  80         /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
  81         return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
  82                 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
  83 }
  84
  85 #define SELECTOR_TI_MASK (1 << 2)
  86 #define SELECTOR_RPL_MASK 0x03
  87
  88 #define IOPL_SHIFT 12
  89
  90 #define KVM_PERMILLE_MMU_PAGES 20
  91 #define KVM_MIN_ALLOC_MMU_PAGES 64
  92 #define KVM_MMU_HASH_SHIFT 10
  93 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
  94 #define KVM_MIN_FREE_MMU_PAGES 5
  95 #define KVM_REFILL_PAGES 25
  96 #define KVM_MAX_CPUID_ENTRIES 80
  97 #define KVM_NR_FIXED_MTRR_REGION 88
  98 #define KVM_NR_VAR_MTRR 8
  99
 100 #define ASYNC_PF_PER_VCPU 64
 101
 102 struct kvm_vcpu;
 103 struct kvm;
 104 struct kvm_async_pf;
 105
 106 enum kvm_reg {
 107         VCPU_REGS_RAX = 0,
 108         VCPU_REGS_RCX = 1,
 109         VCPU_REGS_RDX = 2,
 110         VCPU_REGS_RBX = 3,
 111         VCPU_REGS_RSP = 4,
 112         VCPU_REGS_RBP = 5,
 113         VCPU_REGS_RSI = 6,
 114         VCPU_REGS_RDI = 7,
 115 #ifdef CONFIG_X86_64
 116         VCPU_REGS_R8 = 8,
 117         VCPU_REGS_R9 = 9,
 118         VCPU_REGS_R10 = 10,
 119         VCPU_REGS_R11 = 11,
 120         VCPU_REGS_R12 = 12,
 121         VCPU_REGS_R13 = 13,
 122         VCPU_REGS_R14 = 14,
 123         VCPU_REGS_R15 = 15,
 124 #endif
 125         VCPU_REGS_RIP,
 126         NR_VCPU_REGS
 127 };
 128
 129 enum kvm_reg_ex {
 130         VCPU_EXREG_PDPTR = NR_VCPU_REGS,
 131         VCPU_EXREG_CR3,
 132         VCPU_EXREG_RFLAGS,
 133         VCPU_EXREG_SEGMENTS,
 134 };
 135
 136 enum {
 137         VCPU_SREG_ES,
 138         VCPU_SREG_CS,
 139         VCPU_SREG_SS,
 140         VCPU_SREG_DS,
 141         VCPU_SREG_FS,
 142         VCPU_SREG_GS,
 143         VCPU_SREG_TR,
 144         VCPU_SREG_LDTR,
 145 };
 146
 147 #include <asm/kvm_emulate.h>
 148
 149 #define KVM_NR_MEM_OBJS 40
 150
 151 #define KVM_NR_DB_REGS  4
 152
 153 #define DR6_BD          (1 << 13)
 154 #define DR6_BS          (1 << 14)
 155 #define DR6_RTM         (1 << 16)
 156 #define DR6_FIXED_1     0xfffe0ff0
 157 #define DR6_INIT        0xffff0ff0
 158 #define DR6_VOLATILE    0x0001e00f
 159
 160 #define DR7_BP_EN_MASK  0x000000ff
 161 #define DR7_GE          (1 << 9)
 162 #define DR7_GD          (1 << 13)
 163 #define DR7_FIXED_1     0x00000400
 164 #define DR7_VOLATILE    0xffff2bff
 165
 166 /* apic attention bits */
 167 #define KVM_APIC_CHECK_VAPIC    0
 168 /*
 169  * The following bit is set with PV-EOI, unset on EOI.
 170  * We detect PV-EOI changes by guest by comparing
 171  * this bit with PV-EOI in guest memory.
 172  * See the implementation in apic_update_pv_eoi.
 173  */
 174 #define KVM_APIC_PV_EOI_PENDING 1
 175
 176 /*
 177  * We don't want allocation failures within the mmu code, so we preallocate
 178  * enough memory for a single page fault in a cache.
 179  */
 180 struct kvm_mmu_memory_cache {
 181         int nobjs;
 182         void *objects[KVM_NR_MEM_OBJS];
 183 };
 184
 185 /*
 186  * kvm_mmu_page_role, below, is defined as:
 187  *
 188  *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
 189  *   bits 4:7 - page table level for this shadow (1-4)
 190  *   bits 8:9 - page table quadrant for 2-level guests
 191  *   bit   16 - direct mapping of virtual to physical mapping at gfn
 192  *              used for real mode and two-dimensional paging
 193  *   bits 17:19 - common access permissions for all ptes in this shadow page
 194  */
 195 union kvm_mmu_page_role {
 196         unsigned word;
 197         struct {
 198                 unsigned level:4;
 199                 unsigned cr4_pae:1;
 200                 unsigned quadrant:2;
 201                 unsigned pad_for_nice_hex_output:6;
 202                 unsigned direct:1;
 203                 unsigned access:3;
 204                 unsigned invalid:1;
 205                 unsigned nxe:1;
 206                 unsigned cr0_wp:1;
 207                 unsigned smep_andnot_wp:1;
 208         };
 209 };
 210
 211 struct kvm_mmu_page {
 212         struct list_head link;
 213         struct hlist_node hash_link;
 214
 215         /*
 216          * The following two entries are used to key the shadow page in the
 217          * hash table.
 218          */
 219         gfn_t gfn;
 220         union kvm_mmu_page_role role;
 221
 222         u64 *spt;
 223         /* hold the gfn of each spte inside spt */
 224         gfn_t *gfns;
 225         bool unsync;
 226         int root_count;          /* Currently serving as active root */
 227         unsigned int unsync_children;
 228         unsigned long parent_ptes;      /* Reverse mapping for parent_pte */
 229
 230         /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen.  */
 231         unsigned long mmu_valid_gen;
 232
 233         DECLARE_BITMAP(unsync_child_bitmap, 512);
 234
 235 #ifdef CONFIG_X86_32
 236         /*
 237          * Used out of the mmu-lock to avoid reading spte values while an
 238          * update is in progress; see the comments in __get_spte_lockless().
 239          */
 240         int clear_spte_count;
 241 #endif
 242
 243         /* Number of writes since the last time traversal visited this page.  */
 244         int write_flooding_count;
 245 };
 246
 247 struct kvm_pio_request {
 248         unsigned long count;
 249         int in;
 250         int port;
 251         int size;
 252 };
 253
 254 /*
 255  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
 256  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
 257  * mode.
 258  */
 259 struct kvm_mmu {
 260         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
 261         unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
 262         u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
 263         int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
 264                           bool prefault);
 265         void (*inject_page_fault)(struct kvm_vcpu *vcpu,
 266                                   struct x86_exception *fault);
 267         gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
 268                             struct x86_exception *exception);
 269         gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
 270         int (*sync_page)(struct kvm_vcpu *vcpu,
 271                          struct kvm_mmu_page *sp);
 272         void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
 273         void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
 274                            u64 *spte, const void *pte);
 275         hpa_t root_hpa;
 276         int root_level;
 277         int shadow_root_level;
 278         union kvm_mmu_page_role base_role;
 279         bool direct_map;
 280
 281         /*
 282          * Bitmap; bit set = permission fault
 283          * Byte index: page fault error code [4:1]
 284          * Bit index: pte permissions in ACC_* format
 285          */
 286         u8 permissions[16];
 287
 288         u64 *pae_root;
 289         u64 *lm_root;
 290         u64 rsvd_bits_mask[2][4];
 291         u64 bad_mt_xwr;
 292
 293         /*
 294          * Bitmap: bit set = last pte in walk
 295          * index[0:1]: level (zero-based)
 296          * index[2]: pte.ps
 297          */
 298         u8 last_pte_bitmap;
 299
 300         bool nx;
 301
 302         u64 pdptrs[4]; /* pae */
 303 };
 304
 305 enum pmc_type {
 306         KVM_PMC_GP = 0,
 307         KVM_PMC_FIXED,
 308 };
 309
 310 struct kvm_pmc {
 311         enum pmc_type type;
 312         u8 idx;
 313         u64 counter;
 314         u64 eventsel;
 315         struct perf_event *perf_event;
 316         struct kvm_vcpu *vcpu;
 317 };
 318
 319 struct kvm_pmu {
 320         unsigned nr_arch_gp_counters;
 321         unsigned nr_arch_fixed_counters;
 322         unsigned available_event_types;
 323         u64 fixed_ctr_ctrl;
 324         u64 global_ctrl;
 325         u64 global_status;
 326         u64 global_ovf_ctrl;
 327         u64 counter_bitmask[2];
 328         u64 global_ctrl_mask;
 329         u64 reserved_bits;
 330         u8 version;
 331         struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
 332         struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
 333         struct irq_work irq_work;
 334         u64 reprogram_pmi;
 335 };
 336
 337 enum {
 338         KVM_DEBUGREG_BP_ENABLED = 1,
 339         KVM_DEBUGREG_WONT_EXIT = 2,
 340 };
 341
 342 struct kvm_vcpu_arch {
 343         /*
 344          * rip and regs accesses must go through
 345          * kvm_{register,rip}_{read,write} functions.
 346          */
 347         unsigned long regs[NR_VCPU_REGS];
 348         u32 regs_avail;
 349         u32 regs_dirty;
 350
 351         unsigned long cr0;
 352         unsigned long cr0_guest_owned_bits;
 353         unsigned long cr2;
 354         unsigned long cr3;
 355         unsigned long cr4;
 356         unsigned long cr4_guest_owned_bits;
 357         unsigned long cr8;
 358         u32 hflags;
 359         u64 efer;
 360         u64 apic_base;
 361         struct kvm_lapic *apic;    /* kernel irqchip context */
 362         unsigned long apic_attention;
 363         int32_t apic_arb_prio;
 364         int mp_state;
 365         u64 ia32_misc_enable_msr;
 366         bool tpr_access_reporting;
 367
 368         /*
 369          * Paging state of the vcpu
 370          *
 371          * If the vcpu runs in guest mode with two level paging this still saves
 372          * the paging mode of the l1 guest. This context is always used to
 373          * handle faults.
 374          */
 375         struct kvm_mmu mmu;
 376
 377         /*
 378          * Paging state of an L2 guest (used for nested npt)
 379          *
 380          * This context will save all necessary information to walk page tables
 381          * of the an L2 guest. This context is only initialized for page table
 382          * walking and not for faulting since we never handle l2 page faults on
 383          * the host.
 384          */
 385         struct kvm_mmu nested_mmu;
 386
 387         /*
 388          * Pointer to the mmu context currently used for
 389          * gva_to_gpa translations.
 390          */
 391         struct kvm_mmu *walk_mmu;
 392
 393         struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
 394         struct kvm_mmu_memory_cache mmu_page_cache;
 395         struct kvm_mmu_memory_cache mmu_page_header_cache;
 396
 397         struct fpu guest_fpu;
 398         u64 xcr0;
 399         u64 guest_supported_xcr0;
 400         u32 guest_xstate_size;
 401
 402         struct kvm_pio_request pio;
 403         void *pio_data;
 404
 405         u8 event_exit_inst_len;
 406
 407         struct kvm_queued_exception {
 408                 bool pending;
 409                 bool has_error_code;
 410                 bool reinject;
 411                 u8 nr;
 412                 u32 error_code;
 413         } exception;
 414
 415         struct kvm_queued_interrupt {
 416                 bool pending;
 417                 bool soft;
 418                 u8 nr;
 419         } interrupt;
 420
 421         int halt_request; /* real mode on Intel only */
 422
 423         int cpuid_nent;
 424         struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
 425         /* emulate context */
 426
 427         struct x86_emulate_ctxt emulate_ctxt;
 428         bool emulate_regs_need_sync_to_vcpu;
 429         bool emulate_regs_need_sync_from_vcpu;
 430         int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
 431
 432         gpa_t time;
 433         struct pvclock_vcpu_time_info hv_clock;
 434         unsigned int hw_tsc_khz;
 435         struct gfn_to_hva_cache pv_time;
 436         bool pv_time_enabled;
 437         /* set guest stopped flag in pvclock flags field */
 438         bool pvclock_set_guest_stopped_request;
 439
 440         struct {
 441                 u64 msr_val;
 442                 u64 last_steal;
 443                 u64 accum_steal;
 444                 struct gfn_to_hva_cache stime;
 445                 struct kvm_steal_time steal;
 446         } st;
 447
 448         u64 last_guest_tsc;
 449         u64 last_host_tsc;
 450         u64 tsc_offset_adjustment;
 451         u64 this_tsc_nsec;
 452         u64 this_tsc_write;
 453         u64 this_tsc_generation;
 454         bool tsc_catchup;
 455         bool tsc_always_catchup;
 456         s8 virtual_tsc_shift;
 457         u32 virtual_tsc_mult;
 458         u32 virtual_tsc_khz;
 459         s64 ia32_tsc_adjust_msr;
 460
 461         atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
 462         unsigned nmi_pending; /* NMI queued after currently running handler */
 463         bool nmi_injected;    /* Trying to inject an NMI this entry */
 464
 465         struct mtrr_state_type mtrr_state;
 466         u64 pat;
 467
 468         unsigned switch_db_regs;
 469         unsigned long db[KVM_NR_DB_REGS];
 470         unsigned long dr6;
 471         unsigned long dr7;
 472         unsigned long eff_db[KVM_NR_DB_REGS];
 473         unsigned long guest_debug_dr7;
 474
 475         u64 mcg_cap;
 476         u64 mcg_status;
 477         u64 mcg_ctl;
 478         u64 *mce_banks;
 479
 480         /* Cache MMIO info */
 481         u64 mmio_gva;
 482         unsigned access;
 483         gfn_t mmio_gfn;
 484
 485         struct kvm_pmu pmu;
 486
 487         /* used for guest single stepping over the given code position */
 488         unsigned long singlestep_rip;
 489
 490         /* fields used by HYPER-V emulation */
 491         u64 hv_vapic;
 492
 493         cpumask_var_t wbinvd_dirty_mask;
 494
 495         unsigned long last_retry_eip;
 496         unsigned long last_retry_addr;
 497
 498         struct {
 499                 bool halted;
 500                 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
 501                 struct gfn_to_hva_cache data;
 502                 u64 msr_val;
 503                 u32 id;
 504                 bool send_user_only;
 505         } apf;
 506
 507         /* OSVW MSRs (AMD only) */
 508         struct {
 509                 u64 length;
 510                 u64 status;
 511         } osvw;
 512
 513         struct {
 514                 u64 msr_val;
 515                 struct gfn_to_hva_cache data;
 516         } pv_eoi;
 517
 518         /*
 519          * Indicate whether the access faults on its page table in guest
 520          * which is set when fix page fault and used to detect unhandeable
 521          * instruction.
 522          */
 523         bool write_fault_to_shadow_pgtable;
 524
 525         /* set at EPT violation at this point */
 526         unsigned long exit_qualification;
 527
 528         /* pv related host specific info */
 529         struct {
 530                 bool pv_unhalted;
 531         } pv;
 532 };
 533
 534 struct kvm_lpage_info {
 535         int write_count;
 536 };
 537
 538 struct kvm_arch_memory_slot {
 539         unsigned long *rmap[KVM_NR_PAGE_SIZES];
 540         struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
 541 };
 542
 543 struct kvm_apic_map {
 544         struct rcu_head rcu;
 545         u8 ldr_bits;
 546         /* fields bellow are used to decode ldr values in different modes */
 547         u32 cid_shift, cid_mask, lid_mask;
 548         struct kvm_lapic *phys_map[256];
 549         /* first index is cluster id second is cpu id in a cluster */
 550         struct kvm_lapic *logical_map[16][16];
 551 };
 552
 553 struct kvm_arch {
 554         unsigned int n_used_mmu_pages;
 555         unsigned int n_requested_mmu_pages;
 556         unsigned int n_max_mmu_pages;
 557         unsigned int indirect_shadow_pages;
 558         unsigned long mmu_valid_gen;
 559         struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
 560         /*
 561          * Hash table of struct kvm_mmu_page.
 562          */
 563         struct list_head active_mmu_pages;
 564         struct list_head zapped_obsolete_pages;
 565
 566         struct list_head assigned_dev_head;
 567         struct iommu_domain *iommu_domain;
 568         bool iommu_noncoherent;
 569 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
 570         atomic_t noncoherent_dma_count;
 571         struct kvm_pic *vpic;
 572         struct kvm_ioapic *vioapic;
 573         struct kvm_pit *vpit;
 574         int vapics_in_nmi_mode;
 575         struct mutex apic_map_lock;
 576         struct kvm_apic_map *apic_map;
 577
 578         unsigned int tss_addr;
 579         struct page *apic_access_page;
 580
 581         gpa_t wall_clock;
 582
 583         struct page *ept_identity_pagetable;
 584         bool ept_identity_pagetable_done;
 585         gpa_t ept_identity_map_addr;
 586
 587         unsigned long irq_sources_bitmap;
 588         s64 kvmclock_offset;
 589         raw_spinlock_t tsc_write_lock;
 590         u64 last_tsc_nsec;
 591         u64 last_tsc_write;
 592         u32 last_tsc_khz;
 593         u64 cur_tsc_nsec;
 594         u64 cur_tsc_write;
 595         u64 cur_tsc_offset;
 596         u64 cur_tsc_generation;
 597         int nr_vcpus_matched_tsc;
 598
 599         spinlock_t pvclock_gtod_sync_lock;
 600         bool use_master_clock;
 601         u64 master_kernel_ns;
 602         cycle_t master_cycle_now;
 603         struct delayed_work kvmclock_update_work;
 604         struct delayed_work kvmclock_sync_work;
 605
 606         struct kvm_xen_hvm_config xen_hvm_config;
 607
 608         /* fields used by HYPER-V emulation */
 609         u64 hv_guest_os_id;
 610         u64 hv_hypercall;
 611         u64 hv_tsc_page;
 612
 613         #ifdef CONFIG_KVM_MMU_AUDIT
 614         int audit_point;
 615         #endif
 616 };
 617
 618 struct kvm_vm_stat {
 619         u32 mmu_shadow_zapped;
 620         u32 mmu_pte_write;
 621         u32 mmu_pte_updated;
 622         u32 mmu_pde_zapped;
 623         u32 mmu_flooded;
 624         u32 mmu_recycled;
 625         u32 mmu_cache_miss;
 626         u32 mmu_unsync;
 627         u32 remote_tlb_flush;
 628         u32 lpages;
 629 };
 630
 631 struct kvm_vcpu_stat {
 632         u32 pf_fixed;
 633         u32 pf_guest;
 634         u32 tlb_flush;
 635         u32 invlpg;
 636
 637         u32 exits;
 638         u32 io_exits;
 639         u32 mmio_exits;
 640         u32 signal_exits;
 641         u32 irq_window_exits;
 642         u32 nmi_window_exits;
 643         u32 halt_exits;
 644         u32 halt_wakeup;
 645         u32 request_irq_exits;
 646         u32 irq_exits;
 647         u32 host_state_reload;
 648         u32 efer_reload;
 649         u32 fpu_reload;
 650         u32 insn_emulation;
 651         u32 insn_emulation_fail;
 652         u32 hypercalls;
 653         u32 irq_injections;
 654         u32 nmi_injections;
 655 };
 656
 657 struct x86_instruction_info;
 658
 659 struct msr_data {
 660         bool host_initiated;
 661         u32 index;
 662         u64 data;
 663 };
 664
 665 struct kvm_x86_ops {
 666         int (*cpu_has_kvm_support)(void);          /* __init */
 667         int (*disabled_by_bios)(void);             /* __init */
 668         int (*hardware_enable)(void *dummy);
 669         void (*hardware_disable)(void *dummy);
 670         void (*check_processor_compatibility)(void *rtn);
 671         int (*hardware_setup)(void);               /* __init */
 672         void (*hardware_unsetup)(void);            /* __exit */
 673         bool (*cpu_has_accelerated_tpr)(void);
 674         void (*cpuid_update)(struct kvm_vcpu *vcpu);
 675
 676         /* Create, but do not attach this VCPU */
 677         struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
 678         void (*vcpu_free)(struct kvm_vcpu *vcpu);
 679         void (*vcpu_reset)(struct kvm_vcpu *vcpu);
 680
 681         void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
 682         void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
 683         void (*vcpu_put)(struct kvm_vcpu *vcpu);
 684
 685         void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
 686         int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
 687         int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
 688         u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
 689         void (*get_segment)(struct kvm_vcpu *vcpu,
 690                             struct kvm_segment *var, int seg);
 691         int (*get_cpl)(struct kvm_vcpu *vcpu);
 692         void (*set_segment)(struct kvm_vcpu *vcpu,
 693                             struct kvm_segment *var, int seg);
 694         void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
 695         void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
 696         void (*decache_cr3)(struct kvm_vcpu *vcpu);
 697         void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
 698         void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
 699         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
 700         int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
 701         void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
 702         void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 703         void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 704         void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 705         void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 706         u64 (*get_dr6)(struct kvm_vcpu *vcpu);
 707         void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
 708         void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
 709         void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
 710         void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
 711         unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
 712         void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
 713         void (*fpu_activate)(struct kvm_vcpu *vcpu);
 714         void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
 715
 716         void (*tlb_flush)(struct kvm_vcpu *vcpu);
 717
 718         void (*run)(struct kvm_vcpu *vcpu);
 719         int (*handle_exit)(struct kvm_vcpu *vcpu);
 720         void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
 721         void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
 722         u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
 723         void (*patch_hypercall)(struct kvm_vcpu *vcpu,
 724                                 unsigned char *hypercall_addr);
 725         void (*set_irq)(struct kvm_vcpu *vcpu);
 726         void (*set_nmi)(struct kvm_vcpu *vcpu);
 727         void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
 728                                 bool has_error_code, u32 error_code,
 729                                 bool reinject);
 730         void (*cancel_injection)(struct kvm_vcpu *vcpu);
 731         int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
 732         int (*nmi_allowed)(struct kvm_vcpu *vcpu);
 733         bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
 734         void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
 735         void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
 736         void (*enable_irq_window)(struct kvm_vcpu *vcpu);
 737         void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
 738         int (*vm_has_apicv)(struct kvm *kvm);
 739         void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
 740         void (*hwapic_isr_update)(struct kvm *kvm, int isr);
 741         void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
 742         void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
 743         void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
 744         void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
 745         int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
 746         int (*get_tdp_level)(void);
 747         u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
 748         int (*get_lpage_level)(void);
 749         bool (*rdtscp_supported)(void);
 750         bool (*invpcid_supported)(void);
 751         void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
 752
 753         void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
 754
 755         void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
 756
 757         bool (*has_wbinvd_exit)(void);
 758
 759         void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
 760         u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
 761         void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
 762
 763         u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
 764         u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
 765
 766         void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
 767
 768         int (*check_intercept)(struct kvm_vcpu *vcpu,
 769                                struct x86_instruction_info *info,
 770                                enum x86_intercept_stage stage);
 771         void (*handle_external_intr)(struct kvm_vcpu *vcpu);
 772         bool (*mpx_supported)(void);
 773
 774         int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
 775 };
 776
 777 struct kvm_arch_async_pf {
 778         u32 token;
 779         gfn_t gfn;
 780         unsigned long cr3;
 781         bool direct_map;
 782 };
 783
 784 extern struct kvm_x86_ops *kvm_x86_ops;
 785
 786 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
 787                                            s64 adjustment)
 788 {
 789         kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
 790 }
 791
 792 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
 793 {
 794         kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
 795 }
 796
 797 int kvm_mmu_module_init(void);
 798 void kvm_mmu_module_exit(void);
 799
 800 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
 801 int kvm_mmu_create(struct kvm_vcpu *vcpu);
 802 void kvm_mmu_setup(struct kvm_vcpu *vcpu);
 803 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
 804                 u64 dirty_mask, u64 nx_mask, u64 x_mask);
 805
 806 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
 807 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
 808 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
 809                                      struct kvm_memory_slot *slot,
 810                                      gfn_t gfn_offset, unsigned long mask);
 811 void kvm_mmu_zap_all(struct kvm *kvm);
 812 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm);
 813 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
 814 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
 815
 816 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
 817
 818 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
 819                           const void *val, int bytes);
 820 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
 821
 822 extern bool tdp_enabled;
 823
 824 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
 825
 826 /* control of guest tsc rate supported? */
 827 extern bool kvm_has_tsc_control;
 828 /* minimum supported tsc_khz for guests */
 829 extern u32  kvm_min_guest_tsc_khz;
 830 /* maximum supported tsc_khz for guests */
 831 extern u32  kvm_max_guest_tsc_khz;
 832
 833 enum emulation_result {
 834         EMULATE_DONE,         /* no further processing */
 835         EMULATE_USER_EXIT,    /* kvm_run ready for userspace exit */
 836         EMULATE_FAIL,         /* can't emulate this instruction */
 837 };
 838
 839 #define EMULTYPE_NO_DECODE          (1 << 0)
 840 #define EMULTYPE_TRAP_UD            (1 << 1)
 841 #define EMULTYPE_SKIP               (1 << 2)
 842 #define EMULTYPE_RETRY              (1 << 3)
 843 #define EMULTYPE_NO_REEXECUTE       (1 << 4)
 844 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
 845                             int emulation_type, void *insn, int insn_len);
 846
 847 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
 848                         int emulation_type)
 849 {
 850         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
 851 }
 852
 853 void kvm_enable_efer_bits(u64);
 854 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
 855 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
 856 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
 857
 858 struct x86_emulate_ctxt;
 859
 860 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
 861 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
 862 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
 863 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
 864
 865 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
 866 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
 867 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector);
 868
 869 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
 870                     int reason, bool has_error_code, u32 error_code);
 871
 872 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
 873 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
 874 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
 875 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
 876 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
 877 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
 878 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
 879 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
 880 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
 881 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
 882
 883 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
 884 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
 885
 886 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
 887 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 888 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
 889
 890 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
 891 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
 892 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
 893 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
 894 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
 895 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 896                             gfn_t gfn, void *data, int offset, int len,
 897                             u32 access);
 898 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
 899 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
 900
 901 static inline int __kvm_irq_line_state(unsigned long *irq_state,
 902                                        int irq_source_id, int level)
 903 {
 904         /* Logical OR for level trig interrupt */
 905         if (level)
 906                 __set_bit(irq_source_id, irq_state);
 907         else
 908                 __clear_bit(irq_source_id, irq_state);
 909
 910         return !!(*irq_state);
 911 }
 912
 913 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
 914 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
 915
 916 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
 917
 918 int fx_init(struct kvm_vcpu *vcpu);
 919
 920 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
 921 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
 922                        const u8 *new, int bytes);
 923 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
 924 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
 925 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
 926 int kvm_mmu_load(struct kvm_vcpu *vcpu);
 927 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
 928 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
 929 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
 930 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
 931                               struct x86_exception *exception);
 932 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
 933                                struct x86_exception *exception);
 934 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
 935                                struct x86_exception *exception);
 936 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
 937                                 struct x86_exception *exception);
 938
 939 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
 940
 941 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
 942                        void *insn, int insn_len);
 943 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
 944 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu);
 945
 946 void kvm_enable_tdp(void);
 947 void kvm_disable_tdp(void);
 948
 949 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
 950 {
 951         return gpa;
 952 }
 953
 954 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
 955 {
 956         struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
 957
 958         return (struct kvm_mmu_page *)page_private(page);
 959 }
 960
 961 static inline u16 kvm_read_ldt(void)
 962 {
 963         u16 ldt;
 964         asm("sldt %0" : "=g"(ldt));
 965         return ldt;
 966 }
 967
 968 static inline void kvm_load_ldt(u16 sel)
 969 {
 970         asm("lldt %0" : : "rm"(sel));
 971 }
 972
 973 #ifdef CONFIG_X86_64
 974 static inline unsigned long read_msr(unsigned long msr)
 975 {
 976         u64 value;
 977
 978         rdmsrl(msr, value);
 979         return value;
 980 }
 981 #endif
 982
 983 static inline u32 get_rdx_init_val(void)
 984 {
 985         return 0x600; /* P6 family */
 986 }
 987
 988 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
 989 {
 990         kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
 991 }
 992
 993 #define TSS_IOPB_BASE_OFFSET 0x66
 994 #define TSS_BASE_SIZE 0x68
 995 #define TSS_IOPB_SIZE (65536 / 8)
 996 #define TSS_REDIRECTION_SIZE (256 / 8)
 997 #define RMODE_TSS_SIZE                                                  \
 998         (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
 999
1000 enum {
1001         TASK_SWITCH_CALL = 0,
1002         TASK_SWITCH_IRET = 1,
1003         TASK_SWITCH_JMP = 2,
1004         TASK_SWITCH_GATE = 3,
1005 };
1006
1007 #define HF_GIF_MASK             (1 << 0)
1008 #define HF_HIF_MASK             (1 << 1)
1009 #define HF_VINTR_MASK           (1 << 2)
1010 #define HF_NMI_MASK             (1 << 3)
1011 #define HF_IRET_MASK            (1 << 4)
1012 #define HF_GUEST_MASK           (1 << 5) /* VCPU is in guest-mode */
1013
1014 /*
1015  * Hardware virtualization extension instructions may fault if a
1016  * reboot turns off virtualization while processes are running.
1017  * Trap the fault and ignore the instruction if that happens.
1018  */
1019 asmlinkage void kvm_spurious_fault(void);
1020
1021 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn)      \
1022         "666: " insn "\n\t" \
1023         "668: \n\t"                           \
1024         ".pushsection .fixup, \"ax\" \n" \
1025         "667: \n\t" \
1026         cleanup_insn "\n\t"                   \
1027         "cmpb $0, kvm_rebooting \n\t"         \
1028         "jne 668b \n\t"                       \
1029         __ASM_SIZE(push) " $666b \n\t"        \
1030         "call kvm_spurious_fault \n\t"        \
1031         ".popsection \n\t" \
1032         _ASM_EXTABLE(666b, 667b)
1033
1034 #define __kvm_handle_fault_on_reboot(insn)              \
1035         ____kvm_handle_fault_on_reboot(insn, "")
1036
1037 #define KVM_ARCH_WANT_MMU_NOTIFIER
1038 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1039 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1040 int kvm_age_hva(struct kvm *kvm, unsigned long hva);
1041 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1042 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1043 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
1044 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1045 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1046 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1047 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1048 void kvm_vcpu_reset(struct kvm_vcpu *vcpu);
1049
1050 void kvm_define_shared_msr(unsigned index, u32 msr);
1051 void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1052
1053 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1054
1055 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1056                                      struct kvm_async_pf *work);
1057 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1058                                  struct kvm_async_pf *work);
1059 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1060                                struct kvm_async_pf *work);
1061 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1062 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1063
1064 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1065
1066 int kvm_is_in_guest(void);
1067
1068 void kvm_pmu_init(struct kvm_vcpu *vcpu);
1069 void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
1070 void kvm_pmu_reset(struct kvm_vcpu *vcpu);
1071 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
1072 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
1073 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
1074 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
1075 int kvm_pmu_check_pmc(struct kvm_vcpu *vcpu, unsigned pmc);
1076 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
1077 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
1078 void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
1079
1080 #endif /* _ASM_X86_KVM_HOST_H */