Merge branch 'regmap-linus' into regmap-next
[deliverable/linux.git] / arch / x86 / include / asm / mrst.h
1 /*
2 * mrst.h: Intel Moorestown platform specific setup code
3 *
4 * (C) Copyright 2009 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; version 2
9 * of the License.
10 */
11 #ifndef _ASM_X86_MRST_H
12 #define _ASM_X86_MRST_H
13
14 #include <linux/sfi.h>
15
16 extern int pci_mrst_init(void);
17 extern int __init sfi_parse_mrtc(struct sfi_table_header *table);
18 extern int sfi_mrtc_num;
19 extern struct sfi_rtc_table_entry sfi_mrtc_array[];
20
21 /*
22 * Medfield is the follow-up of Moorestown, it combines two chip solution into
23 * one. Other than that it also added always-on and constant tsc and lapic
24 * timers. Medfield is the platform name, and the chip name is called Penwell
25 * we treat Medfield/Penwell as a variant of Moorestown. Penwell can be
26 * identified via MSRs.
27 */
28 enum mrst_cpu_type {
29 MRST_CPU_CHIP_LINCROFT = 1,
30 MRST_CPU_CHIP_PENWELL,
31 };
32
33 extern enum mrst_cpu_type __mrst_cpu_chip;
34 static inline enum mrst_cpu_type mrst_identify_cpu(void)
35 {
36 return __mrst_cpu_chip;
37 }
38
39 enum mrst_timer_options {
40 MRST_TIMER_DEFAULT,
41 MRST_TIMER_APBT_ONLY,
42 MRST_TIMER_LAPIC_APBT,
43 };
44
45 extern enum mrst_timer_options mrst_timer_options;
46
47 #define SFI_MTMR_MAX_NUM 8
48 #define SFI_MRTC_MAX 8
49
50 extern struct console early_mrst_console;
51 extern void mrst_early_console_init(void);
52
53 extern struct console early_hsu_console;
54 extern void hsu_early_console_init(void);
55
56 extern void intel_scu_devices_create(void);
57 extern void intel_scu_devices_destroy(void);
58
59 /* VRTC timer */
60 #define MRST_VRTC_MAP_SZ (1024)
61 /*#define MRST_VRTC_PGOFFSET (0xc00) */
62
63 extern void mrst_rtc_init(void);
64
65 #endif /* _ASM_X86_MRST_H */
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