Merge branches 'arnd-randcfg-fixes', 'debug', 'io' (early part), 'l2x0', 'p2v', ...
[deliverable/linux.git] / arch / x86 / include / asm / paravirt_types.h
1 #ifndef _ASM_X86_PARAVIRT_TYPES_H
2 #define _ASM_X86_PARAVIRT_TYPES_H
3
4 /* Bitmask of what can be clobbered: usually at least eax. */
5 #define CLBR_NONE 0
6 #define CLBR_EAX (1 << 0)
7 #define CLBR_ECX (1 << 1)
8 #define CLBR_EDX (1 << 2)
9 #define CLBR_EDI (1 << 3)
10
11 #ifdef CONFIG_X86_32
12 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
13 #define CLBR_ANY ((1 << 4) - 1)
14
15 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
16 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
17 #define CLBR_SCRATCH (0)
18 #else
19 #define CLBR_RAX CLBR_EAX
20 #define CLBR_RCX CLBR_ECX
21 #define CLBR_RDX CLBR_EDX
22 #define CLBR_RDI CLBR_EDI
23 #define CLBR_RSI (1 << 4)
24 #define CLBR_R8 (1 << 5)
25 #define CLBR_R9 (1 << 6)
26 #define CLBR_R10 (1 << 7)
27 #define CLBR_R11 (1 << 8)
28
29 #define CLBR_ANY ((1 << 9) - 1)
30
31 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
32 CLBR_RCX | CLBR_R8 | CLBR_R9)
33 #define CLBR_RET_REG (CLBR_RAX)
34 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
35
36 #endif /* X86_64 */
37
38 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
39
40 #ifndef __ASSEMBLY__
41
42 #include <asm/desc_defs.h>
43 #include <asm/kmap_types.h>
44 #include <asm/pgtable_types.h>
45
46 struct page;
47 struct thread_struct;
48 struct desc_ptr;
49 struct tss_struct;
50 struct mm_struct;
51 struct desc_struct;
52 struct task_struct;
53 struct cpumask;
54
55 /*
56 * Wrapper type for pointers to code which uses the non-standard
57 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
58 */
59 struct paravirt_callee_save {
60 void *func;
61 };
62
63 /* general info */
64 struct pv_info {
65 unsigned int kernel_rpl;
66 int shared_kernel_pmd;
67
68 #ifdef CONFIG_X86_64
69 u16 extra_user_64bit_cs; /* __USER_CS if none */
70 #endif
71
72 int paravirt_enabled;
73 const char *name;
74 };
75
76 struct pv_init_ops {
77 /*
78 * Patch may replace one of the defined code sequences with
79 * arbitrary code, subject to the same register constraints.
80 * This generally means the code is not free to clobber any
81 * registers other than EAX. The patch function should return
82 * the number of bytes of code generated, as we nop pad the
83 * rest in generic code.
84 */
85 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
86 unsigned long addr, unsigned len);
87 };
88
89
90 struct pv_lazy_ops {
91 /* Set deferred update mode, used for batching operations. */
92 void (*enter)(void);
93 void (*leave)(void);
94 };
95
96 struct pv_time_ops {
97 unsigned long long (*sched_clock)(void);
98 unsigned long long (*steal_clock)(int cpu);
99 unsigned long (*get_tsc_khz)(void);
100 };
101
102 struct pv_cpu_ops {
103 /* hooks for various privileged instructions */
104 unsigned long (*get_debugreg)(int regno);
105 void (*set_debugreg)(int regno, unsigned long value);
106
107 void (*clts)(void);
108
109 unsigned long (*read_cr0)(void);
110 void (*write_cr0)(unsigned long);
111
112 unsigned long (*read_cr4_safe)(void);
113 unsigned long (*read_cr4)(void);
114 void (*write_cr4)(unsigned long);
115
116 #ifdef CONFIG_X86_64
117 unsigned long (*read_cr8)(void);
118 void (*write_cr8)(unsigned long);
119 #endif
120
121 /* Segment descriptor handling */
122 void (*load_tr_desc)(void);
123 void (*load_gdt)(const struct desc_ptr *);
124 void (*load_idt)(const struct desc_ptr *);
125 void (*store_gdt)(struct desc_ptr *);
126 void (*store_idt)(struct desc_ptr *);
127 void (*set_ldt)(const void *desc, unsigned entries);
128 unsigned long (*store_tr)(void);
129 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
130 #ifdef CONFIG_X86_64
131 void (*load_gs_index)(unsigned int idx);
132 #endif
133 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
134 const void *desc);
135 void (*write_gdt_entry)(struct desc_struct *,
136 int entrynum, const void *desc, int size);
137 void (*write_idt_entry)(gate_desc *,
138 int entrynum, const gate_desc *gate);
139 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
140 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
141
142 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
143
144 void (*set_iopl_mask)(unsigned mask);
145
146 void (*wbinvd)(void);
147 void (*io_delay)(void);
148
149 /* cpuid emulation, mostly so that caps bits can be disabled */
150 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
151 unsigned int *ecx, unsigned int *edx);
152
153 /* MSR, PMC and TSR operations.
154 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
155 u64 (*read_msr)(unsigned int msr, int *err);
156 int (*rdmsr_regs)(u32 *regs);
157 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
158 int (*wrmsr_regs)(u32 *regs);
159
160 u64 (*read_tsc)(void);
161 u64 (*read_pmc)(int counter);
162 unsigned long long (*read_tscp)(unsigned int *aux);
163
164 /*
165 * Atomically enable interrupts and return to userspace. This
166 * is only ever used to return to 32-bit processes; in a
167 * 64-bit kernel, it's used for 32-on-64 compat processes, but
168 * never native 64-bit processes. (Jump, not call.)
169 */
170 void (*irq_enable_sysexit)(void);
171
172 /*
173 * Switch to usermode gs and return to 64-bit usermode using
174 * sysret. Only used in 64-bit kernels to return to 64-bit
175 * processes. Usermode register state, including %rsp, must
176 * already be restored.
177 */
178 void (*usergs_sysret64)(void);
179
180 /*
181 * Switch to usermode gs and return to 32-bit usermode using
182 * sysret. Used to return to 32-on-64 compat processes.
183 * Other usermode register state, including %esp, must already
184 * be restored.
185 */
186 void (*usergs_sysret32)(void);
187
188 /* Normal iret. Jump to this with the standard iret stack
189 frame set up. */
190 void (*iret)(void);
191
192 void (*swapgs)(void);
193
194 void (*start_context_switch)(struct task_struct *prev);
195 void (*end_context_switch)(struct task_struct *next);
196 };
197
198 struct pv_irq_ops {
199 /*
200 * Get/set interrupt state. save_fl and restore_fl are only
201 * expected to use X86_EFLAGS_IF; all other bits
202 * returned from save_fl are undefined, and may be ignored by
203 * restore_fl.
204 *
205 * NOTE: These functions callers expect the callee to preserve
206 * more registers than the standard C calling convention.
207 */
208 struct paravirt_callee_save save_fl;
209 struct paravirt_callee_save restore_fl;
210 struct paravirt_callee_save irq_disable;
211 struct paravirt_callee_save irq_enable;
212
213 void (*safe_halt)(void);
214 void (*halt)(void);
215
216 #ifdef CONFIG_X86_64
217 void (*adjust_exception_frame)(void);
218 #endif
219 };
220
221 struct pv_apic_ops {
222 #ifdef CONFIG_X86_LOCAL_APIC
223 void (*startup_ipi_hook)(int phys_apicid,
224 unsigned long start_eip,
225 unsigned long start_esp);
226 #endif
227 };
228
229 struct pv_mmu_ops {
230 unsigned long (*read_cr2)(void);
231 void (*write_cr2)(unsigned long);
232
233 unsigned long (*read_cr3)(void);
234 void (*write_cr3)(unsigned long);
235
236 /*
237 * Hooks for intercepting the creation/use/destruction of an
238 * mm_struct.
239 */
240 void (*activate_mm)(struct mm_struct *prev,
241 struct mm_struct *next);
242 void (*dup_mmap)(struct mm_struct *oldmm,
243 struct mm_struct *mm);
244 void (*exit_mmap)(struct mm_struct *mm);
245
246
247 /* TLB operations */
248 void (*flush_tlb_user)(void);
249 void (*flush_tlb_kernel)(void);
250 void (*flush_tlb_single)(unsigned long addr);
251 void (*flush_tlb_others)(const struct cpumask *cpus,
252 struct mm_struct *mm,
253 unsigned long va);
254
255 /* Hooks for allocating and freeing a pagetable top-level */
256 int (*pgd_alloc)(struct mm_struct *mm);
257 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
258
259 /*
260 * Hooks for allocating/releasing pagetable pages when they're
261 * attached to a pagetable
262 */
263 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
264 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
265 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
266 void (*release_pte)(unsigned long pfn);
267 void (*release_pmd)(unsigned long pfn);
268 void (*release_pud)(unsigned long pfn);
269
270 /* Pagetable manipulation functions */
271 void (*set_pte)(pte_t *ptep, pte_t pteval);
272 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
273 pte_t *ptep, pte_t pteval);
274 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
275 void (*set_pmd_at)(struct mm_struct *mm, unsigned long addr,
276 pmd_t *pmdp, pmd_t pmdval);
277 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
278 pte_t *ptep);
279 void (*pte_update_defer)(struct mm_struct *mm,
280 unsigned long addr, pte_t *ptep);
281 void (*pmd_update)(struct mm_struct *mm, unsigned long addr,
282 pmd_t *pmdp);
283 void (*pmd_update_defer)(struct mm_struct *mm,
284 unsigned long addr, pmd_t *pmdp);
285
286 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
287 pte_t *ptep);
288 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
289 pte_t *ptep, pte_t pte);
290
291 struct paravirt_callee_save pte_val;
292 struct paravirt_callee_save make_pte;
293
294 struct paravirt_callee_save pgd_val;
295 struct paravirt_callee_save make_pgd;
296
297 #if PAGETABLE_LEVELS >= 3
298 #ifdef CONFIG_X86_PAE
299 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
300 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
301 pte_t *ptep);
302 void (*pmd_clear)(pmd_t *pmdp);
303
304 #endif /* CONFIG_X86_PAE */
305
306 void (*set_pud)(pud_t *pudp, pud_t pudval);
307
308 struct paravirt_callee_save pmd_val;
309 struct paravirt_callee_save make_pmd;
310
311 #if PAGETABLE_LEVELS == 4
312 struct paravirt_callee_save pud_val;
313 struct paravirt_callee_save make_pud;
314
315 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
316 #endif /* PAGETABLE_LEVELS == 4 */
317 #endif /* PAGETABLE_LEVELS >= 3 */
318
319 struct pv_lazy_ops lazy_mode;
320
321 /* dom0 ops */
322
323 /* Sometimes the physical address is a pfn, and sometimes its
324 an mfn. We can tell which is which from the index. */
325 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
326 phys_addr_t phys, pgprot_t flags);
327 };
328
329 struct arch_spinlock;
330 struct pv_lock_ops {
331 int (*spin_is_locked)(struct arch_spinlock *lock);
332 int (*spin_is_contended)(struct arch_spinlock *lock);
333 void (*spin_lock)(struct arch_spinlock *lock);
334 void (*spin_lock_flags)(struct arch_spinlock *lock, unsigned long flags);
335 int (*spin_trylock)(struct arch_spinlock *lock);
336 void (*spin_unlock)(struct arch_spinlock *lock);
337 };
338
339 /* This contains all the paravirt structures: we get a convenient
340 * number for each function using the offset which we use to indicate
341 * what to patch. */
342 struct paravirt_patch_template {
343 struct pv_init_ops pv_init_ops;
344 struct pv_time_ops pv_time_ops;
345 struct pv_cpu_ops pv_cpu_ops;
346 struct pv_irq_ops pv_irq_ops;
347 struct pv_apic_ops pv_apic_ops;
348 struct pv_mmu_ops pv_mmu_ops;
349 struct pv_lock_ops pv_lock_ops;
350 };
351
352 extern struct pv_info pv_info;
353 extern struct pv_init_ops pv_init_ops;
354 extern struct pv_time_ops pv_time_ops;
355 extern struct pv_cpu_ops pv_cpu_ops;
356 extern struct pv_irq_ops pv_irq_ops;
357 extern struct pv_apic_ops pv_apic_ops;
358 extern struct pv_mmu_ops pv_mmu_ops;
359 extern struct pv_lock_ops pv_lock_ops;
360
361 #define PARAVIRT_PATCH(x) \
362 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
363
364 #define paravirt_type(op) \
365 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
366 [paravirt_opptr] "i" (&(op))
367 #define paravirt_clobber(clobber) \
368 [paravirt_clobber] "i" (clobber)
369
370 /*
371 * Generate some code, and mark it as patchable by the
372 * apply_paravirt() alternate instruction patcher.
373 */
374 #define _paravirt_alt(insn_string, type, clobber) \
375 "771:\n\t" insn_string "\n" "772:\n" \
376 ".pushsection .parainstructions,\"a\"\n" \
377 _ASM_ALIGN "\n" \
378 _ASM_PTR " 771b\n" \
379 " .byte " type "\n" \
380 " .byte 772b-771b\n" \
381 " .short " clobber "\n" \
382 ".popsection\n"
383
384 /* Generate patchable code, with the default asm parameters. */
385 #define paravirt_alt(insn_string) \
386 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
387
388 /* Simple instruction patching code. */
389 #define DEF_NATIVE(ops, name, code) \
390 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
391 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
392
393 unsigned paravirt_patch_nop(void);
394 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
395 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
396 unsigned paravirt_patch_ignore(unsigned len);
397 unsigned paravirt_patch_call(void *insnbuf,
398 const void *target, u16 tgt_clobbers,
399 unsigned long addr, u16 site_clobbers,
400 unsigned len);
401 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
402 unsigned long addr, unsigned len);
403 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
404 unsigned long addr, unsigned len);
405
406 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
407 const char *start, const char *end);
408
409 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
410 unsigned long addr, unsigned len);
411
412 int paravirt_disable_iospace(void);
413
414 /*
415 * This generates an indirect call based on the operation type number.
416 * The type number, computed in PARAVIRT_PATCH, is derived from the
417 * offset into the paravirt_patch_template structure, and can therefore be
418 * freely converted back into a structure offset.
419 */
420 #define PARAVIRT_CALL "call *%c[paravirt_opptr];"
421
422 /*
423 * These macros are intended to wrap calls through one of the paravirt
424 * ops structs, so that they can be later identified and patched at
425 * runtime.
426 *
427 * Normally, a call to a pv_op function is a simple indirect call:
428 * (pv_op_struct.operations)(args...).
429 *
430 * Unfortunately, this is a relatively slow operation for modern CPUs,
431 * because it cannot necessarily determine what the destination
432 * address is. In this case, the address is a runtime constant, so at
433 * the very least we can patch the call to e a simple direct call, or
434 * ideally, patch an inline implementation into the callsite. (Direct
435 * calls are essentially free, because the call and return addresses
436 * are completely predictable.)
437 *
438 * For i386, these macros rely on the standard gcc "regparm(3)" calling
439 * convention, in which the first three arguments are placed in %eax,
440 * %edx, %ecx (in that order), and the remaining arguments are placed
441 * on the stack. All caller-save registers (eax,edx,ecx) are expected
442 * to be modified (either clobbered or used for return values).
443 * X86_64, on the other hand, already specifies a register-based calling
444 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
445 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
446 * special handling for dealing with 4 arguments, unlike i386.
447 * However, x86_64 also have to clobber all caller saved registers, which
448 * unfortunately, are quite a bit (r8 - r11)
449 *
450 * The call instruction itself is marked by placing its start address
451 * and size into the .parainstructions section, so that
452 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
453 * appropriate patching under the control of the backend pv_init_ops
454 * implementation.
455 *
456 * Unfortunately there's no way to get gcc to generate the args setup
457 * for the call, and then allow the call itself to be generated by an
458 * inline asm. Because of this, we must do the complete arg setup and
459 * return value handling from within these macros. This is fairly
460 * cumbersome.
461 *
462 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
463 * It could be extended to more arguments, but there would be little
464 * to be gained from that. For each number of arguments, there are
465 * the two VCALL and CALL variants for void and non-void functions.
466 *
467 * When there is a return value, the invoker of the macro must specify
468 * the return type. The macro then uses sizeof() on that type to
469 * determine whether its a 32 or 64 bit value, and places the return
470 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
471 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
472 * the return value size.
473 *
474 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
475 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
476 * in low,high order
477 *
478 * Small structures are passed and returned in registers. The macro
479 * calling convention can't directly deal with this, so the wrapper
480 * functions must do this.
481 *
482 * These PVOP_* macros are only defined within this header. This
483 * means that all uses must be wrapped in inline functions. This also
484 * makes sure the incoming and outgoing types are always correct.
485 */
486 #ifdef CONFIG_X86_32
487 #define PVOP_VCALL_ARGS \
488 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
489 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
490
491 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
492 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
493 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
494
495 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
496 "=c" (__ecx)
497 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
498
499 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
500 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
501
502 #define EXTRA_CLOBBERS
503 #define VEXTRA_CLOBBERS
504 #else /* CONFIG_X86_64 */
505 /* [re]ax isn't an arg, but the return val */
506 #define PVOP_VCALL_ARGS \
507 unsigned long __edi = __edi, __esi = __esi, \
508 __edx = __edx, __ecx = __ecx, __eax = __eax
509 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
510
511 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
512 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
513 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
514 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
515
516 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
517 "=S" (__esi), "=d" (__edx), \
518 "=c" (__ecx)
519 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
520
521 /* void functions are still allowed [re]ax for scratch */
522 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
523 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
524
525 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
526 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
527 #endif /* CONFIG_X86_32 */
528
529 #ifdef CONFIG_PARAVIRT_DEBUG
530 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
531 #else
532 #define PVOP_TEST_NULL(op) ((void)op)
533 #endif
534
535 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
536 pre, post, ...) \
537 ({ \
538 rettype __ret; \
539 PVOP_CALL_ARGS; \
540 PVOP_TEST_NULL(op); \
541 /* This is 32-bit specific, but is okay in 64-bit */ \
542 /* since this condition will never hold */ \
543 if (sizeof(rettype) > sizeof(unsigned long)) { \
544 asm volatile(pre \
545 paravirt_alt(PARAVIRT_CALL) \
546 post \
547 : call_clbr \
548 : paravirt_type(op), \
549 paravirt_clobber(clbr), \
550 ##__VA_ARGS__ \
551 : "memory", "cc" extra_clbr); \
552 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
553 } else { \
554 asm volatile(pre \
555 paravirt_alt(PARAVIRT_CALL) \
556 post \
557 : call_clbr \
558 : paravirt_type(op), \
559 paravirt_clobber(clbr), \
560 ##__VA_ARGS__ \
561 : "memory", "cc" extra_clbr); \
562 __ret = (rettype)__eax; \
563 } \
564 __ret; \
565 })
566
567 #define __PVOP_CALL(rettype, op, pre, post, ...) \
568 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
569 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
570
571 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
572 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
573 PVOP_CALLEE_CLOBBERS, , \
574 pre, post, ##__VA_ARGS__)
575
576
577 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
578 ({ \
579 PVOP_VCALL_ARGS; \
580 PVOP_TEST_NULL(op); \
581 asm volatile(pre \
582 paravirt_alt(PARAVIRT_CALL) \
583 post \
584 : call_clbr \
585 : paravirt_type(op), \
586 paravirt_clobber(clbr), \
587 ##__VA_ARGS__ \
588 : "memory", "cc" extra_clbr); \
589 })
590
591 #define __PVOP_VCALL(op, pre, post, ...) \
592 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
593 VEXTRA_CLOBBERS, \
594 pre, post, ##__VA_ARGS__)
595
596 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \
597 ____PVOP_VCALL(op.func, CLBR_RET_REG, \
598 PVOP_VCALLEE_CLOBBERS, , \
599 pre, post, ##__VA_ARGS__)
600
601
602
603 #define PVOP_CALL0(rettype, op) \
604 __PVOP_CALL(rettype, op, "", "")
605 #define PVOP_VCALL0(op) \
606 __PVOP_VCALL(op, "", "")
607
608 #define PVOP_CALLEE0(rettype, op) \
609 __PVOP_CALLEESAVE(rettype, op, "", "")
610 #define PVOP_VCALLEE0(op) \
611 __PVOP_VCALLEESAVE(op, "", "")
612
613
614 #define PVOP_CALL1(rettype, op, arg1) \
615 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
616 #define PVOP_VCALL1(op, arg1) \
617 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
618
619 #define PVOP_CALLEE1(rettype, op, arg1) \
620 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
621 #define PVOP_VCALLEE1(op, arg1) \
622 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
623
624
625 #define PVOP_CALL2(rettype, op, arg1, arg2) \
626 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
627 PVOP_CALL_ARG2(arg2))
628 #define PVOP_VCALL2(op, arg1, arg2) \
629 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
630 PVOP_CALL_ARG2(arg2))
631
632 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \
633 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
634 PVOP_CALL_ARG2(arg2))
635 #define PVOP_VCALLEE2(op, arg1, arg2) \
636 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
637 PVOP_CALL_ARG2(arg2))
638
639
640 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
641 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
642 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
643 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
644 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
645 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
646
647 /* This is the only difference in x86_64. We can make it much simpler */
648 #ifdef CONFIG_X86_32
649 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
650 __PVOP_CALL(rettype, op, \
651 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
652 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
653 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
654 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
655 __PVOP_VCALL(op, \
656 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
657 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
658 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
659 #else
660 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
661 __PVOP_CALL(rettype, op, "", "", \
662 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
663 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
664 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
665 __PVOP_VCALL(op, "", "", \
666 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
667 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
668 #endif
669
670 /* Lazy mode for batching updates / context switch */
671 enum paravirt_lazy_mode {
672 PARAVIRT_LAZY_NONE,
673 PARAVIRT_LAZY_MMU,
674 PARAVIRT_LAZY_CPU,
675 };
676
677 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
678 void paravirt_start_context_switch(struct task_struct *prev);
679 void paravirt_end_context_switch(struct task_struct *next);
680
681 void paravirt_enter_lazy_mmu(void);
682 void paravirt_leave_lazy_mmu(void);
683
684 void _paravirt_nop(void);
685 u32 _paravirt_ident_32(u32);
686 u64 _paravirt_ident_64(u64);
687
688 #define paravirt_nop ((void *)_paravirt_nop)
689
690 /* These all sit in the .parainstructions section to tell us what to patch. */
691 struct paravirt_patch_site {
692 u8 *instr; /* original instructions */
693 u8 instrtype; /* type of this instruction */
694 u8 len; /* length of original instruction */
695 u16 clobbers; /* what registers you may clobber */
696 };
697
698 extern struct paravirt_patch_site __parainstructions[],
699 __parainstructions_end[];
700
701 #endif /* __ASSEMBLY__ */
702
703 #endif /* _ASM_X86_PARAVIRT_TYPES_H */
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