Merge branch 'core' of git://git.kernel.org/pub/scm/linux/kernel/git/rric/oprofile...
[deliverable/linux.git] / arch / x86 / include / asm / paravirt_types.h
1 #ifndef _ASM_X86_PARAVIRT_TYPES_H
2 #define _ASM_X86_PARAVIRT_TYPES_H
3
4 /* Bitmask of what can be clobbered: usually at least eax. */
5 #define CLBR_NONE 0
6 #define CLBR_EAX (1 << 0)
7 #define CLBR_ECX (1 << 1)
8 #define CLBR_EDX (1 << 2)
9 #define CLBR_EDI (1 << 3)
10
11 #ifdef CONFIG_X86_32
12 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
13 #define CLBR_ANY ((1 << 4) - 1)
14
15 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
16 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
17 #define CLBR_SCRATCH (0)
18 #else
19 #define CLBR_RAX CLBR_EAX
20 #define CLBR_RCX CLBR_ECX
21 #define CLBR_RDX CLBR_EDX
22 #define CLBR_RDI CLBR_EDI
23 #define CLBR_RSI (1 << 4)
24 #define CLBR_R8 (1 << 5)
25 #define CLBR_R9 (1 << 6)
26 #define CLBR_R10 (1 << 7)
27 #define CLBR_R11 (1 << 8)
28
29 #define CLBR_ANY ((1 << 9) - 1)
30
31 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
32 CLBR_RCX | CLBR_R8 | CLBR_R9)
33 #define CLBR_RET_REG (CLBR_RAX)
34 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
35
36 #endif /* X86_64 */
37
38 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
39
40 #ifndef __ASSEMBLY__
41
42 #include <asm/desc_defs.h>
43 #include <asm/kmap_types.h>
44 #include <asm/pgtable_types.h>
45
46 struct page;
47 struct thread_struct;
48 struct desc_ptr;
49 struct tss_struct;
50 struct mm_struct;
51 struct desc_struct;
52 struct task_struct;
53 struct cpumask;
54
55 /*
56 * Wrapper type for pointers to code which uses the non-standard
57 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
58 */
59 struct paravirt_callee_save {
60 void *func;
61 };
62
63 /* general info */
64 struct pv_info {
65 unsigned int kernel_rpl;
66 int shared_kernel_pmd;
67
68 #ifdef CONFIG_X86_64
69 u16 extra_user_64bit_cs; /* __USER_CS if none */
70 #endif
71
72 int paravirt_enabled;
73 const char *name;
74 };
75
76 struct pv_init_ops {
77 /*
78 * Patch may replace one of the defined code sequences with
79 * arbitrary code, subject to the same register constraints.
80 * This generally means the code is not free to clobber any
81 * registers other than EAX. The patch function should return
82 * the number of bytes of code generated, as we nop pad the
83 * rest in generic code.
84 */
85 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
86 unsigned long addr, unsigned len);
87 };
88
89
90 struct pv_lazy_ops {
91 /* Set deferred update mode, used for batching operations. */
92 void (*enter)(void);
93 void (*leave)(void);
94 };
95
96 struct pv_time_ops {
97 unsigned long long (*sched_clock)(void);
98 unsigned long long (*steal_clock)(int cpu);
99 unsigned long (*get_tsc_khz)(void);
100 };
101
102 struct pv_cpu_ops {
103 /* hooks for various privileged instructions */
104 unsigned long (*get_debugreg)(int regno);
105 void (*set_debugreg)(int regno, unsigned long value);
106
107 void (*clts)(void);
108
109 unsigned long (*read_cr0)(void);
110 void (*write_cr0)(unsigned long);
111
112 unsigned long (*read_cr4_safe)(void);
113 unsigned long (*read_cr4)(void);
114 void (*write_cr4)(unsigned long);
115
116 #ifdef CONFIG_X86_64
117 unsigned long (*read_cr8)(void);
118 void (*write_cr8)(unsigned long);
119 #endif
120
121 /* Segment descriptor handling */
122 void (*load_tr_desc)(void);
123 void (*load_gdt)(const struct desc_ptr *);
124 void (*load_idt)(const struct desc_ptr *);
125 void (*store_gdt)(struct desc_ptr *);
126 void (*store_idt)(struct desc_ptr *);
127 void (*set_ldt)(const void *desc, unsigned entries);
128 unsigned long (*store_tr)(void);
129 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
130 #ifdef CONFIG_X86_64
131 void (*load_gs_index)(unsigned int idx);
132 #endif
133 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
134 const void *desc);
135 void (*write_gdt_entry)(struct desc_struct *,
136 int entrynum, const void *desc, int size);
137 void (*write_idt_entry)(gate_desc *,
138 int entrynum, const gate_desc *gate);
139 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
140 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
141
142 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
143
144 void (*set_iopl_mask)(unsigned mask);
145
146 void (*wbinvd)(void);
147 void (*io_delay)(void);
148
149 /* cpuid emulation, mostly so that caps bits can be disabled */
150 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
151 unsigned int *ecx, unsigned int *edx);
152
153 /* MSR, PMC and TSR operations.
154 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
155 u64 (*read_msr)(unsigned int msr, int *err);
156 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
157
158 u64 (*read_tsc)(void);
159 u64 (*read_pmc)(int counter);
160 unsigned long long (*read_tscp)(unsigned int *aux);
161
162 /*
163 * Atomically enable interrupts and return to userspace. This
164 * is only ever used to return to 32-bit processes; in a
165 * 64-bit kernel, it's used for 32-on-64 compat processes, but
166 * never native 64-bit processes. (Jump, not call.)
167 */
168 void (*irq_enable_sysexit)(void);
169
170 /*
171 * Switch to usermode gs and return to 64-bit usermode using
172 * sysret. Only used in 64-bit kernels to return to 64-bit
173 * processes. Usermode register state, including %rsp, must
174 * already be restored.
175 */
176 void (*usergs_sysret64)(void);
177
178 /*
179 * Switch to usermode gs and return to 32-bit usermode using
180 * sysret. Used to return to 32-on-64 compat processes.
181 * Other usermode register state, including %esp, must already
182 * be restored.
183 */
184 void (*usergs_sysret32)(void);
185
186 /* Normal iret. Jump to this with the standard iret stack
187 frame set up. */
188 void (*iret)(void);
189
190 void (*swapgs)(void);
191
192 void (*start_context_switch)(struct task_struct *prev);
193 void (*end_context_switch)(struct task_struct *next);
194 };
195
196 struct pv_irq_ops {
197 /*
198 * Get/set interrupt state. save_fl and restore_fl are only
199 * expected to use X86_EFLAGS_IF; all other bits
200 * returned from save_fl are undefined, and may be ignored by
201 * restore_fl.
202 *
203 * NOTE: These functions callers expect the callee to preserve
204 * more registers than the standard C calling convention.
205 */
206 struct paravirt_callee_save save_fl;
207 struct paravirt_callee_save restore_fl;
208 struct paravirt_callee_save irq_disable;
209 struct paravirt_callee_save irq_enable;
210
211 void (*safe_halt)(void);
212 void (*halt)(void);
213
214 #ifdef CONFIG_X86_64
215 void (*adjust_exception_frame)(void);
216 #endif
217 };
218
219 struct pv_apic_ops {
220 #ifdef CONFIG_X86_LOCAL_APIC
221 void (*startup_ipi_hook)(int phys_apicid,
222 unsigned long start_eip,
223 unsigned long start_esp);
224 #endif
225 };
226
227 struct pv_mmu_ops {
228 unsigned long (*read_cr2)(void);
229 void (*write_cr2)(unsigned long);
230
231 unsigned long (*read_cr3)(void);
232 void (*write_cr3)(unsigned long);
233
234 /*
235 * Hooks for intercepting the creation/use/destruction of an
236 * mm_struct.
237 */
238 void (*activate_mm)(struct mm_struct *prev,
239 struct mm_struct *next);
240 void (*dup_mmap)(struct mm_struct *oldmm,
241 struct mm_struct *mm);
242 void (*exit_mmap)(struct mm_struct *mm);
243
244
245 /* TLB operations */
246 void (*flush_tlb_user)(void);
247 void (*flush_tlb_kernel)(void);
248 void (*flush_tlb_single)(unsigned long addr);
249 void (*flush_tlb_others)(const struct cpumask *cpus,
250 struct mm_struct *mm,
251 unsigned long va);
252
253 /* Hooks for allocating and freeing a pagetable top-level */
254 int (*pgd_alloc)(struct mm_struct *mm);
255 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
256
257 /*
258 * Hooks for allocating/releasing pagetable pages when they're
259 * attached to a pagetable
260 */
261 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
262 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
263 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
264 void (*release_pte)(unsigned long pfn);
265 void (*release_pmd)(unsigned long pfn);
266 void (*release_pud)(unsigned long pfn);
267
268 /* Pagetable manipulation functions */
269 void (*set_pte)(pte_t *ptep, pte_t pteval);
270 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
271 pte_t *ptep, pte_t pteval);
272 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
273 void (*set_pmd_at)(struct mm_struct *mm, unsigned long addr,
274 pmd_t *pmdp, pmd_t pmdval);
275 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
276 pte_t *ptep);
277 void (*pte_update_defer)(struct mm_struct *mm,
278 unsigned long addr, pte_t *ptep);
279 void (*pmd_update)(struct mm_struct *mm, unsigned long addr,
280 pmd_t *pmdp);
281 void (*pmd_update_defer)(struct mm_struct *mm,
282 unsigned long addr, pmd_t *pmdp);
283
284 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
285 pte_t *ptep);
286 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
287 pte_t *ptep, pte_t pte);
288
289 struct paravirt_callee_save pte_val;
290 struct paravirt_callee_save make_pte;
291
292 struct paravirt_callee_save pgd_val;
293 struct paravirt_callee_save make_pgd;
294
295 #if PAGETABLE_LEVELS >= 3
296 #ifdef CONFIG_X86_PAE
297 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
298 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
299 pte_t *ptep);
300 void (*pmd_clear)(pmd_t *pmdp);
301
302 #endif /* CONFIG_X86_PAE */
303
304 void (*set_pud)(pud_t *pudp, pud_t pudval);
305
306 struct paravirt_callee_save pmd_val;
307 struct paravirt_callee_save make_pmd;
308
309 #if PAGETABLE_LEVELS == 4
310 struct paravirt_callee_save pud_val;
311 struct paravirt_callee_save make_pud;
312
313 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
314 #endif /* PAGETABLE_LEVELS == 4 */
315 #endif /* PAGETABLE_LEVELS >= 3 */
316
317 struct pv_lazy_ops lazy_mode;
318
319 /* dom0 ops */
320
321 /* Sometimes the physical address is a pfn, and sometimes its
322 an mfn. We can tell which is which from the index. */
323 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
324 phys_addr_t phys, pgprot_t flags);
325 };
326
327 struct arch_spinlock;
328 struct pv_lock_ops {
329 int (*spin_is_locked)(struct arch_spinlock *lock);
330 int (*spin_is_contended)(struct arch_spinlock *lock);
331 void (*spin_lock)(struct arch_spinlock *lock);
332 void (*spin_lock_flags)(struct arch_spinlock *lock, unsigned long flags);
333 int (*spin_trylock)(struct arch_spinlock *lock);
334 void (*spin_unlock)(struct arch_spinlock *lock);
335 };
336
337 /* This contains all the paravirt structures: we get a convenient
338 * number for each function using the offset which we use to indicate
339 * what to patch. */
340 struct paravirt_patch_template {
341 struct pv_init_ops pv_init_ops;
342 struct pv_time_ops pv_time_ops;
343 struct pv_cpu_ops pv_cpu_ops;
344 struct pv_irq_ops pv_irq_ops;
345 struct pv_apic_ops pv_apic_ops;
346 struct pv_mmu_ops pv_mmu_ops;
347 struct pv_lock_ops pv_lock_ops;
348 };
349
350 extern struct pv_info pv_info;
351 extern struct pv_init_ops pv_init_ops;
352 extern struct pv_time_ops pv_time_ops;
353 extern struct pv_cpu_ops pv_cpu_ops;
354 extern struct pv_irq_ops pv_irq_ops;
355 extern struct pv_apic_ops pv_apic_ops;
356 extern struct pv_mmu_ops pv_mmu_ops;
357 extern struct pv_lock_ops pv_lock_ops;
358
359 #define PARAVIRT_PATCH(x) \
360 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
361
362 #define paravirt_type(op) \
363 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
364 [paravirt_opptr] "i" (&(op))
365 #define paravirt_clobber(clobber) \
366 [paravirt_clobber] "i" (clobber)
367
368 /*
369 * Generate some code, and mark it as patchable by the
370 * apply_paravirt() alternate instruction patcher.
371 */
372 #define _paravirt_alt(insn_string, type, clobber) \
373 "771:\n\t" insn_string "\n" "772:\n" \
374 ".pushsection .parainstructions,\"a\"\n" \
375 _ASM_ALIGN "\n" \
376 _ASM_PTR " 771b\n" \
377 " .byte " type "\n" \
378 " .byte 772b-771b\n" \
379 " .short " clobber "\n" \
380 ".popsection\n"
381
382 /* Generate patchable code, with the default asm parameters. */
383 #define paravirt_alt(insn_string) \
384 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
385
386 /* Simple instruction patching code. */
387 #define DEF_NATIVE(ops, name, code) \
388 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
389 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
390
391 unsigned paravirt_patch_nop(void);
392 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
393 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
394 unsigned paravirt_patch_ignore(unsigned len);
395 unsigned paravirt_patch_call(void *insnbuf,
396 const void *target, u16 tgt_clobbers,
397 unsigned long addr, u16 site_clobbers,
398 unsigned len);
399 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
400 unsigned long addr, unsigned len);
401 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
402 unsigned long addr, unsigned len);
403
404 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
405 const char *start, const char *end);
406
407 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
408 unsigned long addr, unsigned len);
409
410 int paravirt_disable_iospace(void);
411
412 /*
413 * This generates an indirect call based on the operation type number.
414 * The type number, computed in PARAVIRT_PATCH, is derived from the
415 * offset into the paravirt_patch_template structure, and can therefore be
416 * freely converted back into a structure offset.
417 */
418 #define PARAVIRT_CALL "call *%c[paravirt_opptr];"
419
420 /*
421 * These macros are intended to wrap calls through one of the paravirt
422 * ops structs, so that they can be later identified and patched at
423 * runtime.
424 *
425 * Normally, a call to a pv_op function is a simple indirect call:
426 * (pv_op_struct.operations)(args...).
427 *
428 * Unfortunately, this is a relatively slow operation for modern CPUs,
429 * because it cannot necessarily determine what the destination
430 * address is. In this case, the address is a runtime constant, so at
431 * the very least we can patch the call to e a simple direct call, or
432 * ideally, patch an inline implementation into the callsite. (Direct
433 * calls are essentially free, because the call and return addresses
434 * are completely predictable.)
435 *
436 * For i386, these macros rely on the standard gcc "regparm(3)" calling
437 * convention, in which the first three arguments are placed in %eax,
438 * %edx, %ecx (in that order), and the remaining arguments are placed
439 * on the stack. All caller-save registers (eax,edx,ecx) are expected
440 * to be modified (either clobbered or used for return values).
441 * X86_64, on the other hand, already specifies a register-based calling
442 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
443 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
444 * special handling for dealing with 4 arguments, unlike i386.
445 * However, x86_64 also have to clobber all caller saved registers, which
446 * unfortunately, are quite a bit (r8 - r11)
447 *
448 * The call instruction itself is marked by placing its start address
449 * and size into the .parainstructions section, so that
450 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
451 * appropriate patching under the control of the backend pv_init_ops
452 * implementation.
453 *
454 * Unfortunately there's no way to get gcc to generate the args setup
455 * for the call, and then allow the call itself to be generated by an
456 * inline asm. Because of this, we must do the complete arg setup and
457 * return value handling from within these macros. This is fairly
458 * cumbersome.
459 *
460 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
461 * It could be extended to more arguments, but there would be little
462 * to be gained from that. For each number of arguments, there are
463 * the two VCALL and CALL variants for void and non-void functions.
464 *
465 * When there is a return value, the invoker of the macro must specify
466 * the return type. The macro then uses sizeof() on that type to
467 * determine whether its a 32 or 64 bit value, and places the return
468 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
469 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
470 * the return value size.
471 *
472 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
473 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
474 * in low,high order
475 *
476 * Small structures are passed and returned in registers. The macro
477 * calling convention can't directly deal with this, so the wrapper
478 * functions must do this.
479 *
480 * These PVOP_* macros are only defined within this header. This
481 * means that all uses must be wrapped in inline functions. This also
482 * makes sure the incoming and outgoing types are always correct.
483 */
484 #ifdef CONFIG_X86_32
485 #define PVOP_VCALL_ARGS \
486 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
487 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
488
489 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
490 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
491 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
492
493 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
494 "=c" (__ecx)
495 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
496
497 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
498 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
499
500 #define EXTRA_CLOBBERS
501 #define VEXTRA_CLOBBERS
502 #else /* CONFIG_X86_64 */
503 /* [re]ax isn't an arg, but the return val */
504 #define PVOP_VCALL_ARGS \
505 unsigned long __edi = __edi, __esi = __esi, \
506 __edx = __edx, __ecx = __ecx, __eax = __eax
507 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
508
509 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
510 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
511 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
512 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
513
514 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
515 "=S" (__esi), "=d" (__edx), \
516 "=c" (__ecx)
517 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
518
519 /* void functions are still allowed [re]ax for scratch */
520 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
521 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
522
523 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
524 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
525 #endif /* CONFIG_X86_32 */
526
527 #ifdef CONFIG_PARAVIRT_DEBUG
528 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
529 #else
530 #define PVOP_TEST_NULL(op) ((void)op)
531 #endif
532
533 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
534 pre, post, ...) \
535 ({ \
536 rettype __ret; \
537 PVOP_CALL_ARGS; \
538 PVOP_TEST_NULL(op); \
539 /* This is 32-bit specific, but is okay in 64-bit */ \
540 /* since this condition will never hold */ \
541 if (sizeof(rettype) > sizeof(unsigned long)) { \
542 asm volatile(pre \
543 paravirt_alt(PARAVIRT_CALL) \
544 post \
545 : call_clbr \
546 : paravirt_type(op), \
547 paravirt_clobber(clbr), \
548 ##__VA_ARGS__ \
549 : "memory", "cc" extra_clbr); \
550 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
551 } else { \
552 asm volatile(pre \
553 paravirt_alt(PARAVIRT_CALL) \
554 post \
555 : call_clbr \
556 : paravirt_type(op), \
557 paravirt_clobber(clbr), \
558 ##__VA_ARGS__ \
559 : "memory", "cc" extra_clbr); \
560 __ret = (rettype)__eax; \
561 } \
562 __ret; \
563 })
564
565 #define __PVOP_CALL(rettype, op, pre, post, ...) \
566 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
567 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
568
569 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
570 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
571 PVOP_CALLEE_CLOBBERS, , \
572 pre, post, ##__VA_ARGS__)
573
574
575 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
576 ({ \
577 PVOP_VCALL_ARGS; \
578 PVOP_TEST_NULL(op); \
579 asm volatile(pre \
580 paravirt_alt(PARAVIRT_CALL) \
581 post \
582 : call_clbr \
583 : paravirt_type(op), \
584 paravirt_clobber(clbr), \
585 ##__VA_ARGS__ \
586 : "memory", "cc" extra_clbr); \
587 })
588
589 #define __PVOP_VCALL(op, pre, post, ...) \
590 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
591 VEXTRA_CLOBBERS, \
592 pre, post, ##__VA_ARGS__)
593
594 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \
595 ____PVOP_VCALL(op.func, CLBR_RET_REG, \
596 PVOP_VCALLEE_CLOBBERS, , \
597 pre, post, ##__VA_ARGS__)
598
599
600
601 #define PVOP_CALL0(rettype, op) \
602 __PVOP_CALL(rettype, op, "", "")
603 #define PVOP_VCALL0(op) \
604 __PVOP_VCALL(op, "", "")
605
606 #define PVOP_CALLEE0(rettype, op) \
607 __PVOP_CALLEESAVE(rettype, op, "", "")
608 #define PVOP_VCALLEE0(op) \
609 __PVOP_VCALLEESAVE(op, "", "")
610
611
612 #define PVOP_CALL1(rettype, op, arg1) \
613 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
614 #define PVOP_VCALL1(op, arg1) \
615 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
616
617 #define PVOP_CALLEE1(rettype, op, arg1) \
618 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
619 #define PVOP_VCALLEE1(op, arg1) \
620 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
621
622
623 #define PVOP_CALL2(rettype, op, arg1, arg2) \
624 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
625 PVOP_CALL_ARG2(arg2))
626 #define PVOP_VCALL2(op, arg1, arg2) \
627 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
628 PVOP_CALL_ARG2(arg2))
629
630 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \
631 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
632 PVOP_CALL_ARG2(arg2))
633 #define PVOP_VCALLEE2(op, arg1, arg2) \
634 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
635 PVOP_CALL_ARG2(arg2))
636
637
638 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
639 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
640 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
641 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
642 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
643 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
644
645 /* This is the only difference in x86_64. We can make it much simpler */
646 #ifdef CONFIG_X86_32
647 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
648 __PVOP_CALL(rettype, op, \
649 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
650 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
651 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
652 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
653 __PVOP_VCALL(op, \
654 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
655 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
656 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
657 #else
658 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
659 __PVOP_CALL(rettype, op, "", "", \
660 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
661 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
662 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
663 __PVOP_VCALL(op, "", "", \
664 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
665 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
666 #endif
667
668 /* Lazy mode for batching updates / context switch */
669 enum paravirt_lazy_mode {
670 PARAVIRT_LAZY_NONE,
671 PARAVIRT_LAZY_MMU,
672 PARAVIRT_LAZY_CPU,
673 };
674
675 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
676 void paravirt_start_context_switch(struct task_struct *prev);
677 void paravirt_end_context_switch(struct task_struct *next);
678
679 void paravirt_enter_lazy_mmu(void);
680 void paravirt_leave_lazy_mmu(void);
681
682 void _paravirt_nop(void);
683 u32 _paravirt_ident_32(u32);
684 u64 _paravirt_ident_64(u64);
685
686 #define paravirt_nop ((void *)_paravirt_nop)
687
688 /* These all sit in the .parainstructions section to tell us what to patch. */
689 struct paravirt_patch_site {
690 u8 *instr; /* original instructions */
691 u8 instrtype; /* type of this instruction */
692 u8 len; /* length of original instruction */
693 u16 clobbers; /* what registers you may clobber */
694 };
695
696 extern struct paravirt_patch_site __parainstructions[],
697 __parainstructions_end[];
698
699 #endif /* __ASSEMBLY__ */
700
701 #endif /* _ASM_X86_PARAVIRT_TYPES_H */
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