1 #ifndef _ASM_X86_PERCPU_H
2 #define _ASM_X86_PERCPU_H
5 #define __percpu_seg gs
6 #define __percpu_mov_op movq
8 #define __percpu_seg fs
9 #define __percpu_mov_op movl
15 * PER_CPU finds an address of a per-cpu variable.
19 * reg - 32bit register
21 * The resulting address is stored in the "reg" argument.
24 * PER_CPU(cpu_gdt_descr, %ebx)
27 #define PER_CPU(var, reg) \
28 __percpu_mov_op %__percpu_seg:this_cpu_off, reg; \
30 #define PER_CPU_VAR(var) %__percpu_seg:var
32 #define PER_CPU(var, reg) __percpu_mov_op $var, reg
33 #define PER_CPU_VAR(var) var
36 #ifdef CONFIG_X86_64_SMP
37 #define INIT_PER_CPU_VAR(var) init_per_cpu__##var
39 #define INIT_PER_CPU_VAR(var) var
42 #else /* ...!ASSEMBLY */
44 #include <linux/kernel.h>
45 #include <linux/stringify.h>
48 #define __percpu_prefix "%%"__stringify(__percpu_seg)":"
49 #define __my_cpu_offset this_cpu_read(this_cpu_off)
52 * Compared to the generic __my_cpu_offset version, the following
53 * saves one instruction and avoids clobbering a temp register.
55 #define arch_raw_cpu_ptr(ptr) \
57 unsigned long tcp_ptr__; \
58 asm volatile("add " __percpu_arg(1) ", %0" \
60 : "m" (this_cpu_off), "0" (ptr)); \
61 (typeof(*(ptr)) __kernel __force *)tcp_ptr__; \
64 #define __percpu_prefix ""
67 #define __percpu_arg(x) __percpu_prefix "%P" #x
70 * Initialized pointers to per-cpu variables needed for the boot
71 * processor need to use these macros to get the proper address
72 * offset from __per_cpu_load on SMP.
74 * There also must be an entry in vmlinux_64.lds.S
76 #define DECLARE_INIT_PER_CPU(var) \
77 extern typeof(var) init_per_cpu_var(var)
79 #ifdef CONFIG_X86_64_SMP
80 #define init_per_cpu_var(var) init_per_cpu__##var
82 #define init_per_cpu_var(var) var
85 /* For arch-specific code, we can use direct single-insn ops (they
86 * don't give an lvalue though). */
87 extern void __bad_percpu_size(void);
89 #define percpu_to_op(op, var, val) \
91 typedef typeof(var) pto_T__; \
97 switch (sizeof(var)) { \
99 asm(op "b %1,"__percpu_arg(0) \
101 : "qi" ((pto_T__)(val))); \
104 asm(op "w %1,"__percpu_arg(0) \
106 : "ri" ((pto_T__)(val))); \
109 asm(op "l %1,"__percpu_arg(0) \
111 : "ri" ((pto_T__)(val))); \
114 asm(op "q %1,"__percpu_arg(0) \
116 : "re" ((pto_T__)(val))); \
118 default: __bad_percpu_size(); \
123 * Generate a percpu add to memory instruction and optimize code
124 * if one is added or subtracted.
126 #define percpu_add_op(var, val) \
128 typedef typeof(var) pao_T__; \
129 const int pao_ID__ = (__builtin_constant_p(val) && \
130 ((val) == 1 || (val) == -1)) ? \
137 switch (sizeof(var)) { \
140 asm("incb "__percpu_arg(0) : "+m" (var)); \
141 else if (pao_ID__ == -1) \
142 asm("decb "__percpu_arg(0) : "+m" (var)); \
144 asm("addb %1, "__percpu_arg(0) \
146 : "qi" ((pao_T__)(val))); \
150 asm("incw "__percpu_arg(0) : "+m" (var)); \
151 else if (pao_ID__ == -1) \
152 asm("decw "__percpu_arg(0) : "+m" (var)); \
154 asm("addw %1, "__percpu_arg(0) \
156 : "ri" ((pao_T__)(val))); \
160 asm("incl "__percpu_arg(0) : "+m" (var)); \
161 else if (pao_ID__ == -1) \
162 asm("decl "__percpu_arg(0) : "+m" (var)); \
164 asm("addl %1, "__percpu_arg(0) \
166 : "ri" ((pao_T__)(val))); \
170 asm("incq "__percpu_arg(0) : "+m" (var)); \
171 else if (pao_ID__ == -1) \
172 asm("decq "__percpu_arg(0) : "+m" (var)); \
174 asm("addq %1, "__percpu_arg(0) \
176 : "re" ((pao_T__)(val))); \
178 default: __bad_percpu_size(); \
182 #define percpu_from_op(op, var, constraint) \
184 typeof(var) pfo_ret__; \
185 switch (sizeof(var)) { \
187 asm(op "b "__percpu_arg(1)",%0" \
192 asm(op "w "__percpu_arg(1)",%0" \
197 asm(op "l "__percpu_arg(1)",%0" \
202 asm(op "q "__percpu_arg(1)",%0" \
206 default: __bad_percpu_size(); \
211 #define percpu_unary_op(op, var) \
213 switch (sizeof(var)) { \
215 asm(op "b "__percpu_arg(0) \
219 asm(op "w "__percpu_arg(0) \
223 asm(op "l "__percpu_arg(0) \
227 asm(op "q "__percpu_arg(0) \
230 default: __bad_percpu_size(); \
235 * Add return operation
237 #define percpu_add_return_op(var, val) \
239 typeof(var) paro_ret__ = val; \
240 switch (sizeof(var)) { \
242 asm("xaddb %0, "__percpu_arg(1) \
243 : "+q" (paro_ret__), "+m" (var) \
247 asm("xaddw %0, "__percpu_arg(1) \
248 : "+r" (paro_ret__), "+m" (var) \
252 asm("xaddl %0, "__percpu_arg(1) \
253 : "+r" (paro_ret__), "+m" (var) \
257 asm("xaddq %0, "__percpu_arg(1) \
258 : "+re" (paro_ret__), "+m" (var) \
261 default: __bad_percpu_size(); \
268 * xchg is implemented using cmpxchg without a lock prefix. xchg is
269 * expensive due to the implied lock prefix. The processor cannot prefetch
270 * cachelines if xchg is used.
272 #define percpu_xchg_op(var, nval) \
274 typeof(var) pxo_ret__; \
275 typeof(var) pxo_new__ = (nval); \
276 switch (sizeof(var)) { \
278 asm("\n\tmov "__percpu_arg(1)",%%al" \
279 "\n1:\tcmpxchgb %2, "__percpu_arg(1) \
281 : "=&a" (pxo_ret__), "+m" (var) \
286 asm("\n\tmov "__percpu_arg(1)",%%ax" \
287 "\n1:\tcmpxchgw %2, "__percpu_arg(1) \
289 : "=&a" (pxo_ret__), "+m" (var) \
294 asm("\n\tmov "__percpu_arg(1)",%%eax" \
295 "\n1:\tcmpxchgl %2, "__percpu_arg(1) \
297 : "=&a" (pxo_ret__), "+m" (var) \
302 asm("\n\tmov "__percpu_arg(1)",%%rax" \
303 "\n1:\tcmpxchgq %2, "__percpu_arg(1) \
305 : "=&a" (pxo_ret__), "+m" (var) \
309 default: __bad_percpu_size(); \
315 * cmpxchg has no such implied lock semantics as a result it is much
316 * more efficient for cpu local operations.
318 #define percpu_cmpxchg_op(var, oval, nval) \
320 typeof(var) pco_ret__; \
321 typeof(var) pco_old__ = (oval); \
322 typeof(var) pco_new__ = (nval); \
323 switch (sizeof(var)) { \
325 asm("cmpxchgb %2, "__percpu_arg(1) \
326 : "=a" (pco_ret__), "+m" (var) \
327 : "q" (pco_new__), "0" (pco_old__) \
331 asm("cmpxchgw %2, "__percpu_arg(1) \
332 : "=a" (pco_ret__), "+m" (var) \
333 : "r" (pco_new__), "0" (pco_old__) \
337 asm("cmpxchgl %2, "__percpu_arg(1) \
338 : "=a" (pco_ret__), "+m" (var) \
339 : "r" (pco_new__), "0" (pco_old__) \
343 asm("cmpxchgq %2, "__percpu_arg(1) \
344 : "=a" (pco_ret__), "+m" (var) \
345 : "r" (pco_new__), "0" (pco_old__) \
348 default: __bad_percpu_size(); \
354 * this_cpu_read() makes gcc load the percpu variable every time it is
355 * accessed while this_cpu_read_stable() allows the value to be cached.
356 * this_cpu_read_stable() is more efficient and can be used if its value
357 * is guaranteed to be valid across cpus. The current users include
358 * get_current() and get_thread_info() both of which are actually
359 * per-thread variables implemented as per-cpu variables and thus
360 * stable for the duration of the respective task.
362 #define this_cpu_read_stable(var) percpu_from_op("mov", var, "p" (&(var)))
364 #define raw_cpu_read_1(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
365 #define raw_cpu_read_2(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
366 #define raw_cpu_read_4(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
368 #define raw_cpu_write_1(pcp, val) percpu_to_op("mov", (pcp), val)
369 #define raw_cpu_write_2(pcp, val) percpu_to_op("mov", (pcp), val)
370 #define raw_cpu_write_4(pcp, val) percpu_to_op("mov", (pcp), val)
371 #define raw_cpu_add_1(pcp, val) percpu_add_op((pcp), val)
372 #define raw_cpu_add_2(pcp, val) percpu_add_op((pcp), val)
373 #define raw_cpu_add_4(pcp, val) percpu_add_op((pcp), val)
374 #define raw_cpu_and_1(pcp, val) percpu_to_op("and", (pcp), val)
375 #define raw_cpu_and_2(pcp, val) percpu_to_op("and", (pcp), val)
376 #define raw_cpu_and_4(pcp, val) percpu_to_op("and", (pcp), val)
377 #define raw_cpu_or_1(pcp, val) percpu_to_op("or", (pcp), val)
378 #define raw_cpu_or_2(pcp, val) percpu_to_op("or", (pcp), val)
379 #define raw_cpu_or_4(pcp, val) percpu_to_op("or", (pcp), val)
380 #define raw_cpu_xchg_1(pcp, val) percpu_xchg_op(pcp, val)
381 #define raw_cpu_xchg_2(pcp, val) percpu_xchg_op(pcp, val)
382 #define raw_cpu_xchg_4(pcp, val) percpu_xchg_op(pcp, val)
384 #define this_cpu_read_1(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
385 #define this_cpu_read_2(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
386 #define this_cpu_read_4(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
387 #define this_cpu_write_1(pcp, val) percpu_to_op("mov", (pcp), val)
388 #define this_cpu_write_2(pcp, val) percpu_to_op("mov", (pcp), val)
389 #define this_cpu_write_4(pcp, val) percpu_to_op("mov", (pcp), val)
390 #define this_cpu_add_1(pcp, val) percpu_add_op((pcp), val)
391 #define this_cpu_add_2(pcp, val) percpu_add_op((pcp), val)
392 #define this_cpu_add_4(pcp, val) percpu_add_op((pcp), val)
393 #define this_cpu_and_1(pcp, val) percpu_to_op("and", (pcp), val)
394 #define this_cpu_and_2(pcp, val) percpu_to_op("and", (pcp), val)
395 #define this_cpu_and_4(pcp, val) percpu_to_op("and", (pcp), val)
396 #define this_cpu_or_1(pcp, val) percpu_to_op("or", (pcp), val)
397 #define this_cpu_or_2(pcp, val) percpu_to_op("or", (pcp), val)
398 #define this_cpu_or_4(pcp, val) percpu_to_op("or", (pcp), val)
399 #define this_cpu_xchg_1(pcp, nval) percpu_xchg_op(pcp, nval)
400 #define this_cpu_xchg_2(pcp, nval) percpu_xchg_op(pcp, nval)
401 #define this_cpu_xchg_4(pcp, nval) percpu_xchg_op(pcp, nval)
403 #define raw_cpu_add_return_1(pcp, val) percpu_add_return_op(pcp, val)
404 #define raw_cpu_add_return_2(pcp, val) percpu_add_return_op(pcp, val)
405 #define raw_cpu_add_return_4(pcp, val) percpu_add_return_op(pcp, val)
406 #define raw_cpu_cmpxchg_1(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
407 #define raw_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
408 #define raw_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
410 #define this_cpu_add_return_1(pcp, val) percpu_add_return_op(pcp, val)
411 #define this_cpu_add_return_2(pcp, val) percpu_add_return_op(pcp, val)
412 #define this_cpu_add_return_4(pcp, val) percpu_add_return_op(pcp, val)
413 #define this_cpu_cmpxchg_1(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
414 #define this_cpu_cmpxchg_2(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
415 #define this_cpu_cmpxchg_4(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
417 #ifdef CONFIG_X86_CMPXCHG64
418 #define percpu_cmpxchg8b_double(pcp1, pcp2, o1, o2, n1, n2) \
421 typeof(pcp1) __o1 = (o1), __n1 = (n1); \
422 typeof(pcp2) __o2 = (o2), __n2 = (n2); \
423 asm volatile("cmpxchg8b "__percpu_arg(1)"\n\tsetz %0\n\t" \
424 : "=a" (__ret), "+m" (pcp1), "+m" (pcp2), "+d" (__o2) \
425 : "b" (__n1), "c" (__n2), "a" (__o1)); \
429 #define raw_cpu_cmpxchg_double_4 percpu_cmpxchg8b_double
430 #define this_cpu_cmpxchg_double_4 percpu_cmpxchg8b_double
431 #endif /* CONFIG_X86_CMPXCHG64 */
434 * Per cpu atomic 64 bit operations are only available under 64 bit.
435 * 32 bit must fall back to generic operations.
438 #define raw_cpu_read_8(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
439 #define raw_cpu_write_8(pcp, val) percpu_to_op("mov", (pcp), val)
440 #define raw_cpu_add_8(pcp, val) percpu_add_op((pcp), val)
441 #define raw_cpu_and_8(pcp, val) percpu_to_op("and", (pcp), val)
442 #define raw_cpu_or_8(pcp, val) percpu_to_op("or", (pcp), val)
443 #define raw_cpu_add_return_8(pcp, val) percpu_add_return_op(pcp, val)
444 #define raw_cpu_xchg_8(pcp, nval) percpu_xchg_op(pcp, nval)
445 #define raw_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
447 #define this_cpu_read_8(pcp) percpu_from_op("mov", (pcp), "m"(pcp))
448 #define this_cpu_write_8(pcp, val) percpu_to_op("mov", (pcp), val)
449 #define this_cpu_add_8(pcp, val) percpu_add_op((pcp), val)
450 #define this_cpu_and_8(pcp, val) percpu_to_op("and", (pcp), val)
451 #define this_cpu_or_8(pcp, val) percpu_to_op("or", (pcp), val)
452 #define this_cpu_add_return_8(pcp, val) percpu_add_return_op(pcp, val)
453 #define this_cpu_xchg_8(pcp, nval) percpu_xchg_op(pcp, nval)
454 #define this_cpu_cmpxchg_8(pcp, oval, nval) percpu_cmpxchg_op(pcp, oval, nval)
457 * Pretty complex macro to generate cmpxchg16 instruction. The instruction
458 * is not supported on early AMD64 processors so we must be able to emulate
459 * it in software. The address used in the cmpxchg16 instruction must be
460 * aligned to a 16 byte boundary.
462 #define percpu_cmpxchg16b_double(pcp1, pcp2, o1, o2, n1, n2) \
465 typeof(pcp1) __o1 = (o1), __n1 = (n1); \
466 typeof(pcp2) __o2 = (o2), __n2 = (n2); \
467 alternative_io("leaq %P1,%%rsi\n\tcall this_cpu_cmpxchg16b_emu\n\t", \
468 "cmpxchg16b " __percpu_arg(1) "\n\tsetz %0\n\t", \
470 ASM_OUTPUT2("=a" (__ret), "+m" (pcp1), \
471 "+m" (pcp2), "+d" (__o2)), \
472 "b" (__n1), "c" (__n2), "a" (__o1) : "rsi"); \
476 #define raw_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double
477 #define this_cpu_cmpxchg_double_8 percpu_cmpxchg16b_double
481 /* This is not atomic against other CPUs -- CPU preemption needs to be off */
482 #define x86_test_and_clear_bit_percpu(bit, var) \
485 asm volatile("btr %2,"__percpu_arg(1)"\n\tsbbl %0,%0" \
486 : "=r" (old__), "+m" (var) \
491 static __always_inline
int x86_this_cpu_constant_test_bit(unsigned int nr
,
492 const unsigned long __percpu
*addr
)
494 unsigned long __percpu
*a
= (unsigned long *)addr
+ nr
/ BITS_PER_LONG
;
497 return ((1UL << (nr
% BITS_PER_LONG
)) & raw_cpu_read_8(*a
)) != 0;
499 return ((1UL << (nr
% BITS_PER_LONG
)) & raw_cpu_read_4(*a
)) != 0;
503 static inline int x86_this_cpu_variable_test_bit(int nr
,
504 const unsigned long __percpu
*addr
)
508 asm volatile("bt "__percpu_arg(2)",%1\n\t"
511 : "m" (*(unsigned long *)addr
), "Ir" (nr
));
516 #define x86_this_cpu_test_bit(nr, addr) \
517 (__builtin_constant_p((nr)) \
518 ? x86_this_cpu_constant_test_bit((nr), (addr)) \
519 : x86_this_cpu_variable_test_bit((nr), (addr)))
522 #include <asm-generic/percpu.h>
524 /* We can use this directly for local CPU (faster). */
525 DECLARE_PER_CPU(unsigned long, this_cpu_off
);
527 #endif /* !__ASSEMBLY__ */
532 * Define the "EARLY_PER_CPU" macros. These are used for some per_cpu
533 * variables that are initialized and accessed before there are per_cpu
537 #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
538 DEFINE_PER_CPU(_type, _name) = _initvalue; \
539 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
540 { [0 ... NR_CPUS-1] = _initvalue }; \
541 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
543 #define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \
544 DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue; \
545 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
546 { [0 ... NR_CPUS-1] = _initvalue }; \
547 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
549 #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \
550 EXPORT_PER_CPU_SYMBOL(_name)
552 #define DECLARE_EARLY_PER_CPU(_type, _name) \
553 DECLARE_PER_CPU(_type, _name); \
554 extern __typeof__(_type) *_name##_early_ptr; \
555 extern __typeof__(_type) _name##_early_map[]
557 #define DECLARE_EARLY_PER_CPU_READ_MOSTLY(_type, _name) \
558 DECLARE_PER_CPU_READ_MOSTLY(_type, _name); \
559 extern __typeof__(_type) *_name##_early_ptr; \
560 extern __typeof__(_type) _name##_early_map[]
562 #define early_per_cpu_ptr(_name) (_name##_early_ptr)
563 #define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx])
564 #define early_per_cpu(_name, _cpu) \
565 *(early_per_cpu_ptr(_name) ? \
566 &early_per_cpu_ptr(_name)[_cpu] : \
567 &per_cpu(_name, _cpu))
569 #else /* !CONFIG_SMP */
570 #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
571 DEFINE_PER_CPU(_type, _name) = _initvalue
573 #define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \
574 DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue
576 #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \
577 EXPORT_PER_CPU_SYMBOL(_name)
579 #define DECLARE_EARLY_PER_CPU(_type, _name) \
580 DECLARE_PER_CPU(_type, _name)
582 #define DECLARE_EARLY_PER_CPU_READ_MOSTLY(_type, _name) \
583 DECLARE_PER_CPU_READ_MOSTLY(_type, _name)
585 #define early_per_cpu(_name, _cpu) per_cpu(_name, _cpu)
586 #define early_per_cpu_ptr(_name) NULL
587 /* no early_per_cpu_map() */
589 #endif /* !CONFIG_SMP */
591 #endif /* _ASM_X86_PERCPU_H */
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