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x86/asm/entry: Change all 'user_mode_vm()' calls to 'user_mode()'
[deliverable/linux.git] / arch / x86 / kernel / alternative.c
1 #define pr_fmt(fmt) "SMP alternatives: " fmt
2
3 #include <linux/module.h>
4 #include <linux/sched.h>
5 #include <linux/mutex.h>
6 #include <linux/list.h>
7 #include <linux/stringify.h>
8 #include <linux/mm.h>
9 #include <linux/vmalloc.h>
10 #include <linux/memory.h>
11 #include <linux/stop_machine.h>
12 #include <linux/slab.h>
13 #include <linux/kdebug.h>
14 #include <asm/alternative.h>
15 #include <asm/sections.h>
16 #include <asm/pgtable.h>
17 #include <asm/mce.h>
18 #include <asm/nmi.h>
19 #include <asm/cacheflush.h>
20 #include <asm/tlbflush.h>
21 #include <asm/io.h>
22 #include <asm/fixmap.h>
23
24 #define MAX_PATCH_LEN (255-1)
25
26 static int __initdata_or_module debug_alternative;
27
28 static int __init debug_alt(char *str)
29 {
30 debug_alternative = 1;
31 return 1;
32 }
33 __setup("debug-alternative", debug_alt);
34
35 static int noreplace_smp;
36
37 static int __init setup_noreplace_smp(char *str)
38 {
39 noreplace_smp = 1;
40 return 1;
41 }
42 __setup("noreplace-smp", setup_noreplace_smp);
43
44 #ifdef CONFIG_PARAVIRT
45 static int __initdata_or_module noreplace_paravirt = 0;
46
47 static int __init setup_noreplace_paravirt(char *str)
48 {
49 noreplace_paravirt = 1;
50 return 1;
51 }
52 __setup("noreplace-paravirt", setup_noreplace_paravirt);
53 #endif
54
55 #define DPRINTK(fmt, args...) \
56 do { \
57 if (debug_alternative) \
58 printk(KERN_DEBUG "%s: " fmt "\n", __func__, ##args); \
59 } while (0)
60
61 #define DUMP_BYTES(buf, len, fmt, args...) \
62 do { \
63 if (unlikely(debug_alternative)) { \
64 int j; \
65 \
66 if (!(len)) \
67 break; \
68 \
69 printk(KERN_DEBUG fmt, ##args); \
70 for (j = 0; j < (len) - 1; j++) \
71 printk(KERN_CONT "%02hhx ", buf[j]); \
72 printk(KERN_CONT "%02hhx\n", buf[j]); \
73 } \
74 } while (0)
75
76 /*
77 * Each GENERIC_NOPX is of X bytes, and defined as an array of bytes
78 * that correspond to that nop. Getting from one nop to the next, we
79 * add to the array the offset that is equal to the sum of all sizes of
80 * nops preceding the one we are after.
81 *
82 * Note: The GENERIC_NOP5_ATOMIC is at the end, as it breaks the
83 * nice symmetry of sizes of the previous nops.
84 */
85 #if defined(GENERIC_NOP1) && !defined(CONFIG_X86_64)
86 static const unsigned char intelnops[] =
87 {
88 GENERIC_NOP1,
89 GENERIC_NOP2,
90 GENERIC_NOP3,
91 GENERIC_NOP4,
92 GENERIC_NOP5,
93 GENERIC_NOP6,
94 GENERIC_NOP7,
95 GENERIC_NOP8,
96 GENERIC_NOP5_ATOMIC
97 };
98 static const unsigned char * const intel_nops[ASM_NOP_MAX+2] =
99 {
100 NULL,
101 intelnops,
102 intelnops + 1,
103 intelnops + 1 + 2,
104 intelnops + 1 + 2 + 3,
105 intelnops + 1 + 2 + 3 + 4,
106 intelnops + 1 + 2 + 3 + 4 + 5,
107 intelnops + 1 + 2 + 3 + 4 + 5 + 6,
108 intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
109 intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8,
110 };
111 #endif
112
113 #ifdef K8_NOP1
114 static const unsigned char k8nops[] =
115 {
116 K8_NOP1,
117 K8_NOP2,
118 K8_NOP3,
119 K8_NOP4,
120 K8_NOP5,
121 K8_NOP6,
122 K8_NOP7,
123 K8_NOP8,
124 K8_NOP5_ATOMIC
125 };
126 static const unsigned char * const k8_nops[ASM_NOP_MAX+2] =
127 {
128 NULL,
129 k8nops,
130 k8nops + 1,
131 k8nops + 1 + 2,
132 k8nops + 1 + 2 + 3,
133 k8nops + 1 + 2 + 3 + 4,
134 k8nops + 1 + 2 + 3 + 4 + 5,
135 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
136 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
137 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8,
138 };
139 #endif
140
141 #if defined(K7_NOP1) && !defined(CONFIG_X86_64)
142 static const unsigned char k7nops[] =
143 {
144 K7_NOP1,
145 K7_NOP2,
146 K7_NOP3,
147 K7_NOP4,
148 K7_NOP5,
149 K7_NOP6,
150 K7_NOP7,
151 K7_NOP8,
152 K7_NOP5_ATOMIC
153 };
154 static const unsigned char * const k7_nops[ASM_NOP_MAX+2] =
155 {
156 NULL,
157 k7nops,
158 k7nops + 1,
159 k7nops + 1 + 2,
160 k7nops + 1 + 2 + 3,
161 k7nops + 1 + 2 + 3 + 4,
162 k7nops + 1 + 2 + 3 + 4 + 5,
163 k7nops + 1 + 2 + 3 + 4 + 5 + 6,
164 k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
165 k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8,
166 };
167 #endif
168
169 #ifdef P6_NOP1
170 static const unsigned char p6nops[] =
171 {
172 P6_NOP1,
173 P6_NOP2,
174 P6_NOP3,
175 P6_NOP4,
176 P6_NOP5,
177 P6_NOP6,
178 P6_NOP7,
179 P6_NOP8,
180 P6_NOP5_ATOMIC
181 };
182 static const unsigned char * const p6_nops[ASM_NOP_MAX+2] =
183 {
184 NULL,
185 p6nops,
186 p6nops + 1,
187 p6nops + 1 + 2,
188 p6nops + 1 + 2 + 3,
189 p6nops + 1 + 2 + 3 + 4,
190 p6nops + 1 + 2 + 3 + 4 + 5,
191 p6nops + 1 + 2 + 3 + 4 + 5 + 6,
192 p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
193 p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8,
194 };
195 #endif
196
197 /* Initialize these to a safe default */
198 #ifdef CONFIG_X86_64
199 const unsigned char * const *ideal_nops = p6_nops;
200 #else
201 const unsigned char * const *ideal_nops = intel_nops;
202 #endif
203
204 void __init arch_init_ideal_nops(void)
205 {
206 switch (boot_cpu_data.x86_vendor) {
207 case X86_VENDOR_INTEL:
208 /*
209 * Due to a decoder implementation quirk, some
210 * specific Intel CPUs actually perform better with
211 * the "k8_nops" than with the SDM-recommended NOPs.
212 */
213 if (boot_cpu_data.x86 == 6 &&
214 boot_cpu_data.x86_model >= 0x0f &&
215 boot_cpu_data.x86_model != 0x1c &&
216 boot_cpu_data.x86_model != 0x26 &&
217 boot_cpu_data.x86_model != 0x27 &&
218 boot_cpu_data.x86_model < 0x30) {
219 ideal_nops = k8_nops;
220 } else if (boot_cpu_has(X86_FEATURE_NOPL)) {
221 ideal_nops = p6_nops;
222 } else {
223 #ifdef CONFIG_X86_64
224 ideal_nops = k8_nops;
225 #else
226 ideal_nops = intel_nops;
227 #endif
228 }
229 break;
230 default:
231 #ifdef CONFIG_X86_64
232 ideal_nops = k8_nops;
233 #else
234 if (boot_cpu_has(X86_FEATURE_K8))
235 ideal_nops = k8_nops;
236 else if (boot_cpu_has(X86_FEATURE_K7))
237 ideal_nops = k7_nops;
238 else
239 ideal_nops = intel_nops;
240 #endif
241 }
242 }
243
244 /* Use this to add nops to a buffer, then text_poke the whole buffer. */
245 static void __init_or_module add_nops(void *insns, unsigned int len)
246 {
247 while (len > 0) {
248 unsigned int noplen = len;
249 if (noplen > ASM_NOP_MAX)
250 noplen = ASM_NOP_MAX;
251 memcpy(insns, ideal_nops[noplen], noplen);
252 insns += noplen;
253 len -= noplen;
254 }
255 }
256
257 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
258 extern s32 __smp_locks[], __smp_locks_end[];
259 void *text_poke_early(void *addr, const void *opcode, size_t len);
260
261 /*
262 * Are we looking at a near JMP with a 1 or 4-byte displacement.
263 */
264 static inline bool is_jmp(const u8 opcode)
265 {
266 return opcode == 0xeb || opcode == 0xe9;
267 }
268
269 static void __init_or_module
270 recompute_jump(struct alt_instr *a, u8 *orig_insn, u8 *repl_insn, u8 *insnbuf)
271 {
272 u8 *next_rip, *tgt_rip;
273 s32 n_dspl, o_dspl;
274 int repl_len;
275
276 if (a->replacementlen != 5)
277 return;
278
279 o_dspl = *(s32 *)(insnbuf + 1);
280
281 /* next_rip of the replacement JMP */
282 next_rip = repl_insn + a->replacementlen;
283 /* target rip of the replacement JMP */
284 tgt_rip = next_rip + o_dspl;
285 n_dspl = tgt_rip - orig_insn;
286
287 DPRINTK("target RIP: %p, new_displ: 0x%x", tgt_rip, n_dspl);
288
289 if (tgt_rip - orig_insn >= 0) {
290 if (n_dspl - 2 <= 127)
291 goto two_byte_jmp;
292 else
293 goto five_byte_jmp;
294 /* negative offset */
295 } else {
296 if (((n_dspl - 2) & 0xff) == (n_dspl - 2))
297 goto two_byte_jmp;
298 else
299 goto five_byte_jmp;
300 }
301
302 two_byte_jmp:
303 n_dspl -= 2;
304
305 insnbuf[0] = 0xeb;
306 insnbuf[1] = (s8)n_dspl;
307 add_nops(insnbuf + 2, 3);
308
309 repl_len = 2;
310 goto done;
311
312 five_byte_jmp:
313 n_dspl -= 5;
314
315 insnbuf[0] = 0xe9;
316 *(s32 *)&insnbuf[1] = n_dspl;
317
318 repl_len = 5;
319
320 done:
321
322 DPRINTK("final displ: 0x%08x, JMP 0x%lx",
323 n_dspl, (unsigned long)orig_insn + n_dspl + repl_len);
324 }
325
326 static void __init_or_module optimize_nops(struct alt_instr *a, u8 *instr)
327 {
328 add_nops(instr + (a->instrlen - a->padlen), a->padlen);
329
330 DUMP_BYTES(instr, a->instrlen, "%p: [%d:%d) optimized NOPs: ",
331 instr, a->instrlen - a->padlen, a->padlen);
332 }
333
334 /*
335 * Replace instructions with better alternatives for this CPU type. This runs
336 * before SMP is initialized to avoid SMP problems with self modifying code.
337 * This implies that asymmetric systems where APs have less capabilities than
338 * the boot processor are not handled. Tough. Make sure you disable such
339 * features by hand.
340 */
341 void __init_or_module apply_alternatives(struct alt_instr *start,
342 struct alt_instr *end)
343 {
344 struct alt_instr *a;
345 u8 *instr, *replacement;
346 u8 insnbuf[MAX_PATCH_LEN];
347
348 DPRINTK("alt table %p -> %p", start, end);
349 /*
350 * The scan order should be from start to end. A later scanned
351 * alternative code can overwrite previously scanned alternative code.
352 * Some kernel functions (e.g. memcpy, memset, etc) use this order to
353 * patch code.
354 *
355 * So be careful if you want to change the scan order to any other
356 * order.
357 */
358 for (a = start; a < end; a++) {
359 int insnbuf_sz = 0;
360
361 instr = (u8 *)&a->instr_offset + a->instr_offset;
362 replacement = (u8 *)&a->repl_offset + a->repl_offset;
363 BUG_ON(a->instrlen > sizeof(insnbuf));
364 BUG_ON(a->cpuid >= (NCAPINTS + NBUGINTS) * 32);
365 if (!boot_cpu_has(a->cpuid)) {
366 if (a->padlen > 1)
367 optimize_nops(a, instr);
368
369 continue;
370 }
371
372 DPRINTK("feat: %d*32+%d, old: (%p, len: %d), repl: (%p, len: %d)",
373 a->cpuid >> 5,
374 a->cpuid & 0x1f,
375 instr, a->instrlen,
376 replacement, a->replacementlen);
377
378 DUMP_BYTES(instr, a->instrlen, "%p: old_insn: ", instr);
379 DUMP_BYTES(replacement, a->replacementlen, "%p: rpl_insn: ", replacement);
380
381 memcpy(insnbuf, replacement, a->replacementlen);
382 insnbuf_sz = a->replacementlen;
383
384 /* 0xe8 is a relative jump; fix the offset. */
385 if (*insnbuf == 0xe8 && a->replacementlen == 5) {
386 *(s32 *)(insnbuf + 1) += replacement - instr;
387 DPRINTK("Fix CALL offset: 0x%x, CALL 0x%lx",
388 *(s32 *)(insnbuf + 1),
389 (unsigned long)instr + *(s32 *)(insnbuf + 1) + 5);
390 }
391
392 if (a->replacementlen && is_jmp(replacement[0]))
393 recompute_jump(a, instr, replacement, insnbuf);
394
395 if (a->instrlen > a->replacementlen) {
396 add_nops(insnbuf + a->replacementlen,
397 a->instrlen - a->replacementlen);
398 insnbuf_sz += a->instrlen - a->replacementlen;
399 }
400 DUMP_BYTES(insnbuf, insnbuf_sz, "%p: final_insn: ", instr);
401
402 text_poke_early(instr, insnbuf, insnbuf_sz);
403 }
404 }
405
406 #ifdef CONFIG_SMP
407 static void alternatives_smp_lock(const s32 *start, const s32 *end,
408 u8 *text, u8 *text_end)
409 {
410 const s32 *poff;
411
412 mutex_lock(&text_mutex);
413 for (poff = start; poff < end; poff++) {
414 u8 *ptr = (u8 *)poff + *poff;
415
416 if (!*poff || ptr < text || ptr >= text_end)
417 continue;
418 /* turn DS segment override prefix into lock prefix */
419 if (*ptr == 0x3e)
420 text_poke(ptr, ((unsigned char []){0xf0}), 1);
421 }
422 mutex_unlock(&text_mutex);
423 }
424
425 static void alternatives_smp_unlock(const s32 *start, const s32 *end,
426 u8 *text, u8 *text_end)
427 {
428 const s32 *poff;
429
430 mutex_lock(&text_mutex);
431 for (poff = start; poff < end; poff++) {
432 u8 *ptr = (u8 *)poff + *poff;
433
434 if (!*poff || ptr < text || ptr >= text_end)
435 continue;
436 /* turn lock prefix into DS segment override prefix */
437 if (*ptr == 0xf0)
438 text_poke(ptr, ((unsigned char []){0x3E}), 1);
439 }
440 mutex_unlock(&text_mutex);
441 }
442
443 struct smp_alt_module {
444 /* what is this ??? */
445 struct module *mod;
446 char *name;
447
448 /* ptrs to lock prefixes */
449 const s32 *locks;
450 const s32 *locks_end;
451
452 /* .text segment, needed to avoid patching init code ;) */
453 u8 *text;
454 u8 *text_end;
455
456 struct list_head next;
457 };
458 static LIST_HEAD(smp_alt_modules);
459 static DEFINE_MUTEX(smp_alt);
460 static bool uniproc_patched = false; /* protected by smp_alt */
461
462 void __init_or_module alternatives_smp_module_add(struct module *mod,
463 char *name,
464 void *locks, void *locks_end,
465 void *text, void *text_end)
466 {
467 struct smp_alt_module *smp;
468
469 mutex_lock(&smp_alt);
470 if (!uniproc_patched)
471 goto unlock;
472
473 if (num_possible_cpus() == 1)
474 /* Don't bother remembering, we'll never have to undo it. */
475 goto smp_unlock;
476
477 smp = kzalloc(sizeof(*smp), GFP_KERNEL);
478 if (NULL == smp)
479 /* we'll run the (safe but slow) SMP code then ... */
480 goto unlock;
481
482 smp->mod = mod;
483 smp->name = name;
484 smp->locks = locks;
485 smp->locks_end = locks_end;
486 smp->text = text;
487 smp->text_end = text_end;
488 DPRINTK("locks %p -> %p, text %p -> %p, name %s\n",
489 smp->locks, smp->locks_end,
490 smp->text, smp->text_end, smp->name);
491
492 list_add_tail(&smp->next, &smp_alt_modules);
493 smp_unlock:
494 alternatives_smp_unlock(locks, locks_end, text, text_end);
495 unlock:
496 mutex_unlock(&smp_alt);
497 }
498
499 void __init_or_module alternatives_smp_module_del(struct module *mod)
500 {
501 struct smp_alt_module *item;
502
503 mutex_lock(&smp_alt);
504 list_for_each_entry(item, &smp_alt_modules, next) {
505 if (mod != item->mod)
506 continue;
507 list_del(&item->next);
508 kfree(item);
509 break;
510 }
511 mutex_unlock(&smp_alt);
512 }
513
514 void alternatives_enable_smp(void)
515 {
516 struct smp_alt_module *mod;
517
518 /* Why bother if there are no other CPUs? */
519 BUG_ON(num_possible_cpus() == 1);
520
521 mutex_lock(&smp_alt);
522
523 if (uniproc_patched) {
524 pr_info("switching to SMP code\n");
525 BUG_ON(num_online_cpus() != 1);
526 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_UP);
527 clear_cpu_cap(&cpu_data(0), X86_FEATURE_UP);
528 list_for_each_entry(mod, &smp_alt_modules, next)
529 alternatives_smp_lock(mod->locks, mod->locks_end,
530 mod->text, mod->text_end);
531 uniproc_patched = false;
532 }
533 mutex_unlock(&smp_alt);
534 }
535
536 /* Return 1 if the address range is reserved for smp-alternatives */
537 int alternatives_text_reserved(void *start, void *end)
538 {
539 struct smp_alt_module *mod;
540 const s32 *poff;
541 u8 *text_start = start;
542 u8 *text_end = end;
543
544 list_for_each_entry(mod, &smp_alt_modules, next) {
545 if (mod->text > text_end || mod->text_end < text_start)
546 continue;
547 for (poff = mod->locks; poff < mod->locks_end; poff++) {
548 const u8 *ptr = (const u8 *)poff + *poff;
549
550 if (text_start <= ptr && text_end > ptr)
551 return 1;
552 }
553 }
554
555 return 0;
556 }
557 #endif /* CONFIG_SMP */
558
559 #ifdef CONFIG_PARAVIRT
560 void __init_or_module apply_paravirt(struct paravirt_patch_site *start,
561 struct paravirt_patch_site *end)
562 {
563 struct paravirt_patch_site *p;
564 char insnbuf[MAX_PATCH_LEN];
565
566 if (noreplace_paravirt)
567 return;
568
569 for (p = start; p < end; p++) {
570 unsigned int used;
571
572 BUG_ON(p->len > MAX_PATCH_LEN);
573 /* prep the buffer with the original instructions */
574 memcpy(insnbuf, p->instr, p->len);
575 used = pv_init_ops.patch(p->instrtype, p->clobbers, insnbuf,
576 (unsigned long)p->instr, p->len);
577
578 BUG_ON(used > p->len);
579
580 /* Pad the rest with nops */
581 add_nops(insnbuf + used, p->len - used);
582 text_poke_early(p->instr, insnbuf, p->len);
583 }
584 }
585 extern struct paravirt_patch_site __start_parainstructions[],
586 __stop_parainstructions[];
587 #endif /* CONFIG_PARAVIRT */
588
589 void __init alternative_instructions(void)
590 {
591 /* The patching is not fully atomic, so try to avoid local interruptions
592 that might execute the to be patched code.
593 Other CPUs are not running. */
594 stop_nmi();
595
596 /*
597 * Don't stop machine check exceptions while patching.
598 * MCEs only happen when something got corrupted and in this
599 * case we must do something about the corruption.
600 * Ignoring it is worse than a unlikely patching race.
601 * Also machine checks tend to be broadcast and if one CPU
602 * goes into machine check the others follow quickly, so we don't
603 * expect a machine check to cause undue problems during to code
604 * patching.
605 */
606
607 apply_alternatives(__alt_instructions, __alt_instructions_end);
608
609 #ifdef CONFIG_SMP
610 /* Patch to UP if other cpus not imminent. */
611 if (!noreplace_smp && (num_present_cpus() == 1 || setup_max_cpus <= 1)) {
612 uniproc_patched = true;
613 alternatives_smp_module_add(NULL, "core kernel",
614 __smp_locks, __smp_locks_end,
615 _text, _etext);
616 }
617
618 if (!uniproc_patched || num_possible_cpus() == 1)
619 free_init_pages("SMP alternatives",
620 (unsigned long)__smp_locks,
621 (unsigned long)__smp_locks_end);
622 #endif
623
624 apply_paravirt(__parainstructions, __parainstructions_end);
625
626 restart_nmi();
627 }
628
629 /**
630 * text_poke_early - Update instructions on a live kernel at boot time
631 * @addr: address to modify
632 * @opcode: source of the copy
633 * @len: length to copy
634 *
635 * When you use this code to patch more than one byte of an instruction
636 * you need to make sure that other CPUs cannot execute this code in parallel.
637 * Also no thread must be currently preempted in the middle of these
638 * instructions. And on the local CPU you need to be protected again NMI or MCE
639 * handlers seeing an inconsistent instruction while you patch.
640 */
641 void *__init_or_module text_poke_early(void *addr, const void *opcode,
642 size_t len)
643 {
644 unsigned long flags;
645 local_irq_save(flags);
646 memcpy(addr, opcode, len);
647 sync_core();
648 local_irq_restore(flags);
649 /* Could also do a CLFLUSH here to speed up CPU recovery; but
650 that causes hangs on some VIA CPUs. */
651 return addr;
652 }
653
654 /**
655 * text_poke - Update instructions on a live kernel
656 * @addr: address to modify
657 * @opcode: source of the copy
658 * @len: length to copy
659 *
660 * Only atomic text poke/set should be allowed when not doing early patching.
661 * It means the size must be writable atomically and the address must be aligned
662 * in a way that permits an atomic write. It also makes sure we fit on a single
663 * page.
664 *
665 * Note: Must be called under text_mutex.
666 */
667 void *text_poke(void *addr, const void *opcode, size_t len)
668 {
669 unsigned long flags;
670 char *vaddr;
671 struct page *pages[2];
672 int i;
673
674 if (!core_kernel_text((unsigned long)addr)) {
675 pages[0] = vmalloc_to_page(addr);
676 pages[1] = vmalloc_to_page(addr + PAGE_SIZE);
677 } else {
678 pages[0] = virt_to_page(addr);
679 WARN_ON(!PageReserved(pages[0]));
680 pages[1] = virt_to_page(addr + PAGE_SIZE);
681 }
682 BUG_ON(!pages[0]);
683 local_irq_save(flags);
684 set_fixmap(FIX_TEXT_POKE0, page_to_phys(pages[0]));
685 if (pages[1])
686 set_fixmap(FIX_TEXT_POKE1, page_to_phys(pages[1]));
687 vaddr = (char *)fix_to_virt(FIX_TEXT_POKE0);
688 memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len);
689 clear_fixmap(FIX_TEXT_POKE0);
690 if (pages[1])
691 clear_fixmap(FIX_TEXT_POKE1);
692 local_flush_tlb();
693 sync_core();
694 /* Could also do a CLFLUSH here to speed up CPU recovery; but
695 that causes hangs on some VIA CPUs. */
696 for (i = 0; i < len; i++)
697 BUG_ON(((char *)addr)[i] != ((char *)opcode)[i]);
698 local_irq_restore(flags);
699 return addr;
700 }
701
702 static void do_sync_core(void *info)
703 {
704 sync_core();
705 }
706
707 static bool bp_patching_in_progress;
708 static void *bp_int3_handler, *bp_int3_addr;
709
710 int poke_int3_handler(struct pt_regs *regs)
711 {
712 /* bp_patching_in_progress */
713 smp_rmb();
714
715 if (likely(!bp_patching_in_progress))
716 return 0;
717
718 if (user_mode(regs) || regs->ip != (unsigned long)bp_int3_addr)
719 return 0;
720
721 /* set up the specified breakpoint handler */
722 regs->ip = (unsigned long) bp_int3_handler;
723
724 return 1;
725
726 }
727
728 /**
729 * text_poke_bp() -- update instructions on live kernel on SMP
730 * @addr: address to patch
731 * @opcode: opcode of new instruction
732 * @len: length to copy
733 * @handler: address to jump to when the temporary breakpoint is hit
734 *
735 * Modify multi-byte instruction by using int3 breakpoint on SMP.
736 * We completely avoid stop_machine() here, and achieve the
737 * synchronization using int3 breakpoint.
738 *
739 * The way it is done:
740 * - add a int3 trap to the address that will be patched
741 * - sync cores
742 * - update all but the first byte of the patched range
743 * - sync cores
744 * - replace the first byte (int3) by the first byte of
745 * replacing opcode
746 * - sync cores
747 *
748 * Note: must be called under text_mutex.
749 */
750 void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler)
751 {
752 unsigned char int3 = 0xcc;
753
754 bp_int3_handler = handler;
755 bp_int3_addr = (u8 *)addr + sizeof(int3);
756 bp_patching_in_progress = true;
757 /*
758 * Corresponding read barrier in int3 notifier for
759 * making sure the in_progress flags is correctly ordered wrt.
760 * patching
761 */
762 smp_wmb();
763
764 text_poke(addr, &int3, sizeof(int3));
765
766 on_each_cpu(do_sync_core, NULL, 1);
767
768 if (len - sizeof(int3) > 0) {
769 /* patch all but the first byte */
770 text_poke((char *)addr + sizeof(int3),
771 (const char *) opcode + sizeof(int3),
772 len - sizeof(int3));
773 /*
774 * According to Intel, this core syncing is very likely
775 * not necessary and we'd be safe even without it. But
776 * better safe than sorry (plus there's not only Intel).
777 */
778 on_each_cpu(do_sync_core, NULL, 1);
779 }
780
781 /* patch the first byte */
782 text_poke(addr, opcode, sizeof(int3));
783
784 on_each_cpu(do_sync_core, NULL, 1);
785
786 bp_patching_in_progress = false;
787 smp_wmb();
788
789 return addr;
790 }
791
Linux kernel - Deliverables
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