2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Numascale NumaConnect-Specific APIC Code
8 * Copyright (C) 2011 Numascale AS. All rights reserved.
10 * Send feedback to <support@numascale.com>
14 #include <linux/errno.h>
15 #include <linux/threads.h>
16 #include <linux/cpumask.h>
17 #include <linux/string.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/ctype.h>
21 #include <linux/init.h>
22 #include <linux/hardirq.h>
23 #include <linux/delay.h>
25 #include <asm/numachip/numachip.h>
26 #include <asm/numachip/numachip_csr.h>
30 #include <asm/apic_flat_64.h>
31 #include <asm/pgtable.h>
33 static int numachip_system __read_mostly
;
35 static const struct apic apic_numachip
;
37 static unsigned int get_apic_id(unsigned long x
)
42 rdmsrl(MSR_FAM10H_NODE_ID
, value
);
43 id
= ((x
>> 24) & 0xffU
) | ((value
<< 2) & 0xff00U
);
48 static unsigned long set_apic_id(unsigned int id
)
52 x
= ((id
& 0xffU
) << 24);
56 static unsigned int read_xapic_id(void)
58 return get_apic_id(apic_read(APIC_ID
));
61 static int numachip_apic_id_valid(int apicid
)
63 /* Trust what bootloader passes in MADT */
67 static int numachip_apic_id_registered(void)
69 return physid_isset(read_xapic_id(), phys_cpu_present_map
);
72 static int numachip_phys_pkg_id(int initial_apic_id
, int index_msb
)
74 return initial_apic_id
>> index_msb
;
77 static int numachip_wakeup_secondary(int phys_apicid
, unsigned long start_rip
)
79 union numachip_csr_g3_ext_irq_gen int_gen
;
81 int_gen
.s
._destination_apic_id
= phys_apicid
;
82 int_gen
.s
._vector
= 0;
83 int_gen
.s
._msgtype
= APIC_DM_INIT
>> 8;
86 write_lcsr(CSR_G3_EXT_IRQ_GEN
, int_gen
.v
);
88 int_gen
.s
._msgtype
= APIC_DM_STARTUP
>> 8;
89 int_gen
.s
._vector
= start_rip
>> 12;
91 write_lcsr(CSR_G3_EXT_IRQ_GEN
, int_gen
.v
);
93 atomic_set(&init_deasserted
, 1);
97 static void numachip_send_IPI_one(int cpu
, int vector
)
99 union numachip_csr_g3_ext_irq_gen int_gen
;
100 int apicid
= per_cpu(x86_cpu_to_apicid
, cpu
);
102 int_gen
.s
._destination_apic_id
= apicid
;
103 int_gen
.s
._vector
= vector
;
104 int_gen
.s
._msgtype
= (vector
== NMI_VECTOR
? APIC_DM_NMI
: APIC_DM_FIXED
) >> 8;
105 int_gen
.s
._index
= 0;
107 write_lcsr(CSR_G3_EXT_IRQ_GEN
, int_gen
.v
);
110 static void numachip_send_IPI_mask(const struct cpumask
*mask
, int vector
)
114 for_each_cpu(cpu
, mask
)
115 numachip_send_IPI_one(cpu
, vector
);
118 static void numachip_send_IPI_mask_allbutself(const struct cpumask
*mask
,
121 unsigned int this_cpu
= smp_processor_id();
124 for_each_cpu(cpu
, mask
) {
126 numachip_send_IPI_one(cpu
, vector
);
130 static void numachip_send_IPI_allbutself(int vector
)
132 unsigned int this_cpu
= smp_processor_id();
135 for_each_online_cpu(cpu
) {
137 numachip_send_IPI_one(cpu
, vector
);
141 static void numachip_send_IPI_all(int vector
)
143 numachip_send_IPI_mask(cpu_online_mask
, vector
);
146 static void numachip_send_IPI_self(int vector
)
148 apic_write(APIC_SELF_IPI
, vector
);
151 static int __init
numachip_probe(void)
153 return apic
== &apic_numachip
;
156 static void fixup_cpu_id(struct cpuinfo_x86
*c
, int node
)
158 if (c
->phys_proc_id
!= node
) {
159 c
->phys_proc_id
= node
;
160 per_cpu(cpu_llc_id
, smp_processor_id()) = node
;
164 static int __init
numachip_system_init(void)
166 if (!numachip_system
)
169 init_extra_mapping_uc(NUMACHIP_LCSR_BASE
, NUMACHIP_LCSR_SIZE
);
170 init_extra_mapping_uc(NUMACHIP_GCSR_BASE
, NUMACHIP_GCSR_SIZE
);
172 x86_cpuinit
.fixup_cpu_id
= fixup_cpu_id
;
173 x86_init
.pci
.arch_init
= pci_numachip_init
;
177 early_initcall(numachip_system_init
);
179 static int numachip_acpi_madt_oem_check(char *oem_id
, char *oem_table_id
)
181 if (!strncmp(oem_id
, "NUMASC", 6)) {
189 static const struct apic apic_numachip __refconst
= {
191 .name
= "NumaConnect system",
192 .probe
= numachip_probe
,
193 .acpi_madt_oem_check
= numachip_acpi_madt_oem_check
,
194 .apic_id_valid
= numachip_apic_id_valid
,
195 .apic_id_registered
= numachip_apic_id_registered
,
197 .irq_delivery_mode
= dest_Fixed
,
198 .irq_dest_mode
= 0, /* physical */
200 .target_cpus
= online_target_cpus
,
203 .check_apicid_used
= NULL
,
205 .vector_allocation_domain
= default_vector_allocation_domain
,
206 .init_apic_ldr
= flat_init_apic_ldr
,
208 .ioapic_phys_id_map
= NULL
,
209 .setup_apic_routing
= NULL
,
210 .cpu_present_to_apicid
= default_cpu_present_to_apicid
,
211 .apicid_to_cpu_present
= NULL
,
212 .check_phys_apicid_present
= default_check_phys_apicid_present
,
213 .phys_pkg_id
= numachip_phys_pkg_id
,
215 .get_apic_id
= get_apic_id
,
216 .set_apic_id
= set_apic_id
,
217 .apic_id_mask
= 0xffU
<< 24,
219 .cpu_mask_to_apicid_and
= default_cpu_mask_to_apicid_and
,
221 .send_IPI_mask
= numachip_send_IPI_mask
,
222 .send_IPI_mask_allbutself
= numachip_send_IPI_mask_allbutself
,
223 .send_IPI_allbutself
= numachip_send_IPI_allbutself
,
224 .send_IPI_all
= numachip_send_IPI_all
,
225 .send_IPI_self
= numachip_send_IPI_self
,
227 .wakeup_secondary_cpu
= numachip_wakeup_secondary
,
228 .wait_for_init_deassert
= false,
229 .inquire_remote_apic
= NULL
, /* REMRD not supported */
231 .read
= native_apic_mem_read
,
232 .write
= native_apic_mem_write
,
233 .eoi_write
= native_apic_mem_write
,
234 .icr_read
= native_apic_icr_read
,
235 .icr_write
= native_apic_icr_write
,
236 .wait_icr_idle
= native_apic_wait_icr_idle
,
237 .safe_wait_icr_idle
= native_safe_apic_wait_icr_idle
,
239 apic_driver(apic_numachip
);