2 * AMD CPU Microcode Update Driver for Linux
4 * This driver allows to upgrade microcode on F10h AMD
7 * Copyright (C) 2008-2011 Advanced Micro Devices Inc.
9 * Author: Peter Oruba <peter.oruba@amd.com>
12 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
15 * Copyright (C) 2013 Advanced Micro Devices, Inc.
17 * Author: Jacob Shin <jacob.shin@amd.com>
18 * Fixes: Borislav Petkov <bp@suse.de>
20 * Licensed under the terms of the GNU General Public
21 * License version 2. See file COPYING for details.
23 #define pr_fmt(fmt) "microcode: " fmt
25 #include <linux/earlycpio.h>
26 #include <linux/firmware.h>
27 #include <linux/uaccess.h>
28 #include <linux/vmalloc.h>
29 #include <linux/initrd.h>
30 #include <linux/kernel.h>
31 #include <linux/pci.h>
33 #include <asm/microcode_amd.h>
34 #include <asm/microcode.h>
35 #include <asm/processor.h>
36 #include <asm/setup.h>
40 static struct equiv_cpu_entry
*equiv_cpu_table
;
43 struct list_head plist
;
49 static LIST_HEAD(pcache
);
52 * This points to the current valid container of microcode patches which we will
53 * save from the initrd before jettisoning its contents.
56 static size_t container_size
;
58 static u32 ucode_new_rev
;
59 static u8 amd_ucode_patch
[PATCH_MAX_SIZE
];
60 static u16 this_equiv_id
;
62 static struct cpio_data ucode_cpio
;
64 static struct cpio_data __init
find_ucode_in_initrd(void)
66 #ifdef CONFIG_BLK_DEV_INITRD
72 * Microcode patch container file is prepended to the initrd in cpio
73 * format. See Documentation/x86/early-microcode.txt
75 static __initdata
char ucode_path
[] = "kernel/x86/microcode/AuthenticAMD.bin";
78 struct boot_params
*p
;
81 * On 32-bit, early load occurs before paging is turned on so we need
82 * to use physical addresses.
84 p
= (struct boot_params
*)__pa_nodebug(&boot_params
);
85 path
= (char *)__pa_nodebug(ucode_path
);
86 start
= (void *)p
->hdr
.ramdisk_image
;
87 size
= p
->hdr
.ramdisk_size
;
90 start
= (void *)(boot_params
.hdr
.ramdisk_image
+ PAGE_OFFSET
);
91 size
= boot_params
.hdr
.ramdisk_size
;
92 #endif /* !CONFIG_X86_32 */
94 return find_cpio_data(path
, start
, size
, NULL
);
96 return (struct cpio_data
){ NULL
, 0, "" };
100 static size_t compute_container_size(u8
*data
, u32 total_size
)
103 u32
*header
= (u32
*)data
;
105 if (header
[0] != UCODE_MAGIC
||
106 header
[1] != UCODE_EQUIV_CPU_TABLE_TYPE
|| /* type */
107 header
[2] == 0) /* size */
110 size
= header
[2] + CONTAINER_HDR_SZ
;
117 header
= (u32
*)data
;
119 if (header
[0] != UCODE_UCODE_TYPE
)
123 * Sanity-check patch size.
125 patch_size
= header
[1];
126 if (patch_size
> PATCH_MAX_SIZE
)
129 size
+= patch_size
+ SECTION_HDR_SIZE
;
130 data
+= patch_size
+ SECTION_HDR_SIZE
;
131 total_size
-= patch_size
+ SECTION_HDR_SIZE
;
138 * Early load occurs before we can vmalloc(). So we look for the microcode
139 * patch container file in initrd, traverse equivalent cpu table, look for a
140 * matching microcode patch, and update, all in initrd memory in place.
141 * When vmalloc() is available for use later -- on 64-bit during first AP load,
142 * and on 32-bit during save_microcode_in_initrd_amd() -- we can call
143 * load_microcode_amd() to save equivalent cpu table and microcode patches in
144 * kernel heap memory.
146 static void apply_ucode_in_initrd(void *ucode
, size_t size
, bool save_patch
)
148 struct equiv_cpu_entry
*eq
;
152 u8 (*patch
)[PATCH_MAX_SIZE
];
155 u32 rev
, eax
, ebx
, ecx
, edx
;
159 new_rev
= (u32
*)__pa_nodebug(&ucode_new_rev
);
160 cont_sz
= (size_t *)__pa_nodebug(&container_size
);
161 cont
= (u8
**)__pa_nodebug(&container
);
162 patch
= (u8 (*)[PATCH_MAX_SIZE
])__pa_nodebug(&amd_ucode_patch
);
164 new_rev
= &ucode_new_rev
;
165 cont_sz
= &container_size
;
167 patch
= &amd_ucode_patch
;
172 header
= (u32
*)data
;
174 /* find equiv cpu table */
175 if (header
[0] != UCODE_MAGIC
||
176 header
[1] != UCODE_EQUIV_CPU_TABLE_TYPE
|| /* type */
177 header
[2] == 0) /* size */
182 native_cpuid(&eax
, &ebx
, &ecx
, &edx
);
185 eq
= (struct equiv_cpu_entry
*)(data
+ CONTAINER_HDR_SZ
);
189 /* Advance past the container header */
190 offset
= header
[2] + CONTAINER_HDR_SZ
;
194 eq_id
= find_equiv_id(eq
, eax
);
196 this_equiv_id
= eq_id
;
197 *cont_sz
= compute_container_size(*cont
, left
+ offset
);
200 * truncate how much we need to iterate over in the
201 * ucode update loop below
203 left
= *cont_sz
- offset
;
208 * support multiple container files appended together. if this
209 * one does not have a matching equivalent cpu entry, we fast
210 * forward to the next container file.
213 header
= (u32
*)data
;
214 if (header
[0] == UCODE_MAGIC
&&
215 header
[1] == UCODE_EQUIV_CPU_TABLE_TYPE
)
218 offset
= header
[1] + SECTION_HDR_SIZE
;
223 /* mark where the next microcode container file starts */
224 offset
= data
- (u8
*)ucode
;
234 if (check_current_patch_level(&rev
, true))
238 struct microcode_amd
*mc
;
240 header
= (u32
*)data
;
241 if (header
[0] != UCODE_UCODE_TYPE
|| /* type */
242 header
[1] == 0) /* size */
245 mc
= (struct microcode_amd
*)(data
+ SECTION_HDR_SIZE
);
247 if (eq_id
== mc
->hdr
.processor_rev_id
&& rev
< mc
->hdr
.patch_id
) {
249 if (!__apply_microcode_amd(mc
)) {
250 rev
= mc
->hdr
.patch_id
;
255 min_t(u32
, header
[1], PATCH_MAX_SIZE
));
259 offset
= header
[1] + SECTION_HDR_SIZE
;
265 static bool __init
load_builtin_amd_microcode(struct cpio_data
*cp
,
269 char fw_name
[36] = "amd-ucode/microcode_amd.bin";
272 snprintf(fw_name
, sizeof(fw_name
),
273 "amd-ucode/microcode_amd_fam%.2xh.bin", family
);
275 return get_builtin_firmware(cp
, fw_name
);
281 void __init
load_ucode_amd_bsp(unsigned int family
)
288 data
= (void **)__pa_nodebug(&ucode_cpio
.data
);
289 size
= (size_t *)__pa_nodebug(&ucode_cpio
.size
);
291 data
= &ucode_cpio
.data
;
292 size
= &ucode_cpio
.size
;
295 if (!load_builtin_amd_microcode(&cp
, family
))
296 cp
= find_ucode_in_initrd();
298 if (!(cp
.data
&& cp
.size
))
304 apply_ucode_in_initrd(cp
.data
, cp
.size
, true);
309 * On 32-bit, since AP's early load occurs before paging is turned on, we
310 * cannot traverse cpu_equiv_table and pcache in kernel heap memory. So during
311 * cold boot, AP will apply_ucode_in_initrd() just like the BSP. During
312 * save_microcode_in_initrd_amd() BSP's patch is copied to amd_ucode_patch,
313 * which is used upon resume from suspend.
315 void load_ucode_amd_ap(void)
317 struct microcode_amd
*mc
;
321 mc
= (struct microcode_amd
*)__pa_nodebug(amd_ucode_patch
);
322 if (mc
->hdr
.patch_id
&& mc
->hdr
.processor_rev_id
) {
323 __apply_microcode_amd(mc
);
327 ucode
= (void *)__pa_nodebug(&container
);
328 usize
= (size_t *)__pa_nodebug(&container_size
);
330 if (!*ucode
|| !*usize
)
333 apply_ucode_in_initrd(*ucode
, *usize
, false);
336 static void __init
collect_cpu_sig_on_bsp(void *arg
)
338 unsigned int cpu
= smp_processor_id();
339 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ cpu
;
341 uci
->cpu_sig
.sig
= cpuid_eax(0x00000001);
344 static void __init
get_bsp_sig(void)
346 unsigned int bsp
= boot_cpu_data
.cpu_index
;
347 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ bsp
;
349 if (!uci
->cpu_sig
.sig
)
350 smp_call_function_single(bsp
, collect_cpu_sig_on_bsp
, NULL
, 1);
353 void load_ucode_amd_ap(void)
355 unsigned int cpu
= smp_processor_id();
356 struct equiv_cpu_entry
*eq
;
357 struct microcode_amd
*mc
;
361 /* Exit if called on the BSP. */
369 * 64-bit runs with paging enabled, thus early==false.
371 if (check_current_patch_level(&rev
, false))
374 eax
= cpuid_eax(0x00000001);
375 eq
= (struct equiv_cpu_entry
*)(container
+ CONTAINER_HDR_SZ
);
377 eq_id
= find_equiv_id(eq
, eax
);
381 if (eq_id
== this_equiv_id
) {
382 mc
= (struct microcode_amd
*)amd_ucode_patch
;
384 if (mc
&& rev
< mc
->hdr
.patch_id
) {
385 if (!__apply_microcode_amd(mc
))
386 ucode_new_rev
= mc
->hdr
.patch_id
;
390 if (!ucode_cpio
.data
)
394 * AP has a different equivalence ID than BSP, looks like
395 * mixed-steppings silicon so go through the ucode blob anew.
397 apply_ucode_in_initrd(ucode_cpio
.data
, ucode_cpio
.size
, false);
402 int __init
save_microcode_in_initrd_amd(void)
406 enum ucode_state ret
;
415 cont
= (unsigned long)container
;
416 cont_va
= __va(container
);
419 * We need the physical address of the container for both bitness since
420 * boot_params.hdr.ramdisk_image is a physical address.
422 cont
= __pa(container
);
427 * Take into account the fact that the ramdisk might get relocated and
428 * therefore we need to recompute the container's position in virtual
431 if (relocated_ramdisk
)
432 container
= (u8
*)(__va(relocated_ramdisk
) +
433 (cont
- boot_params
.hdr
.ramdisk_image
));
437 eax
= cpuid_eax(0x00000001);
438 eax
= ((eax
>> 8) & 0xf) + ((eax
>> 20) & 0xff);
440 ret
= load_microcode_amd(smp_processor_id(), eax
, container
, container_size
);
445 * This will be freed any msec now, stash patches for the current
446 * family and switch to patch cache for cpu hotplug, etc later.
454 void reload_ucode_amd(void)
456 struct microcode_amd
*mc
;
460 * early==false because this is a syscore ->resume path and by
461 * that time paging is long enabled.
463 if (check_current_patch_level(&rev
, false))
466 mc
= (struct microcode_amd
*)amd_ucode_patch
;
468 if (mc
&& rev
< mc
->hdr
.patch_id
) {
469 if (!__apply_microcode_amd(mc
)) {
470 ucode_new_rev
= mc
->hdr
.patch_id
;
471 pr_info("reload patch_level=0x%08x\n", ucode_new_rev
);
475 static u16
__find_equiv_id(unsigned int cpu
)
477 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ cpu
;
478 return find_equiv_id(equiv_cpu_table
, uci
->cpu_sig
.sig
);
481 static u32
find_cpu_family_by_equiv_cpu(u16 equiv_cpu
)
485 BUG_ON(!equiv_cpu_table
);
487 while (equiv_cpu_table
[i
].equiv_cpu
!= 0) {
488 if (equiv_cpu
== equiv_cpu_table
[i
].equiv_cpu
)
489 return equiv_cpu_table
[i
].installed_cpu
;
496 * a small, trivial cache of per-family ucode patches
498 static struct ucode_patch
*cache_find_patch(u16 equiv_cpu
)
500 struct ucode_patch
*p
;
502 list_for_each_entry(p
, &pcache
, plist
)
503 if (p
->equiv_cpu
== equiv_cpu
)
508 static void update_cache(struct ucode_patch
*new_patch
)
510 struct ucode_patch
*p
;
512 list_for_each_entry(p
, &pcache
, plist
) {
513 if (p
->equiv_cpu
== new_patch
->equiv_cpu
) {
514 if (p
->patch_id
>= new_patch
->patch_id
)
515 /* we already have the latest patch */
518 list_replace(&p
->plist
, &new_patch
->plist
);
524 /* no patch found, add it */
525 list_add_tail(&new_patch
->plist
, &pcache
);
528 static void free_cache(void)
530 struct ucode_patch
*p
, *tmp
;
532 list_for_each_entry_safe(p
, tmp
, &pcache
, plist
) {
533 __list_del(p
->plist
.prev
, p
->plist
.next
);
539 static struct ucode_patch
*find_patch(unsigned int cpu
)
543 equiv_id
= __find_equiv_id(cpu
);
547 return cache_find_patch(equiv_id
);
550 static int collect_cpu_info_amd(int cpu
, struct cpu_signature
*csig
)
552 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
553 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ cpu
;
554 struct ucode_patch
*p
;
556 csig
->sig
= cpuid_eax(0x00000001);
557 csig
->rev
= c
->microcode
;
560 * a patch could have been loaded early, set uci->mc so that
561 * mc_bp_resume() can call apply_microcode()
564 if (p
&& (p
->patch_id
== csig
->rev
))
567 pr_info("CPU%d: patch_level=0x%08x\n", cpu
, csig
->rev
);
572 static unsigned int verify_patch_size(u8 family
, u32 patch_size
,
577 #define F1XH_MPB_MAX_SIZE 2048
578 #define F14H_MPB_MAX_SIZE 1824
579 #define F15H_MPB_MAX_SIZE 4096
580 #define F16H_MPB_MAX_SIZE 3458
584 max_size
= F14H_MPB_MAX_SIZE
;
587 max_size
= F15H_MPB_MAX_SIZE
;
590 max_size
= F16H_MPB_MAX_SIZE
;
593 max_size
= F1XH_MPB_MAX_SIZE
;
597 if (patch_size
> min_t(u32
, size
, max_size
)) {
598 pr_err("patch size mismatch\n");
606 * Those patch levels cannot be updated to newer ones and thus should be final.
608 static u32 final_levels
[] = {
612 0, /* T-101 terminator */
616 * Check the current patch level on this CPU.
618 * @rev: Use it to return the patch level. It is set to 0 in the case of
622 * - true: if update should stop
625 bool check_current_patch_level(u32
*rev
, bool early
)
631 native_rdmsr(MSR_AMD64_PATCH_LEVEL
, lvl
, dummy
);
633 if (IS_ENABLED(CONFIG_X86_32
) && early
)
634 levels
= (u32
*)__pa_nodebug(&final_levels
);
636 levels
= final_levels
;
638 for (i
= 0; levels
[i
]; i
++) {
639 if (lvl
== levels
[i
]) {
652 int __apply_microcode_amd(struct microcode_amd
*mc_amd
)
656 native_wrmsrl(MSR_AMD64_PATCH_LOADER
, (u64
)(long)&mc_amd
->hdr
.data_code
);
658 /* verify patch application was successful */
659 native_rdmsr(MSR_AMD64_PATCH_LEVEL
, rev
, dummy
);
660 if (rev
!= mc_amd
->hdr
.patch_id
)
666 int apply_microcode_amd(int cpu
)
668 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
669 struct microcode_amd
*mc_amd
;
670 struct ucode_cpu_info
*uci
;
671 struct ucode_patch
*p
;
674 BUG_ON(raw_smp_processor_id() != cpu
);
676 uci
= ucode_cpu_info
+ cpu
;
685 if (check_current_patch_level(&rev
, false))
688 /* need to apply patch? */
689 if (rev
>= mc_amd
->hdr
.patch_id
) {
691 uci
->cpu_sig
.rev
= rev
;
695 if (__apply_microcode_amd(mc_amd
)) {
696 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
697 cpu
, mc_amd
->hdr
.patch_id
);
700 pr_info("CPU%d: new patch_level=0x%08x\n", cpu
,
701 mc_amd
->hdr
.patch_id
);
703 uci
->cpu_sig
.rev
= mc_amd
->hdr
.patch_id
;
704 c
->microcode
= mc_amd
->hdr
.patch_id
;
709 static int install_equiv_cpu_table(const u8
*buf
)
711 unsigned int *ibuf
= (unsigned int *)buf
;
712 unsigned int type
= ibuf
[1];
713 unsigned int size
= ibuf
[2];
715 if (type
!= UCODE_EQUIV_CPU_TABLE_TYPE
|| !size
) {
716 pr_err("empty section/"
717 "invalid type field in container file section header\n");
721 equiv_cpu_table
= vmalloc(size
);
722 if (!equiv_cpu_table
) {
723 pr_err("failed to allocate equivalent CPU table\n");
727 memcpy(equiv_cpu_table
, buf
+ CONTAINER_HDR_SZ
, size
);
729 /* add header length */
730 return size
+ CONTAINER_HDR_SZ
;
733 static void free_equiv_cpu_table(void)
735 vfree(equiv_cpu_table
);
736 equiv_cpu_table
= NULL
;
739 static void cleanup(void)
741 free_equiv_cpu_table();
746 * We return the current size even if some of the checks failed so that
747 * we can skip over the next patch. If we return a negative value, we
748 * signal a grave error like a memory allocation has failed and the
749 * driver cannot continue functioning normally. In such cases, we tear
750 * down everything we've used up so far and exit.
752 static int verify_and_add_patch(u8 family
, u8
*fw
, unsigned int leftover
)
754 struct microcode_header_amd
*mc_hdr
;
755 struct ucode_patch
*patch
;
756 unsigned int patch_size
, crnt_size
, ret
;
760 patch_size
= *(u32
*)(fw
+ 4);
761 crnt_size
= patch_size
+ SECTION_HDR_SIZE
;
762 mc_hdr
= (struct microcode_header_amd
*)(fw
+ SECTION_HDR_SIZE
);
763 proc_id
= mc_hdr
->processor_rev_id
;
765 proc_fam
= find_cpu_family_by_equiv_cpu(proc_id
);
767 pr_err("No patch family for equiv ID: 0x%04x\n", proc_id
);
771 /* check if patch is for the current family */
772 proc_fam
= ((proc_fam
>> 8) & 0xf) + ((proc_fam
>> 20) & 0xff);
773 if (proc_fam
!= family
)
776 if (mc_hdr
->nb_dev_id
|| mc_hdr
->sb_dev_id
) {
777 pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n",
782 ret
= verify_patch_size(family
, patch_size
, leftover
);
784 pr_err("Patch-ID 0x%08x: size mismatch.\n", mc_hdr
->patch_id
);
788 patch
= kzalloc(sizeof(*patch
), GFP_KERNEL
);
790 pr_err("Patch allocation failure.\n");
794 patch
->data
= kmemdup(fw
+ SECTION_HDR_SIZE
, patch_size
, GFP_KERNEL
);
796 pr_err("Patch data allocation failure.\n");
801 INIT_LIST_HEAD(&patch
->plist
);
802 patch
->patch_id
= mc_hdr
->patch_id
;
803 patch
->equiv_cpu
= proc_id
;
805 pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n",
806 __func__
, patch
->patch_id
, proc_id
);
808 /* ... and add to cache. */
814 static enum ucode_state
__load_microcode_amd(u8 family
, const u8
*data
,
817 enum ucode_state ret
= UCODE_ERROR
;
818 unsigned int leftover
;
823 offset
= install_equiv_cpu_table(data
);
825 pr_err("failed to create equivalent cpu table\n");
829 leftover
= size
- offset
;
831 if (*(u32
*)fw
!= UCODE_UCODE_TYPE
) {
832 pr_err("invalid type field in container file section header\n");
833 free_equiv_cpu_table();
838 crnt_size
= verify_and_add_patch(family
, fw
, leftover
);
843 leftover
-= crnt_size
;
849 enum ucode_state
load_microcode_amd(int cpu
, u8 family
, const u8
*data
, size_t size
)
851 enum ucode_state ret
;
853 /* free old equiv table */
854 free_equiv_cpu_table();
856 ret
= __load_microcode_amd(family
, data
, size
);
862 /* save BSP's matching patch for early load */
863 if (cpu_data(cpu
).cpu_index
== boot_cpu_data
.cpu_index
) {
864 struct ucode_patch
*p
= find_patch(cpu
);
866 memset(amd_ucode_patch
, 0, PATCH_MAX_SIZE
);
867 memcpy(amd_ucode_patch
, p
->data
, min_t(u32
, ksize(p
->data
),
876 * AMD microcode firmware naming convention, up to family 15h they are in
879 * amd-ucode/microcode_amd.bin
881 * This legacy file is always smaller than 2K in size.
883 * Beginning with family 15h, they are in family-specific firmware files:
885 * amd-ucode/microcode_amd_fam15h.bin
886 * amd-ucode/microcode_amd_fam16h.bin
889 * These might be larger than 2K.
891 static enum ucode_state
request_microcode_amd(int cpu
, struct device
*device
,
894 char fw_name
[36] = "amd-ucode/microcode_amd.bin";
895 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
896 enum ucode_state ret
= UCODE_NFOUND
;
897 const struct firmware
*fw
;
899 /* reload ucode container only on the boot cpu */
900 if (!refresh_fw
|| c
->cpu_index
!= boot_cpu_data
.cpu_index
)
904 snprintf(fw_name
, sizeof(fw_name
), "amd-ucode/microcode_amd_fam%.2xh.bin", c
->x86
);
906 if (request_firmware_direct(&fw
, (const char *)fw_name
, device
)) {
907 pr_debug("failed to load file %s\n", fw_name
);
912 if (*(u32
*)fw
->data
!= UCODE_MAGIC
) {
913 pr_err("invalid magic value (0x%08x)\n", *(u32
*)fw
->data
);
917 ret
= load_microcode_amd(cpu
, c
->x86
, fw
->data
, fw
->size
);
920 release_firmware(fw
);
926 static enum ucode_state
927 request_microcode_user(int cpu
, const void __user
*buf
, size_t size
)
932 static void microcode_fini_cpu_amd(int cpu
)
934 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ cpu
;
939 static struct microcode_ops microcode_amd_ops
= {
940 .request_microcode_user
= request_microcode_user
,
941 .request_microcode_fw
= request_microcode_amd
,
942 .collect_cpu_info
= collect_cpu_info_amd
,
943 .apply_microcode
= apply_microcode_amd
,
944 .microcode_fini_cpu
= microcode_fini_cpu_amd
,
947 struct microcode_ops
* __init
init_amd_microcode(void)
949 struct cpuinfo_x86
*c
= &boot_cpu_data
;
951 if (c
->x86_vendor
!= X86_VENDOR_AMD
|| c
->x86
< 0x10) {
952 pr_warn("AMD CPU family 0x%x not supported\n", c
->x86
);
957 pr_info_once("microcode updated early to new patch_level=0x%08x\n",
960 return µcode_amd_ops
;
963 void __exit
exit_amd_microcode(void)