35186a0dd5fcc1012181df1cf23d0b44c2fc779f
[deliverable/linux.git] / arch / x86 / kernel / cpu / microcode / intel.c
1 /*
2 * Intel CPU Microcode Update Driver for Linux
3 *
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
6 *
7 * Intel CPU microcode early update for Linux
8 *
9 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
10 * H Peter Anvin" <hpa@zytor.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18 /*
19 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
20 * printk calls into no_printk().
21 *
22 *#define DEBUG
23 */
24 #define pr_fmt(fmt) "microcode: " fmt
25
26 #include <linux/earlycpio.h>
27 #include <linux/firmware.h>
28 #include <linux/uaccess.h>
29 #include <linux/vmalloc.h>
30 #include <linux/initrd.h>
31 #include <linux/kernel.h>
32 #include <linux/slab.h>
33 #include <linux/cpu.h>
34 #include <linux/mm.h>
35
36 #include <asm/microcode_intel.h>
37 #include <asm/processor.h>
38 #include <asm/tlbflush.h>
39 #include <asm/setup.h>
40 #include <asm/msr.h>
41
42 static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
43 static struct mc_saved_data {
44 unsigned int num_saved;
45 struct microcode_intel **mc_saved;
46 } mc_saved_data;
47
48 static enum ucode_state
49 load_microcode_early(struct microcode_intel **saved,
50 unsigned int num_saved, struct ucode_cpu_info *uci)
51 {
52 struct microcode_intel *ucode_ptr, *new_mc = NULL;
53 struct microcode_header_intel *mc_hdr;
54 int new_rev, ret, i;
55
56 new_rev = uci->cpu_sig.rev;
57
58 for (i = 0; i < num_saved; i++) {
59 ucode_ptr = saved[i];
60 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
61
62 ret = has_newer_microcode(ucode_ptr,
63 uci->cpu_sig.sig,
64 uci->cpu_sig.pf,
65 new_rev);
66 if (!ret)
67 continue;
68
69 new_rev = mc_hdr->rev;
70 new_mc = ucode_ptr;
71 }
72
73 if (!new_mc)
74 return UCODE_NFOUND;
75
76 uci->mc = (struct microcode_intel *)new_mc;
77 return UCODE_OK;
78 }
79
80 static inline void
81 copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd,
82 unsigned long off, int num_saved)
83 {
84 int i;
85
86 for (i = 0; i < num_saved; i++)
87 mc_saved[i] = (struct microcode_intel *)(initrd[i] + off);
88 }
89
90 #ifdef CONFIG_X86_32
91 static void
92 microcode_phys(struct microcode_intel **mc_saved_tmp, struct mc_saved_data *mcs)
93 {
94 int i;
95 struct microcode_intel ***mc_saved;
96
97 mc_saved = (struct microcode_intel ***)__pa_nodebug(&mcs->mc_saved);
98
99 for (i = 0; i < mcs->num_saved; i++) {
100 struct microcode_intel *p;
101
102 p = *(struct microcode_intel **)__pa_nodebug(mcs->mc_saved + i);
103 mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
104 }
105 }
106 #endif
107
108 static enum ucode_state
109 load_microcode(struct mc_saved_data *mcs, unsigned long *initrd,
110 unsigned long initrd_start, struct ucode_cpu_info *uci)
111 {
112 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
113 unsigned int count = mcs->num_saved;
114
115 if (!mcs->mc_saved) {
116 copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
117
118 return load_microcode_early(mc_saved_tmp, count, uci);
119 } else {
120 #ifdef CONFIG_X86_32
121 microcode_phys(mc_saved_tmp, mcs);
122 return load_microcode_early(mc_saved_tmp, count, uci);
123 #else
124 return load_microcode_early(mcs->mc_saved, count, uci);
125 #endif
126 }
127 }
128
129 /*
130 * Given CPU signature and a microcode patch, this function finds if the
131 * microcode patch has matching family and model with the CPU.
132 */
133 static enum ucode_state
134 matching_model_microcode(struct microcode_header_intel *mc_header,
135 unsigned long sig)
136 {
137 unsigned int fam, model;
138 unsigned int fam_ucode, model_ucode;
139 struct extended_sigtable *ext_header;
140 unsigned long total_size = get_totalsize(mc_header);
141 unsigned long data_size = get_datasize(mc_header);
142 int ext_sigcount, i;
143 struct extended_signature *ext_sig;
144
145 fam = x86_family(sig);
146 model = x86_model(sig);
147
148 fam_ucode = x86_family(mc_header->sig);
149 model_ucode = x86_model(mc_header->sig);
150
151 if (fam == fam_ucode && model == model_ucode)
152 return UCODE_OK;
153
154 /* Look for ext. headers: */
155 if (total_size <= data_size + MC_HEADER_SIZE)
156 return UCODE_NFOUND;
157
158 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
159 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
160 ext_sigcount = ext_header->count;
161
162 for (i = 0; i < ext_sigcount; i++) {
163 fam_ucode = x86_family(ext_sig->sig);
164 model_ucode = x86_model(ext_sig->sig);
165
166 if (fam == fam_ucode && model == model_ucode)
167 return UCODE_OK;
168
169 ext_sig++;
170 }
171 return UCODE_NFOUND;
172 }
173
174 static int
175 save_microcode(struct mc_saved_data *mcs,
176 struct microcode_intel **mc_saved_src,
177 unsigned int num_saved)
178 {
179 int i, j;
180 struct microcode_intel **saved_ptr;
181 int ret;
182
183 if (!num_saved)
184 return -EINVAL;
185
186 /*
187 * Copy new microcode data.
188 */
189 saved_ptr = kcalloc(num_saved, sizeof(struct microcode_intel *), GFP_KERNEL);
190 if (!saved_ptr)
191 return -ENOMEM;
192
193 for (i = 0; i < num_saved; i++) {
194 struct microcode_header_intel *mc_hdr;
195 struct microcode_intel *mc;
196 unsigned long size;
197
198 if (!mc_saved_src[i]) {
199 ret = -EINVAL;
200 goto err;
201 }
202
203 mc = mc_saved_src[i];
204 mc_hdr = &mc->hdr;
205 size = get_totalsize(mc_hdr);
206
207 saved_ptr[i] = kmalloc(size, GFP_KERNEL);
208 if (!saved_ptr[i]) {
209 ret = -ENOMEM;
210 goto err;
211 }
212
213 memcpy(saved_ptr[i], mc, size);
214 }
215
216 /*
217 * Point to newly saved microcode.
218 */
219 mcs->mc_saved = saved_ptr;
220 mcs->num_saved = num_saved;
221
222 return 0;
223
224 err:
225 for (j = 0; j <= i; j++)
226 kfree(saved_ptr[j]);
227 kfree(saved_ptr);
228
229 return ret;
230 }
231
232 /*
233 * A microcode patch in ucode_ptr is saved into mc_saved
234 * - if it has matching signature and newer revision compared to an existing
235 * patch mc_saved.
236 * - or if it is a newly discovered microcode patch.
237 *
238 * The microcode patch should have matching model with CPU.
239 *
240 * Returns: The updated number @num_saved of saved microcode patches.
241 */
242 static unsigned int _save_mc(struct microcode_intel **mc_saved,
243 u8 *ucode_ptr, unsigned int num_saved)
244 {
245 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
246 unsigned int sig, pf;
247 int found = 0, i;
248
249 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
250
251 for (i = 0; i < num_saved; i++) {
252 mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
253 sig = mc_saved_hdr->sig;
254 pf = mc_saved_hdr->pf;
255
256 if (!find_matching_signature(ucode_ptr, sig, pf))
257 continue;
258
259 found = 1;
260
261 if (mc_hdr->rev <= mc_saved_hdr->rev)
262 continue;
263
264 /*
265 * Found an older ucode saved earlier. Replace it with
266 * this newer one.
267 */
268 mc_saved[i] = (struct microcode_intel *)ucode_ptr;
269 break;
270 }
271
272 /* Newly detected microcode, save it to memory. */
273 if (i >= num_saved && !found)
274 mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
275
276 return num_saved;
277 }
278
279 /*
280 * Get microcode matching with BSP's model. Only CPUs with the same model as
281 * BSP can stay in the platform.
282 */
283 static enum ucode_state __init
284 get_matching_model_microcode(int cpu, unsigned long start,
285 void *data, size_t size,
286 struct mc_saved_data *mcs,
287 unsigned long *mc_saved_in_initrd,
288 struct ucode_cpu_info *uci)
289 {
290 u8 *ucode_ptr = data;
291 unsigned int leftover = size;
292 enum ucode_state state = UCODE_OK;
293 unsigned int mc_size;
294 struct microcode_header_intel *mc_header;
295 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
296 unsigned int num_saved = mcs->num_saved;
297 int i;
298
299 while (leftover && num_saved < ARRAY_SIZE(mc_saved_tmp)) {
300
301 if (leftover < sizeof(mc_header))
302 break;
303
304 mc_header = (struct microcode_header_intel *)ucode_ptr;
305
306 mc_size = get_totalsize(mc_header);
307 if (!mc_size || mc_size > leftover ||
308 microcode_sanity_check(ucode_ptr, 0) < 0)
309 break;
310
311 leftover -= mc_size;
312
313 /*
314 * Since APs with same family and model as the BSP may boot in
315 * the platform, we need to find and save microcode patches
316 * with the same family and model as the BSP.
317 */
318 if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
319 UCODE_OK) {
320 ucode_ptr += mc_size;
321 continue;
322 }
323
324 num_saved = _save_mc(mc_saved_tmp, ucode_ptr, num_saved);
325
326 ucode_ptr += mc_size;
327 }
328
329 if (leftover) {
330 state = UCODE_ERROR;
331 goto out;
332 }
333
334 if (!num_saved) {
335 state = UCODE_NFOUND;
336 goto out;
337 }
338
339 for (i = 0; i < num_saved; i++)
340 mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
341
342 mcs->num_saved = num_saved;
343 out:
344 return state;
345 }
346
347 static int collect_cpu_info_early(struct ucode_cpu_info *uci)
348 {
349 unsigned int val[2];
350 unsigned int family, model;
351 struct cpu_signature csig;
352 unsigned int eax, ebx, ecx, edx;
353
354 csig.sig = 0;
355 csig.pf = 0;
356 csig.rev = 0;
357
358 memset(uci, 0, sizeof(*uci));
359
360 eax = 0x00000001;
361 ecx = 0;
362 native_cpuid(&eax, &ebx, &ecx, &edx);
363 csig.sig = eax;
364
365 family = x86_family(csig.sig);
366 model = x86_model(csig.sig);
367
368 if ((model >= 5) || (family > 6)) {
369 /* get processor flags from MSR 0x17 */
370 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
371 csig.pf = 1 << ((val[1] >> 18) & 7);
372 }
373 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
374
375 /* As documented in the SDM: Do a CPUID 1 here */
376 sync_core();
377
378 /* get the current revision from MSR 0x8B */
379 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
380
381 csig.rev = val[1];
382
383 uci->cpu_sig = csig;
384 uci->valid = 1;
385
386 return 0;
387 }
388
389 static void show_saved_mc(void)
390 {
391 #ifdef DEBUG
392 int i, j;
393 unsigned int sig, pf, rev, total_size, data_size, date;
394 struct ucode_cpu_info uci;
395
396 if (!mc_saved_data.num_saved) {
397 pr_debug("no microcode data saved.\n");
398 return;
399 }
400 pr_debug("Total microcode saved: %d\n", mc_saved_data.num_saved);
401
402 collect_cpu_info_early(&uci);
403
404 sig = uci.cpu_sig.sig;
405 pf = uci.cpu_sig.pf;
406 rev = uci.cpu_sig.rev;
407 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
408
409 for (i = 0; i < mc_saved_data.num_saved; i++) {
410 struct microcode_header_intel *mc_saved_header;
411 struct extended_sigtable *ext_header;
412 int ext_sigcount;
413 struct extended_signature *ext_sig;
414
415 mc_saved_header = (struct microcode_header_intel *)
416 mc_saved_data.mc_saved[i];
417 sig = mc_saved_header->sig;
418 pf = mc_saved_header->pf;
419 rev = mc_saved_header->rev;
420 total_size = get_totalsize(mc_saved_header);
421 data_size = get_datasize(mc_saved_header);
422 date = mc_saved_header->date;
423
424 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
425 i, sig, pf, rev, total_size,
426 date & 0xffff,
427 date >> 24,
428 (date >> 16) & 0xff);
429
430 /* Look for ext. headers: */
431 if (total_size <= data_size + MC_HEADER_SIZE)
432 continue;
433
434 ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
435 ext_sigcount = ext_header->count;
436 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
437
438 for (j = 0; j < ext_sigcount; j++) {
439 sig = ext_sig->sig;
440 pf = ext_sig->pf;
441
442 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
443 j, sig, pf);
444
445 ext_sig++;
446 }
447
448 }
449 #endif
450 }
451
452 #ifdef CONFIG_HOTPLUG_CPU
453 static DEFINE_MUTEX(x86_cpu_microcode_mutex);
454 /*
455 * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
456 * hot added or resumes.
457 *
458 * Please make sure this mc should be a valid microcode patch before calling
459 * this function.
460 */
461 int save_mc_for_early(u8 *mc)
462 {
463 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
464 unsigned int mc_saved_count_init;
465 unsigned int num_saved;
466 struct microcode_intel **mc_saved;
467 int ret = 0;
468 int i;
469
470 /*
471 * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
472 * hotplug.
473 */
474 mutex_lock(&x86_cpu_microcode_mutex);
475
476 mc_saved_count_init = mc_saved_data.num_saved;
477 num_saved = mc_saved_data.num_saved;
478 mc_saved = mc_saved_data.mc_saved;
479
480 if (mc_saved && num_saved)
481 memcpy(mc_saved_tmp, mc_saved,
482 num_saved * sizeof(struct microcode_intel *));
483 /*
484 * Save the microcode patch mc in mc_save_tmp structure if it's a newer
485 * version.
486 */
487 num_saved = _save_mc(mc_saved_tmp, mc, num_saved);
488
489 /*
490 * Save the mc_save_tmp in global mc_saved_data.
491 */
492 ret = save_microcode(&mc_saved_data, mc_saved_tmp, num_saved);
493 if (ret) {
494 pr_err("Cannot save microcode patch.\n");
495 goto out;
496 }
497
498 show_saved_mc();
499
500 /*
501 * Free old saved microcode data.
502 */
503 if (mc_saved) {
504 for (i = 0; i < mc_saved_count_init; i++)
505 kfree(mc_saved[i]);
506 kfree(mc_saved);
507 }
508
509 out:
510 mutex_unlock(&x86_cpu_microcode_mutex);
511
512 return ret;
513 }
514 EXPORT_SYMBOL_GPL(save_mc_for_early);
515 #endif
516
517 static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
518 {
519 #ifdef CONFIG_X86_64
520 unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
521 char name[30];
522
523 native_cpuid(&eax, &ebx, &ecx, &edx);
524
525 sprintf(name, "intel-ucode/%02x-%02x-%02x",
526 x86_family(eax), x86_model(eax), x86_stepping(eax));
527
528 return get_builtin_firmware(cp, name);
529 #else
530 return false;
531 #endif
532 }
533
534 static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
535 static __init enum ucode_state
536 scan_microcode(struct mc_saved_data *mcs, unsigned long *initrd,
537 unsigned long start, unsigned long size,
538 struct ucode_cpu_info *uci)
539 {
540 struct cpio_data cd;
541 long offset = 0;
542 #ifdef CONFIG_X86_32
543 char *p = (char *)__pa_nodebug(ucode_name);
544 #else
545 char *p = ucode_name;
546 #endif
547
548 cd.data = NULL;
549 cd.size = 0;
550
551 /* try built-in microcode if no initrd */
552 if (!size) {
553 if (!load_builtin_intel_microcode(&cd))
554 return UCODE_ERROR;
555 } else {
556 cd = find_cpio_data(p, (void *)start, size, &offset);
557 if (!cd.data)
558 return UCODE_ERROR;
559 }
560
561 return get_matching_model_microcode(0, start, cd.data, cd.size,
562 mcs, initrd, uci);
563 }
564
565 /*
566 * Print ucode update info.
567 */
568 static void
569 print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
570 {
571 pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
572 uci->cpu_sig.rev,
573 date & 0xffff,
574 date >> 24,
575 (date >> 16) & 0xff);
576 }
577
578 #ifdef CONFIG_X86_32
579
580 static int delay_ucode_info;
581 static int current_mc_date;
582
583 /*
584 * Print early updated ucode info after printk works. This is delayed info dump.
585 */
586 void show_ucode_info_early(void)
587 {
588 struct ucode_cpu_info uci;
589
590 if (delay_ucode_info) {
591 collect_cpu_info_early(&uci);
592 print_ucode_info(&uci, current_mc_date);
593 delay_ucode_info = 0;
594 }
595 }
596
597 /*
598 * At this point, we can not call printk() yet. Keep microcode patch number in
599 * mc_saved_data.mc_saved and delay printing microcode info in
600 * show_ucode_info_early() until printk() works.
601 */
602 static void print_ucode(struct ucode_cpu_info *uci)
603 {
604 struct microcode_intel *mc;
605 int *delay_ucode_info_p;
606 int *current_mc_date_p;
607
608 mc = uci->mc;
609 if (!mc)
610 return;
611
612 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
613 current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
614
615 *delay_ucode_info_p = 1;
616 *current_mc_date_p = mc->hdr.date;
617 }
618 #else
619
620 /*
621 * Flush global tlb. We only do this in x86_64 where paging has been enabled
622 * already and PGE should be enabled as well.
623 */
624 static inline void flush_tlb_early(void)
625 {
626 __native_flush_tlb_global_irq_disabled();
627 }
628
629 static inline void print_ucode(struct ucode_cpu_info *uci)
630 {
631 struct microcode_intel *mc;
632
633 mc = uci->mc;
634 if (!mc)
635 return;
636
637 print_ucode_info(uci, mc->hdr.date);
638 }
639 #endif
640
641 static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
642 {
643 struct microcode_intel *mc;
644 unsigned int val[2];
645
646 mc = uci->mc;
647 if (!mc)
648 return 0;
649
650 /* write microcode via MSR 0x79 */
651 native_wrmsr(MSR_IA32_UCODE_WRITE,
652 (unsigned long)mc->bits,
653 (unsigned long)mc->bits >> 16 >> 16);
654 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
655
656 /* As documented in the SDM: Do a CPUID 1 here */
657 sync_core();
658
659 /* get the current revision from MSR 0x8B */
660 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
661 if (val[1] != mc->hdr.rev)
662 return -1;
663
664 #ifdef CONFIG_X86_64
665 /* Flush global tlb. This is precaution. */
666 flush_tlb_early();
667 #endif
668 uci->cpu_sig.rev = val[1];
669
670 if (early)
671 print_ucode(uci);
672 else
673 print_ucode_info(uci, mc->hdr.date);
674
675 return 0;
676 }
677
678 /*
679 * This function converts microcode patch offsets previously stored in
680 * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
681 */
682 int __init save_microcode_in_initrd_intel(void)
683 {
684 unsigned int count = mc_saved_data.num_saved;
685 struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
686 int ret = 0;
687
688 if (!count)
689 return ret;
690
691 copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, get_initrd_start(), count);
692
693 ret = save_microcode(&mc_saved_data, mc_saved, count);
694 if (ret)
695 pr_err("Cannot save microcode patches from initrd.\n");
696
697 show_saved_mc();
698
699 return ret;
700 }
701
702 static void __init
703 _load_ucode_intel_bsp(struct mc_saved_data *mcs, unsigned long *initrd,
704 unsigned long start, unsigned long size)
705 {
706 struct ucode_cpu_info uci;
707 enum ucode_state ret;
708
709 collect_cpu_info_early(&uci);
710
711 ret = scan_microcode(mcs, initrd, start, size, &uci);
712 if (ret != UCODE_OK)
713 return;
714
715 ret = load_microcode(mcs, initrd, start, &uci);
716 if (ret != UCODE_OK)
717 return;
718
719 apply_microcode_early(&uci, true);
720 }
721
722 void __init load_ucode_intel_bsp(void)
723 {
724 u64 start, size;
725 #ifdef CONFIG_X86_32
726 struct boot_params *p;
727
728 p = (struct boot_params *)__pa_nodebug(&boot_params);
729 size = p->hdr.ramdisk_size;
730
731 /*
732 * Set start only if we have an initrd image. We cannot use initrd_start
733 * because it is not set that early yet.
734 */
735 start = (size ? p->hdr.ramdisk_image : 0);
736
737 _load_ucode_intel_bsp((struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
738 (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
739 start, size);
740 #else
741 size = boot_params.hdr.ramdisk_size;
742 start = (size ? boot_params.hdr.ramdisk_image + PAGE_OFFSET : 0);
743
744 _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size);
745 #endif
746 }
747
748 void load_ucode_intel_ap(void)
749 {
750 unsigned long *mc_saved_in_initrd_p;
751 struct mc_saved_data *mcs_p;
752 struct ucode_cpu_info uci;
753 enum ucode_state ret;
754 #ifdef CONFIG_X86_32
755
756 mc_saved_in_initrd_p = (unsigned long *)__pa_nodebug(mc_saved_in_initrd);
757 mcs_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
758 #else
759 mc_saved_in_initrd_p = mc_saved_in_initrd;
760 mcs_p = &mc_saved_data;
761 #endif
762
763 /*
764 * If there is no valid ucode previously saved in memory, no need to
765 * update ucode on this AP.
766 */
767 if (!mcs_p->num_saved)
768 return;
769
770 collect_cpu_info_early(&uci);
771 ret = load_microcode(mcs_p, mc_saved_in_initrd_p,
772 get_initrd_start_addr(), &uci);
773
774 if (ret != UCODE_OK)
775 return;
776
777 apply_microcode_early(&uci, true);
778 }
779
780 void reload_ucode_intel(void)
781 {
782 struct ucode_cpu_info uci;
783 enum ucode_state ret;
784
785 if (!mc_saved_data.num_saved)
786 return;
787
788 collect_cpu_info_early(&uci);
789
790 ret = load_microcode_early(mc_saved_data.mc_saved,
791 mc_saved_data.num_saved, &uci);
792 if (ret != UCODE_OK)
793 return;
794
795 apply_microcode_early(&uci, false);
796 }
797
798 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
799 {
800 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
801 unsigned int val[2];
802
803 memset(csig, 0, sizeof(*csig));
804
805 csig->sig = cpuid_eax(0x00000001);
806
807 if ((c->x86_model >= 5) || (c->x86 > 6)) {
808 /* get processor flags from MSR 0x17 */
809 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
810 csig->pf = 1 << ((val[1] >> 18) & 7);
811 }
812
813 csig->rev = c->microcode;
814 pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
815 cpu_num, csig->sig, csig->pf, csig->rev);
816
817 return 0;
818 }
819
820 /*
821 * return 0 - no update found
822 * return 1 - found update
823 */
824 static int get_matching_mc(struct microcode_intel *mc, int cpu)
825 {
826 struct cpu_signature cpu_sig;
827 unsigned int csig, cpf, crev;
828
829 collect_cpu_info(cpu, &cpu_sig);
830
831 csig = cpu_sig.sig;
832 cpf = cpu_sig.pf;
833 crev = cpu_sig.rev;
834
835 return has_newer_microcode(mc, csig, cpf, crev);
836 }
837
838 static int apply_microcode_intel(int cpu)
839 {
840 struct microcode_intel *mc;
841 struct ucode_cpu_info *uci;
842 struct cpuinfo_x86 *c;
843 unsigned int val[2];
844
845 /* We should bind the task to the CPU */
846 if (WARN_ON(raw_smp_processor_id() != cpu))
847 return -1;
848
849 uci = ucode_cpu_info + cpu;
850 mc = uci->mc;
851 if (!mc)
852 return 0;
853
854 /*
855 * Microcode on this CPU could be updated earlier. Only apply the
856 * microcode patch in mc when it is newer than the one on this
857 * CPU.
858 */
859 if (!get_matching_mc(mc, cpu))
860 return 0;
861
862 /* write microcode via MSR 0x79 */
863 wrmsr(MSR_IA32_UCODE_WRITE,
864 (unsigned long) mc->bits,
865 (unsigned long) mc->bits >> 16 >> 16);
866 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
867
868 /* As documented in the SDM: Do a CPUID 1 here */
869 sync_core();
870
871 /* get the current revision from MSR 0x8B */
872 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
873
874 if (val[1] != mc->hdr.rev) {
875 pr_err("CPU%d update to revision 0x%x failed\n",
876 cpu, mc->hdr.rev);
877 return -1;
878 }
879
880 pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
881 cpu, val[1],
882 mc->hdr.date & 0xffff,
883 mc->hdr.date >> 24,
884 (mc->hdr.date >> 16) & 0xff);
885
886 c = &cpu_data(cpu);
887
888 uci->cpu_sig.rev = val[1];
889 c->microcode = val[1];
890
891 return 0;
892 }
893
894 static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
895 int (*get_ucode_data)(void *, const void *, size_t))
896 {
897 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
898 u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
899 int new_rev = uci->cpu_sig.rev;
900 unsigned int leftover = size;
901 enum ucode_state state = UCODE_OK;
902 unsigned int curr_mc_size = 0;
903 unsigned int csig, cpf;
904
905 while (leftover) {
906 struct microcode_header_intel mc_header;
907 unsigned int mc_size;
908
909 if (leftover < sizeof(mc_header)) {
910 pr_err("error! Truncated header in microcode data file\n");
911 break;
912 }
913
914 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
915 break;
916
917 mc_size = get_totalsize(&mc_header);
918 if (!mc_size || mc_size > leftover) {
919 pr_err("error! Bad data in microcode data file\n");
920 break;
921 }
922
923 /* For performance reasons, reuse mc area when possible */
924 if (!mc || mc_size > curr_mc_size) {
925 vfree(mc);
926 mc = vmalloc(mc_size);
927 if (!mc)
928 break;
929 curr_mc_size = mc_size;
930 }
931
932 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
933 microcode_sanity_check(mc, 1) < 0) {
934 break;
935 }
936
937 csig = uci->cpu_sig.sig;
938 cpf = uci->cpu_sig.pf;
939 if (has_newer_microcode(mc, csig, cpf, new_rev)) {
940 vfree(new_mc);
941 new_rev = mc_header.rev;
942 new_mc = mc;
943 mc = NULL; /* trigger new vmalloc */
944 }
945
946 ucode_ptr += mc_size;
947 leftover -= mc_size;
948 }
949
950 vfree(mc);
951
952 if (leftover) {
953 vfree(new_mc);
954 state = UCODE_ERROR;
955 goto out;
956 }
957
958 if (!new_mc) {
959 state = UCODE_NFOUND;
960 goto out;
961 }
962
963 vfree(uci->mc);
964 uci->mc = (struct microcode_intel *)new_mc;
965
966 /*
967 * If early loading microcode is supported, save this mc into
968 * permanent memory. So it will be loaded early when a CPU is hot added
969 * or resumes.
970 */
971 save_mc_for_early(new_mc);
972
973 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
974 cpu, new_rev, uci->cpu_sig.rev);
975 out:
976 return state;
977 }
978
979 static int get_ucode_fw(void *to, const void *from, size_t n)
980 {
981 memcpy(to, from, n);
982 return 0;
983 }
984
985 static enum ucode_state request_microcode_fw(int cpu, struct device *device,
986 bool refresh_fw)
987 {
988 char name[30];
989 struct cpuinfo_x86 *c = &cpu_data(cpu);
990 const struct firmware *firmware;
991 enum ucode_state ret;
992
993 sprintf(name, "intel-ucode/%02x-%02x-%02x",
994 c->x86, c->x86_model, c->x86_mask);
995
996 if (request_firmware_direct(&firmware, name, device)) {
997 pr_debug("data file %s load failed\n", name);
998 return UCODE_NFOUND;
999 }
1000
1001 ret = generic_load_microcode(cpu, (void *)firmware->data,
1002 firmware->size, &get_ucode_fw);
1003
1004 release_firmware(firmware);
1005
1006 return ret;
1007 }
1008
1009 static int get_ucode_user(void *to, const void *from, size_t n)
1010 {
1011 return copy_from_user(to, from, n);
1012 }
1013
1014 static enum ucode_state
1015 request_microcode_user(int cpu, const void __user *buf, size_t size)
1016 {
1017 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
1018 }
1019
1020 static void microcode_fini_cpu(int cpu)
1021 {
1022 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
1023
1024 vfree(uci->mc);
1025 uci->mc = NULL;
1026 }
1027
1028 static struct microcode_ops microcode_intel_ops = {
1029 .request_microcode_user = request_microcode_user,
1030 .request_microcode_fw = request_microcode_fw,
1031 .collect_cpu_info = collect_cpu_info,
1032 .apply_microcode = apply_microcode_intel,
1033 .microcode_fini_cpu = microcode_fini_cpu,
1034 };
1035
1036 struct microcode_ops * __init init_intel_microcode(void)
1037 {
1038 struct cpuinfo_x86 *c = &boot_cpu_data;
1039
1040 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
1041 cpu_has(c, X86_FEATURE_IA64)) {
1042 pr_err("Intel CPU family 0x%x not supported\n", c->x86);
1043 return NULL;
1044 }
1045
1046 return &microcode_intel_ops;
1047 }
1048
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