Merge branch 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux into drm...
[deliverable/linux.git] / arch / x86 / kernel / cpu / microcode / intel.c
1 /*
2 * Intel CPU Microcode Update Driver for Linux
3 *
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
6 *
7 * Intel CPU microcode early update for Linux
8 *
9 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
10 * H Peter Anvin" <hpa@zytor.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18 /*
19 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
20 * printk calls into no_printk().
21 *
22 *#define DEBUG
23 */
24 #define pr_fmt(fmt) "microcode: " fmt
25
26 #include <linux/earlycpio.h>
27 #include <linux/firmware.h>
28 #include <linux/uaccess.h>
29 #include <linux/vmalloc.h>
30 #include <linux/initrd.h>
31 #include <linux/kernel.h>
32 #include <linux/slab.h>
33 #include <linux/cpu.h>
34 #include <linux/mm.h>
35
36 #include <asm/microcode_intel.h>
37 #include <asm/processor.h>
38 #include <asm/tlbflush.h>
39 #include <asm/setup.h>
40 #include <asm/msr.h>
41
42 static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
43 static struct mc_saved_data {
44 unsigned int mc_saved_count;
45 struct microcode_intel **mc_saved;
46 } mc_saved_data;
47
48 static enum ucode_state
49 load_microcode_early(struct microcode_intel **saved,
50 unsigned int num_saved, struct ucode_cpu_info *uci)
51 {
52 struct microcode_intel *ucode_ptr, *new_mc = NULL;
53 struct microcode_header_intel *mc_hdr;
54 int new_rev, ret, i;
55
56 new_rev = uci->cpu_sig.rev;
57
58 for (i = 0; i < num_saved; i++) {
59 ucode_ptr = saved[i];
60 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
61
62 ret = has_newer_microcode(ucode_ptr,
63 uci->cpu_sig.sig,
64 uci->cpu_sig.pf,
65 new_rev);
66 if (!ret)
67 continue;
68
69 new_rev = mc_hdr->rev;
70 new_mc = ucode_ptr;
71 }
72
73 if (!new_mc)
74 return UCODE_NFOUND;
75
76 uci->mc = (struct microcode_intel *)new_mc;
77 return UCODE_OK;
78 }
79
80 static inline void
81 copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd,
82 unsigned long off, int num_saved)
83 {
84 int i;
85
86 for (i = 0; i < num_saved; i++)
87 mc_saved[i] = (struct microcode_intel *)(initrd[i] + off);
88 }
89
90 #ifdef CONFIG_X86_32
91 static void
92 microcode_phys(struct microcode_intel **mc_saved_tmp,
93 struct mc_saved_data *mc_saved_data)
94 {
95 int i;
96 struct microcode_intel ***mc_saved;
97
98 mc_saved = (struct microcode_intel ***)
99 __pa_nodebug(&mc_saved_data->mc_saved);
100 for (i = 0; i < mc_saved_data->mc_saved_count; i++) {
101 struct microcode_intel *p;
102
103 p = *(struct microcode_intel **)
104 __pa_nodebug(mc_saved_data->mc_saved + i);
105 mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
106 }
107 }
108 #endif
109
110 static enum ucode_state
111 load_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
112 unsigned long initrd_start, struct ucode_cpu_info *uci)
113 {
114 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
115 unsigned int count = mc_saved_data->mc_saved_count;
116
117 if (!mc_saved_data->mc_saved) {
118 copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
119
120 return load_microcode_early(mc_saved_tmp, count, uci);
121 } else {
122 #ifdef CONFIG_X86_32
123 microcode_phys(mc_saved_tmp, mc_saved_data);
124 return load_microcode_early(mc_saved_tmp, count, uci);
125 #else
126 return load_microcode_early(mc_saved_data->mc_saved,
127 count, uci);
128 #endif
129 }
130 }
131
132 /*
133 * Given CPU signature and a microcode patch, this function finds if the
134 * microcode patch has matching family and model with the CPU.
135 */
136 static enum ucode_state
137 matching_model_microcode(struct microcode_header_intel *mc_header,
138 unsigned long sig)
139 {
140 unsigned int fam, model;
141 unsigned int fam_ucode, model_ucode;
142 struct extended_sigtable *ext_header;
143 unsigned long total_size = get_totalsize(mc_header);
144 unsigned long data_size = get_datasize(mc_header);
145 int ext_sigcount, i;
146 struct extended_signature *ext_sig;
147
148 fam = x86_family(sig);
149 model = x86_model(sig);
150
151 fam_ucode = x86_family(mc_header->sig);
152 model_ucode = x86_model(mc_header->sig);
153
154 if (fam == fam_ucode && model == model_ucode)
155 return UCODE_OK;
156
157 /* Look for ext. headers: */
158 if (total_size <= data_size + MC_HEADER_SIZE)
159 return UCODE_NFOUND;
160
161 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
162 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
163 ext_sigcount = ext_header->count;
164
165 for (i = 0; i < ext_sigcount; i++) {
166 fam_ucode = x86_family(ext_sig->sig);
167 model_ucode = x86_model(ext_sig->sig);
168
169 if (fam == fam_ucode && model == model_ucode)
170 return UCODE_OK;
171
172 ext_sig++;
173 }
174 return UCODE_NFOUND;
175 }
176
177 static int
178 save_microcode(struct mc_saved_data *mc_saved_data,
179 struct microcode_intel **mc_saved_src,
180 unsigned int mc_saved_count)
181 {
182 int i, j;
183 struct microcode_intel **saved_ptr;
184 int ret;
185
186 if (!mc_saved_count)
187 return -EINVAL;
188
189 /*
190 * Copy new microcode data.
191 */
192 saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *), GFP_KERNEL);
193 if (!saved_ptr)
194 return -ENOMEM;
195
196 for (i = 0; i < mc_saved_count; i++) {
197 struct microcode_header_intel *mc_hdr;
198 struct microcode_intel *mc;
199 unsigned long size;
200
201 if (!mc_saved_src[i]) {
202 ret = -EINVAL;
203 goto err;
204 }
205
206 mc = mc_saved_src[i];
207 mc_hdr = &mc->hdr;
208 size = get_totalsize(mc_hdr);
209
210 saved_ptr[i] = kmalloc(size, GFP_KERNEL);
211 if (!saved_ptr[i]) {
212 ret = -ENOMEM;
213 goto err;
214 }
215
216 memcpy(saved_ptr[i], mc, size);
217 }
218
219 /*
220 * Point to newly saved microcode.
221 */
222 mc_saved_data->mc_saved = saved_ptr;
223 mc_saved_data->mc_saved_count = mc_saved_count;
224
225 return 0;
226
227 err:
228 for (j = 0; j <= i; j++)
229 kfree(saved_ptr[j]);
230 kfree(saved_ptr);
231
232 return ret;
233 }
234
235 /*
236 * A microcode patch in ucode_ptr is saved into mc_saved
237 * - if it has matching signature and newer revision compared to an existing
238 * patch mc_saved.
239 * - or if it is a newly discovered microcode patch.
240 *
241 * The microcode patch should have matching model with CPU.
242 *
243 * Returns: The updated number @num_saved of saved microcode patches.
244 */
245 static unsigned int _save_mc(struct microcode_intel **mc_saved,
246 u8 *ucode_ptr, unsigned int num_saved)
247 {
248 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
249 unsigned int sig, pf;
250 int found = 0, i;
251
252 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
253
254 for (i = 0; i < num_saved; i++) {
255 mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
256 sig = mc_saved_hdr->sig;
257 pf = mc_saved_hdr->pf;
258
259 if (!find_matching_signature(ucode_ptr, sig, pf))
260 continue;
261
262 found = 1;
263
264 if (mc_hdr->rev <= mc_saved_hdr->rev)
265 continue;
266
267 /*
268 * Found an older ucode saved earlier. Replace it with
269 * this newer one.
270 */
271 mc_saved[i] = (struct microcode_intel *)ucode_ptr;
272 break;
273 }
274
275 /* Newly detected microcode, save it to memory. */
276 if (i >= num_saved && !found)
277 mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
278
279 return num_saved;
280 }
281
282 /*
283 * Get microcode matching with BSP's model. Only CPUs with the same model as
284 * BSP can stay in the platform.
285 */
286 static enum ucode_state __init
287 get_matching_model_microcode(int cpu, unsigned long start,
288 void *data, size_t size,
289 struct mc_saved_data *mc_saved_data,
290 unsigned long *mc_saved_in_initrd,
291 struct ucode_cpu_info *uci)
292 {
293 u8 *ucode_ptr = data;
294 unsigned int leftover = size;
295 enum ucode_state state = UCODE_OK;
296 unsigned int mc_size;
297 struct microcode_header_intel *mc_header;
298 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
299 unsigned int mc_saved_count = mc_saved_data->mc_saved_count;
300 int i;
301
302 while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) {
303
304 if (leftover < sizeof(mc_header))
305 break;
306
307 mc_header = (struct microcode_header_intel *)ucode_ptr;
308
309 mc_size = get_totalsize(mc_header);
310 if (!mc_size || mc_size > leftover ||
311 microcode_sanity_check(ucode_ptr, 0) < 0)
312 break;
313
314 leftover -= mc_size;
315
316 /*
317 * Since APs with same family and model as the BSP may boot in
318 * the platform, we need to find and save microcode patches
319 * with the same family and model as the BSP.
320 */
321 if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
322 UCODE_OK) {
323 ucode_ptr += mc_size;
324 continue;
325 }
326
327 mc_saved_count = _save_mc(mc_saved_tmp, ucode_ptr, mc_saved_count);
328
329 ucode_ptr += mc_size;
330 }
331
332 if (leftover) {
333 state = UCODE_ERROR;
334 goto out;
335 }
336
337 if (mc_saved_count == 0) {
338 state = UCODE_NFOUND;
339 goto out;
340 }
341
342 for (i = 0; i < mc_saved_count; i++)
343 mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
344
345 mc_saved_data->mc_saved_count = mc_saved_count;
346 out:
347 return state;
348 }
349
350 static int collect_cpu_info_early(struct ucode_cpu_info *uci)
351 {
352 unsigned int val[2];
353 unsigned int family, model;
354 struct cpu_signature csig;
355 unsigned int eax, ebx, ecx, edx;
356
357 csig.sig = 0;
358 csig.pf = 0;
359 csig.rev = 0;
360
361 memset(uci, 0, sizeof(*uci));
362
363 eax = 0x00000001;
364 ecx = 0;
365 native_cpuid(&eax, &ebx, &ecx, &edx);
366 csig.sig = eax;
367
368 family = x86_family(csig.sig);
369 model = x86_model(csig.sig);
370
371 if ((model >= 5) || (family > 6)) {
372 /* get processor flags from MSR 0x17 */
373 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
374 csig.pf = 1 << ((val[1] >> 18) & 7);
375 }
376 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
377
378 /* As documented in the SDM: Do a CPUID 1 here */
379 sync_core();
380
381 /* get the current revision from MSR 0x8B */
382 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
383
384 csig.rev = val[1];
385
386 uci->cpu_sig = csig;
387 uci->valid = 1;
388
389 return 0;
390 }
391
392 static void show_saved_mc(void)
393 {
394 #ifdef DEBUG
395 int i, j;
396 unsigned int sig, pf, rev, total_size, data_size, date;
397 struct ucode_cpu_info uci;
398
399 if (mc_saved_data.mc_saved_count == 0) {
400 pr_debug("no microcode data saved.\n");
401 return;
402 }
403 pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count);
404
405 collect_cpu_info_early(&uci);
406
407 sig = uci.cpu_sig.sig;
408 pf = uci.cpu_sig.pf;
409 rev = uci.cpu_sig.rev;
410 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
411
412 for (i = 0; i < mc_saved_data.mc_saved_count; i++) {
413 struct microcode_header_intel *mc_saved_header;
414 struct extended_sigtable *ext_header;
415 int ext_sigcount;
416 struct extended_signature *ext_sig;
417
418 mc_saved_header = (struct microcode_header_intel *)
419 mc_saved_data.mc_saved[i];
420 sig = mc_saved_header->sig;
421 pf = mc_saved_header->pf;
422 rev = mc_saved_header->rev;
423 total_size = get_totalsize(mc_saved_header);
424 data_size = get_datasize(mc_saved_header);
425 date = mc_saved_header->date;
426
427 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
428 i, sig, pf, rev, total_size,
429 date & 0xffff,
430 date >> 24,
431 (date >> 16) & 0xff);
432
433 /* Look for ext. headers: */
434 if (total_size <= data_size + MC_HEADER_SIZE)
435 continue;
436
437 ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
438 ext_sigcount = ext_header->count;
439 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
440
441 for (j = 0; j < ext_sigcount; j++) {
442 sig = ext_sig->sig;
443 pf = ext_sig->pf;
444
445 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
446 j, sig, pf);
447
448 ext_sig++;
449 }
450
451 }
452 #endif
453 }
454
455 #ifdef CONFIG_HOTPLUG_CPU
456 static DEFINE_MUTEX(x86_cpu_microcode_mutex);
457 /*
458 * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
459 * hot added or resumes.
460 *
461 * Please make sure this mc should be a valid microcode patch before calling
462 * this function.
463 */
464 int save_mc_for_early(u8 *mc)
465 {
466 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
467 unsigned int mc_saved_count_init;
468 unsigned int mc_saved_count;
469 struct microcode_intel **mc_saved;
470 int ret = 0;
471 int i;
472
473 /*
474 * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
475 * hotplug.
476 */
477 mutex_lock(&x86_cpu_microcode_mutex);
478
479 mc_saved_count_init = mc_saved_data.mc_saved_count;
480 mc_saved_count = mc_saved_data.mc_saved_count;
481 mc_saved = mc_saved_data.mc_saved;
482
483 if (mc_saved && mc_saved_count)
484 memcpy(mc_saved_tmp, mc_saved,
485 mc_saved_count * sizeof(struct microcode_intel *));
486 /*
487 * Save the microcode patch mc in mc_save_tmp structure if it's a newer
488 * version.
489 */
490 mc_saved_count = _save_mc(mc_saved_tmp, mc, mc_saved_count);
491
492 /*
493 * Save the mc_save_tmp in global mc_saved_data.
494 */
495 ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count);
496 if (ret) {
497 pr_err("Cannot save microcode patch.\n");
498 goto out;
499 }
500
501 show_saved_mc();
502
503 /*
504 * Free old saved microcode data.
505 */
506 if (mc_saved) {
507 for (i = 0; i < mc_saved_count_init; i++)
508 kfree(mc_saved[i]);
509 kfree(mc_saved);
510 }
511
512 out:
513 mutex_unlock(&x86_cpu_microcode_mutex);
514
515 return ret;
516 }
517 EXPORT_SYMBOL_GPL(save_mc_for_early);
518 #endif
519
520 static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
521 {
522 #ifdef CONFIG_X86_64
523 unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
524 char name[30];
525
526 native_cpuid(&eax, &ebx, &ecx, &edx);
527
528 sprintf(name, "intel-ucode/%02x-%02x-%02x",
529 x86_family(eax), x86_model(eax), x86_stepping(eax));
530
531 return get_builtin_firmware(cp, name);
532 #else
533 return false;
534 #endif
535 }
536
537 static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
538 static __init enum ucode_state
539 scan_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
540 unsigned long start, unsigned long size,
541 struct ucode_cpu_info *uci)
542 {
543 struct cpio_data cd;
544 long offset = 0;
545 #ifdef CONFIG_X86_32
546 char *p = (char *)__pa_nodebug(ucode_name);
547 #else
548 char *p = ucode_name;
549 #endif
550
551 cd.data = NULL;
552 cd.size = 0;
553
554 cd = find_cpio_data(p, (void *)start, size, &offset);
555 if (!cd.data) {
556 if (!load_builtin_intel_microcode(&cd))
557 return UCODE_ERROR;
558 }
559
560 return get_matching_model_microcode(0, start, cd.data, cd.size,
561 mc_saved_data, initrd, uci);
562 }
563
564 /*
565 * Print ucode update info.
566 */
567 static void
568 print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
569 {
570 int cpu = smp_processor_id();
571
572 pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
573 cpu,
574 uci->cpu_sig.rev,
575 date & 0xffff,
576 date >> 24,
577 (date >> 16) & 0xff);
578 }
579
580 #ifdef CONFIG_X86_32
581
582 static int delay_ucode_info;
583 static int current_mc_date;
584
585 /*
586 * Print early updated ucode info after printk works. This is delayed info dump.
587 */
588 void show_ucode_info_early(void)
589 {
590 struct ucode_cpu_info uci;
591
592 if (delay_ucode_info) {
593 collect_cpu_info_early(&uci);
594 print_ucode_info(&uci, current_mc_date);
595 delay_ucode_info = 0;
596 }
597 }
598
599 /*
600 * At this point, we can not call printk() yet. Keep microcode patch number in
601 * mc_saved_data.mc_saved and delay printing microcode info in
602 * show_ucode_info_early() until printk() works.
603 */
604 static void print_ucode(struct ucode_cpu_info *uci)
605 {
606 struct microcode_intel *mc_intel;
607 int *delay_ucode_info_p;
608 int *current_mc_date_p;
609
610 mc_intel = uci->mc;
611 if (mc_intel == NULL)
612 return;
613
614 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
615 current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
616
617 *delay_ucode_info_p = 1;
618 *current_mc_date_p = mc_intel->hdr.date;
619 }
620 #else
621
622 /*
623 * Flush global tlb. We only do this in x86_64 where paging has been enabled
624 * already and PGE should be enabled as well.
625 */
626 static inline void flush_tlb_early(void)
627 {
628 __native_flush_tlb_global_irq_disabled();
629 }
630
631 static inline void print_ucode(struct ucode_cpu_info *uci)
632 {
633 struct microcode_intel *mc_intel;
634
635 mc_intel = uci->mc;
636 if (mc_intel == NULL)
637 return;
638
639 print_ucode_info(uci, mc_intel->hdr.date);
640 }
641 #endif
642
643 static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
644 {
645 struct microcode_intel *mc_intel;
646 unsigned int val[2];
647
648 mc_intel = uci->mc;
649 if (mc_intel == NULL)
650 return 0;
651
652 /* write microcode via MSR 0x79 */
653 native_wrmsr(MSR_IA32_UCODE_WRITE,
654 (unsigned long) mc_intel->bits,
655 (unsigned long) mc_intel->bits >> 16 >> 16);
656 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
657
658 /* As documented in the SDM: Do a CPUID 1 here */
659 sync_core();
660
661 /* get the current revision from MSR 0x8B */
662 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
663 if (val[1] != mc_intel->hdr.rev)
664 return -1;
665
666 #ifdef CONFIG_X86_64
667 /* Flush global tlb. This is precaution. */
668 flush_tlb_early();
669 #endif
670 uci->cpu_sig.rev = val[1];
671
672 if (early)
673 print_ucode(uci);
674 else
675 print_ucode_info(uci, mc_intel->hdr.date);
676
677 return 0;
678 }
679
680 /*
681 * This function converts microcode patch offsets previously stored in
682 * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
683 */
684 int __init save_microcode_in_initrd_intel(void)
685 {
686 unsigned int count = mc_saved_data.mc_saved_count;
687 struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
688 int ret = 0;
689
690 if (count == 0)
691 return ret;
692
693 copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, initrd_start, count);
694 ret = save_microcode(&mc_saved_data, mc_saved, count);
695 if (ret)
696 pr_err("Cannot save microcode patches from initrd.\n");
697
698 show_saved_mc();
699
700 return ret;
701 }
702
703 static void __init
704 _load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data,
705 unsigned long *initrd,
706 unsigned long start, unsigned long size)
707 {
708 struct ucode_cpu_info uci;
709 enum ucode_state ret;
710
711 collect_cpu_info_early(&uci);
712
713 ret = scan_microcode(mc_saved_data, initrd, start, size, &uci);
714 if (ret != UCODE_OK)
715 return;
716
717 ret = load_microcode(mc_saved_data, initrd, start, &uci);
718 if (ret != UCODE_OK)
719 return;
720
721 apply_microcode_early(&uci, true);
722 }
723
724 void __init load_ucode_intel_bsp(void)
725 {
726 u64 start, size;
727 #ifdef CONFIG_X86_32
728 struct boot_params *p;
729
730 p = (struct boot_params *)__pa_nodebug(&boot_params);
731 start = p->hdr.ramdisk_image;
732 size = p->hdr.ramdisk_size;
733
734 _load_ucode_intel_bsp(
735 (struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
736 (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
737 start, size);
738 #else
739 start = boot_params.hdr.ramdisk_image + PAGE_OFFSET;
740 size = boot_params.hdr.ramdisk_size;
741
742 _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size);
743 #endif
744 }
745
746 void load_ucode_intel_ap(void)
747 {
748 struct mc_saved_data *mc_saved_data_p;
749 struct ucode_cpu_info uci;
750 unsigned long *mc_saved_in_initrd_p;
751 unsigned long initrd_start_addr;
752 enum ucode_state ret;
753 #ifdef CONFIG_X86_32
754 unsigned long *initrd_start_p;
755
756 mc_saved_in_initrd_p =
757 (unsigned long *)__pa_nodebug(mc_saved_in_initrd);
758 mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
759 initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start);
760 initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p);
761 #else
762 mc_saved_data_p = &mc_saved_data;
763 mc_saved_in_initrd_p = mc_saved_in_initrd;
764 initrd_start_addr = initrd_start;
765 #endif
766
767 /*
768 * If there is no valid ucode previously saved in memory, no need to
769 * update ucode on this AP.
770 */
771 if (mc_saved_data_p->mc_saved_count == 0)
772 return;
773
774 collect_cpu_info_early(&uci);
775 ret = load_microcode(mc_saved_data_p, mc_saved_in_initrd_p,
776 initrd_start_addr, &uci);
777
778 if (ret != UCODE_OK)
779 return;
780
781 apply_microcode_early(&uci, true);
782 }
783
784 void reload_ucode_intel(void)
785 {
786 struct ucode_cpu_info uci;
787 enum ucode_state ret;
788
789 if (!mc_saved_data.mc_saved_count)
790 return;
791
792 collect_cpu_info_early(&uci);
793
794 ret = load_microcode_early(mc_saved_data.mc_saved,
795 mc_saved_data.mc_saved_count, &uci);
796 if (ret != UCODE_OK)
797 return;
798
799 apply_microcode_early(&uci, false);
800 }
801
802 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
803 {
804 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
805 unsigned int val[2];
806
807 memset(csig, 0, sizeof(*csig));
808
809 csig->sig = cpuid_eax(0x00000001);
810
811 if ((c->x86_model >= 5) || (c->x86 > 6)) {
812 /* get processor flags from MSR 0x17 */
813 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
814 csig->pf = 1 << ((val[1] >> 18) & 7);
815 }
816
817 csig->rev = c->microcode;
818 pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
819 cpu_num, csig->sig, csig->pf, csig->rev);
820
821 return 0;
822 }
823
824 /*
825 * return 0 - no update found
826 * return 1 - found update
827 */
828 static int get_matching_mc(struct microcode_intel *mc_intel, int cpu)
829 {
830 struct cpu_signature cpu_sig;
831 unsigned int csig, cpf, crev;
832
833 collect_cpu_info(cpu, &cpu_sig);
834
835 csig = cpu_sig.sig;
836 cpf = cpu_sig.pf;
837 crev = cpu_sig.rev;
838
839 return has_newer_microcode(mc_intel, csig, cpf, crev);
840 }
841
842 static int apply_microcode_intel(int cpu)
843 {
844 struct microcode_intel *mc_intel;
845 struct ucode_cpu_info *uci;
846 unsigned int val[2];
847 int cpu_num = raw_smp_processor_id();
848 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
849
850 uci = ucode_cpu_info + cpu;
851 mc_intel = uci->mc;
852
853 /* We should bind the task to the CPU */
854 BUG_ON(cpu_num != cpu);
855
856 if (mc_intel == NULL)
857 return 0;
858
859 /*
860 * Microcode on this CPU could be updated earlier. Only apply the
861 * microcode patch in mc_intel when it is newer than the one on this
862 * CPU.
863 */
864 if (get_matching_mc(mc_intel, cpu) == 0)
865 return 0;
866
867 /* write microcode via MSR 0x79 */
868 wrmsr(MSR_IA32_UCODE_WRITE,
869 (unsigned long) mc_intel->bits,
870 (unsigned long) mc_intel->bits >> 16 >> 16);
871 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
872
873 /* As documented in the SDM: Do a CPUID 1 here */
874 sync_core();
875
876 /* get the current revision from MSR 0x8B */
877 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
878
879 if (val[1] != mc_intel->hdr.rev) {
880 pr_err("CPU%d update to revision 0x%x failed\n",
881 cpu_num, mc_intel->hdr.rev);
882 return -1;
883 }
884 pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
885 cpu_num, val[1],
886 mc_intel->hdr.date & 0xffff,
887 mc_intel->hdr.date >> 24,
888 (mc_intel->hdr.date >> 16) & 0xff);
889
890 uci->cpu_sig.rev = val[1];
891 c->microcode = val[1];
892
893 return 0;
894 }
895
896 static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
897 int (*get_ucode_data)(void *, const void *, size_t))
898 {
899 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
900 u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
901 int new_rev = uci->cpu_sig.rev;
902 unsigned int leftover = size;
903 enum ucode_state state = UCODE_OK;
904 unsigned int curr_mc_size = 0;
905 unsigned int csig, cpf;
906
907 while (leftover) {
908 struct microcode_header_intel mc_header;
909 unsigned int mc_size;
910
911 if (leftover < sizeof(mc_header)) {
912 pr_err("error! Truncated header in microcode data file\n");
913 break;
914 }
915
916 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
917 break;
918
919 mc_size = get_totalsize(&mc_header);
920 if (!mc_size || mc_size > leftover) {
921 pr_err("error! Bad data in microcode data file\n");
922 break;
923 }
924
925 /* For performance reasons, reuse mc area when possible */
926 if (!mc || mc_size > curr_mc_size) {
927 vfree(mc);
928 mc = vmalloc(mc_size);
929 if (!mc)
930 break;
931 curr_mc_size = mc_size;
932 }
933
934 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
935 microcode_sanity_check(mc, 1) < 0) {
936 break;
937 }
938
939 csig = uci->cpu_sig.sig;
940 cpf = uci->cpu_sig.pf;
941 if (has_newer_microcode(mc, csig, cpf, new_rev)) {
942 vfree(new_mc);
943 new_rev = mc_header.rev;
944 new_mc = mc;
945 mc = NULL; /* trigger new vmalloc */
946 }
947
948 ucode_ptr += mc_size;
949 leftover -= mc_size;
950 }
951
952 vfree(mc);
953
954 if (leftover) {
955 vfree(new_mc);
956 state = UCODE_ERROR;
957 goto out;
958 }
959
960 if (!new_mc) {
961 state = UCODE_NFOUND;
962 goto out;
963 }
964
965 vfree(uci->mc);
966 uci->mc = (struct microcode_intel *)new_mc;
967
968 /*
969 * If early loading microcode is supported, save this mc into
970 * permanent memory. So it will be loaded early when a CPU is hot added
971 * or resumes.
972 */
973 save_mc_for_early(new_mc);
974
975 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
976 cpu, new_rev, uci->cpu_sig.rev);
977 out:
978 return state;
979 }
980
981 static int get_ucode_fw(void *to, const void *from, size_t n)
982 {
983 memcpy(to, from, n);
984 return 0;
985 }
986
987 static enum ucode_state request_microcode_fw(int cpu, struct device *device,
988 bool refresh_fw)
989 {
990 char name[30];
991 struct cpuinfo_x86 *c = &cpu_data(cpu);
992 const struct firmware *firmware;
993 enum ucode_state ret;
994
995 sprintf(name, "intel-ucode/%02x-%02x-%02x",
996 c->x86, c->x86_model, c->x86_mask);
997
998 if (request_firmware_direct(&firmware, name, device)) {
999 pr_debug("data file %s load failed\n", name);
1000 return UCODE_NFOUND;
1001 }
1002
1003 ret = generic_load_microcode(cpu, (void *)firmware->data,
1004 firmware->size, &get_ucode_fw);
1005
1006 release_firmware(firmware);
1007
1008 return ret;
1009 }
1010
1011 static int get_ucode_user(void *to, const void *from, size_t n)
1012 {
1013 return copy_from_user(to, from, n);
1014 }
1015
1016 static enum ucode_state
1017 request_microcode_user(int cpu, const void __user *buf, size_t size)
1018 {
1019 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
1020 }
1021
1022 static void microcode_fini_cpu(int cpu)
1023 {
1024 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
1025
1026 vfree(uci->mc);
1027 uci->mc = NULL;
1028 }
1029
1030 static struct microcode_ops microcode_intel_ops = {
1031 .request_microcode_user = request_microcode_user,
1032 .request_microcode_fw = request_microcode_fw,
1033 .collect_cpu_info = collect_cpu_info,
1034 .apply_microcode = apply_microcode_intel,
1035 .microcode_fini_cpu = microcode_fini_cpu,
1036 };
1037
1038 struct microcode_ops * __init init_intel_microcode(void)
1039 {
1040 struct cpuinfo_x86 *c = &boot_cpu_data;
1041
1042 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
1043 cpu_has(c, X86_FEATURE_IA64)) {
1044 pr_err("Intel CPU family 0x%x not supported\n", c->x86);
1045 return NULL;
1046 }
1047
1048 return &microcode_intel_ops;
1049 }
1050
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