2 * Intel(R) Processor Trace PMU driver for perf
3 * Copyright (c) 2013-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * Intel PT is specified in the Intel Architecture Instruction Set Extensions
15 * Programming Reference:
16 * http://software.intel.com/en-us/intel-isa-extensions
21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23 #include <linux/types.h>
24 #include <linux/slab.h>
25 #include <linux/device.h>
27 #include <asm/perf_event.h>
31 #include "perf_event.h"
34 static DEFINE_PER_CPU(struct pt
, pt_ctx
);
36 static struct pt_pmu pt_pmu
;
46 * Capabilities of Intel PT hardware, such as number of address bits or
47 * supported output schemes, are cached and exported to userspace as "caps"
48 * attribute group of pt pmu device
49 * (/sys/bus/event_source/devices/intel_pt/caps/) so that userspace can store
50 * relevant bits together with intel_pt traces.
52 * These are necessary for both trace decoding (payloads_lip, contains address
53 * width encoded in IP-related packets), and event configuration (bitmasks with
54 * permitted values for certain bit fields).
56 #define PT_CAP(_n, _l, _r, _m) \
57 [PT_CAP_ ## _n] = { .name = __stringify(_n), .leaf = _l, \
58 .reg = _r, .mask = _m }
60 static struct pt_cap_desc
{
66 PT_CAP(max_subleaf
, 0, CR_EAX
, 0xffffffff),
67 PT_CAP(cr3_filtering
, 0, CR_EBX
, BIT(0)),
68 PT_CAP(psb_cyc
, 0, CR_EBX
, BIT(1)),
69 PT_CAP(mtc
, 0, CR_EBX
, BIT(3)),
70 PT_CAP(topa_output
, 0, CR_ECX
, BIT(0)),
71 PT_CAP(topa_multiple_entries
, 0, CR_ECX
, BIT(1)),
72 PT_CAP(single_range_output
, 0, CR_ECX
, BIT(2)),
73 PT_CAP(payloads_lip
, 0, CR_ECX
, BIT(31)),
74 PT_CAP(mtc_periods
, 1, CR_EAX
, 0xffff0000),
75 PT_CAP(cycle_thresholds
, 1, CR_EBX
, 0xffff),
76 PT_CAP(psb_periods
, 1, CR_EBX
, 0xffff0000),
79 static u32
pt_cap_get(enum pt_capabilities cap
)
81 struct pt_cap_desc
*cd
= &pt_caps
[cap
];
82 u32 c
= pt_pmu
.caps
[cd
->leaf
* PT_CPUID_REGS_NUM
+ cd
->reg
];
83 unsigned int shift
= __ffs(cd
->mask
);
85 return (c
& cd
->mask
) >> shift
;
88 static ssize_t
pt_cap_show(struct device
*cdev
,
89 struct device_attribute
*attr
,
92 struct dev_ext_attribute
*ea
=
93 container_of(attr
, struct dev_ext_attribute
, attr
);
94 enum pt_capabilities cap
= (long)ea
->var
;
96 return snprintf(buf
, PAGE_SIZE
, "%x\n", pt_cap_get(cap
));
99 static struct attribute_group pt_cap_group
= {
103 PMU_FORMAT_ATTR(cyc
, "config:1" );
104 PMU_FORMAT_ATTR(mtc
, "config:9" );
105 PMU_FORMAT_ATTR(tsc
, "config:10" );
106 PMU_FORMAT_ATTR(noretcomp
, "config:11" );
107 PMU_FORMAT_ATTR(mtc_period
, "config:14-17" );
108 PMU_FORMAT_ATTR(cyc_thresh
, "config:19-22" );
109 PMU_FORMAT_ATTR(psb_period
, "config:24-27" );
111 static struct attribute
*pt_formats_attr
[] = {
112 &format_attr_cyc
.attr
,
113 &format_attr_mtc
.attr
,
114 &format_attr_tsc
.attr
,
115 &format_attr_noretcomp
.attr
,
116 &format_attr_mtc_period
.attr
,
117 &format_attr_cyc_thresh
.attr
,
118 &format_attr_psb_period
.attr
,
122 static struct attribute_group pt_format_group
= {
124 .attrs
= pt_formats_attr
,
127 static const struct attribute_group
*pt_attr_groups
[] = {
133 static int __init
pt_pmu_hw_init(void)
135 struct dev_ext_attribute
*de_attrs
;
136 struct attribute
**attrs
;
143 for (i
= 0; i
< PT_CPUID_LEAVES
; i
++) {
145 &pt_pmu
.caps
[CR_EAX
+ i
*PT_CPUID_REGS_NUM
],
146 &pt_pmu
.caps
[CR_EBX
+ i
*PT_CPUID_REGS_NUM
],
147 &pt_pmu
.caps
[CR_ECX
+ i
*PT_CPUID_REGS_NUM
],
148 &pt_pmu
.caps
[CR_EDX
+ i
*PT_CPUID_REGS_NUM
]);
152 size
= sizeof(struct attribute
*) * (ARRAY_SIZE(pt_caps
)+1);
153 attrs
= kzalloc(size
, GFP_KERNEL
);
157 size
= sizeof(struct dev_ext_attribute
) * (ARRAY_SIZE(pt_caps
)+1);
158 de_attrs
= kzalloc(size
, GFP_KERNEL
);
162 for (i
= 0; i
< ARRAY_SIZE(pt_caps
); i
++) {
163 struct dev_ext_attribute
*de_attr
= de_attrs
+ i
;
165 de_attr
->attr
.attr
.name
= pt_caps
[i
].name
;
167 sysfs_attr_init(&de_attr
->attr
.attr
);
169 de_attr
->attr
.attr
.mode
= S_IRUGO
;
170 de_attr
->attr
.show
= pt_cap_show
;
171 de_attr
->var
= (void *)i
;
173 attrs
[i
] = &de_attr
->attr
.attr
;
176 pt_cap_group
.attrs
= attrs
;
186 #define RTIT_CTL_CYC_PSB (RTIT_CTL_CYCLEACC | \
187 RTIT_CTL_CYC_THRESH | \
190 #define RTIT_CTL_MTC (RTIT_CTL_MTC_EN | \
193 #define PT_CONFIG_MASK (RTIT_CTL_TSC_EN | \
198 static bool pt_event_valid(struct perf_event
*event
)
200 u64 config
= event
->attr
.config
;
201 u64 allowed
, requested
;
203 if ((config
& PT_CONFIG_MASK
) != config
)
206 if (config
& RTIT_CTL_CYC_PSB
) {
207 if (!pt_cap_get(PT_CAP_psb_cyc
))
210 allowed
= pt_cap_get(PT_CAP_psb_periods
);
211 requested
= (config
& RTIT_CTL_PSB_FREQ
) >>
212 RTIT_CTL_PSB_FREQ_OFFSET
;
213 if (requested
&& (!(allowed
& BIT(requested
))))
216 allowed
= pt_cap_get(PT_CAP_cycle_thresholds
);
217 requested
= (config
& RTIT_CTL_CYC_THRESH
) >>
218 RTIT_CTL_CYC_THRESH_OFFSET
;
219 if (requested
&& (!(allowed
& BIT(requested
))))
223 if (config
& RTIT_CTL_MTC
) {
225 * In the unlikely case that CPUID lists valid mtc periods,
226 * but not the mtc capability, drop out here.
228 * Spec says that setting mtc period bits while mtc bit in
229 * CPUID is 0 will #GP, so better safe than sorry.
231 if (!pt_cap_get(PT_CAP_mtc
))
234 allowed
= pt_cap_get(PT_CAP_mtc_periods
);
238 requested
= (config
& RTIT_CTL_MTC_RANGE
) >>
239 RTIT_CTL_MTC_RANGE_OFFSET
;
241 if (!(allowed
& BIT(requested
)))
249 * PT configuration helpers
250 * These all are cpu affine and operate on a local PT
253 static void pt_config(struct perf_event
*event
)
257 if (!event
->hw
.itrace_started
) {
258 event
->hw
.itrace_started
= 1;
259 wrmsrl(MSR_IA32_RTIT_STATUS
, 0);
262 reg
= RTIT_CTL_TOPA
| RTIT_CTL_BRANCH_EN
| RTIT_CTL_TRACEEN
;
264 if (!event
->attr
.exclude_kernel
)
266 if (!event
->attr
.exclude_user
)
269 reg
|= (event
->attr
.config
& PT_CONFIG_MASK
);
271 wrmsrl(MSR_IA32_RTIT_CTL
, reg
);
274 static void pt_config_start(bool start
)
278 rdmsrl(MSR_IA32_RTIT_CTL
, ctl
);
280 ctl
|= RTIT_CTL_TRACEEN
;
282 ctl
&= ~RTIT_CTL_TRACEEN
;
283 wrmsrl(MSR_IA32_RTIT_CTL
, ctl
);
286 * A wrmsr that disables trace generation serializes other PT
287 * registers and causes all data packets to be written to memory,
288 * but a fence is required for the data to become globally visible.
290 * The below WMB, separating data store and aux_head store matches
291 * the consumer's RMB that separates aux_head load and data load.
297 static void pt_config_buffer(void *buf
, unsigned int topa_idx
,
298 unsigned int output_off
)
302 wrmsrl(MSR_IA32_RTIT_OUTPUT_BASE
, virt_to_phys(buf
));
304 reg
= 0x7f | ((u64
)topa_idx
<< 7) | ((u64
)output_off
<< 32);
306 wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK
, reg
);
310 * Keep ToPA table-related metadata on the same page as the actual table,
311 * taking up a few words from the top
314 #define TENTS_PER_PAGE (((PAGE_SIZE - 40) / sizeof(struct topa_entry)) - 1)
317 * struct topa - page-sized ToPA table with metadata at the top
318 * @table: actual ToPA table entries, as understood by PT hardware
319 * @list: linkage to struct pt_buffer's list of tables
320 * @phys: physical address of this page
321 * @offset: offset of the first entry in this table in the buffer
322 * @size: total size of all entries in this table
323 * @last: index of the last initialized entry in this table
326 struct topa_entry table
[TENTS_PER_PAGE
];
327 struct list_head list
;
334 /* make -1 stand for the last table entry */
335 #define TOPA_ENTRY(t, i) ((i) == -1 ? &(t)->table[(t)->last] : &(t)->table[(i)])
338 * topa_alloc() - allocate page-sized ToPA table
339 * @cpu: CPU on which to allocate.
340 * @gfp: Allocation flags.
342 * Return: On success, return the pointer to ToPA table page.
344 static struct topa
*topa_alloc(int cpu
, gfp_t gfp
)
346 int node
= cpu_to_node(cpu
);
350 p
= alloc_pages_node(node
, gfp
| __GFP_ZERO
, 0);
354 topa
= page_address(p
);
356 topa
->phys
= page_to_phys(p
);
359 * In case of singe-entry ToPA, always put the self-referencing END
360 * link as the 2nd entry in the table
362 if (!pt_cap_get(PT_CAP_topa_multiple_entries
)) {
363 TOPA_ENTRY(topa
, 1)->base
= topa
->phys
>> TOPA_SHIFT
;
364 TOPA_ENTRY(topa
, 1)->end
= 1;
371 * topa_free() - free a page-sized ToPA table
372 * @topa: Table to deallocate.
374 static void topa_free(struct topa
*topa
)
376 free_page((unsigned long)topa
);
380 * topa_insert_table() - insert a ToPA table into a buffer
381 * @buf: PT buffer that's being extended.
382 * @topa: New topa table to be inserted.
384 * If it's the first table in this buffer, set up buffer's pointers
385 * accordingly; otherwise, add a END=1 link entry to @topa to the current
386 * "last" table and adjust the last table pointer to @topa.
388 static void topa_insert_table(struct pt_buffer
*buf
, struct topa
*topa
)
390 struct topa
*last
= buf
->last
;
392 list_add_tail(&topa
->list
, &buf
->tables
);
395 buf
->first
= buf
->last
= buf
->cur
= topa
;
399 topa
->offset
= last
->offset
+ last
->size
;
402 if (!pt_cap_get(PT_CAP_topa_multiple_entries
))
405 BUG_ON(last
->last
!= TENTS_PER_PAGE
- 1);
407 TOPA_ENTRY(last
, -1)->base
= topa
->phys
>> TOPA_SHIFT
;
408 TOPA_ENTRY(last
, -1)->end
= 1;
412 * topa_table_full() - check if a ToPA table is filled up
415 static bool topa_table_full(struct topa
*topa
)
417 /* single-entry ToPA is a special case */
418 if (!pt_cap_get(PT_CAP_topa_multiple_entries
))
421 return topa
->last
== TENTS_PER_PAGE
- 1;
425 * topa_insert_pages() - create a list of ToPA tables
426 * @buf: PT buffer being initialized.
427 * @gfp: Allocation flags.
429 * This initializes a list of ToPA tables with entries from
430 * the data_pages provided by rb_alloc_aux().
432 * Return: 0 on success or error code.
434 static int topa_insert_pages(struct pt_buffer
*buf
, gfp_t gfp
)
436 struct topa
*topa
= buf
->last
;
440 p
= virt_to_page(buf
->data_pages
[buf
->nr_pages
]);
442 order
= page_private(p
);
444 if (topa_table_full(topa
)) {
445 topa
= topa_alloc(buf
->cpu
, gfp
);
449 topa_insert_table(buf
, topa
);
452 TOPA_ENTRY(topa
, -1)->base
= page_to_phys(p
) >> TOPA_SHIFT
;
453 TOPA_ENTRY(topa
, -1)->size
= order
;
454 if (!buf
->snapshot
&& !pt_cap_get(PT_CAP_topa_multiple_entries
)) {
455 TOPA_ENTRY(topa
, -1)->intr
= 1;
456 TOPA_ENTRY(topa
, -1)->stop
= 1;
460 topa
->size
+= sizes(order
);
462 buf
->nr_pages
+= 1ul << order
;
468 * pt_topa_dump() - print ToPA tables and their entries
471 static void pt_topa_dump(struct pt_buffer
*buf
)
475 list_for_each_entry(topa
, &buf
->tables
, list
) {
478 pr_debug("# table @%p (%016Lx), off %llx size %zx\n", topa
->table
,
479 topa
->phys
, topa
->offset
, topa
->size
);
480 for (i
= 0; i
< TENTS_PER_PAGE
; i
++) {
481 pr_debug("# entry @%p (%lx sz %u %c%c%c) raw=%16llx\n",
483 (unsigned long)topa
->table
[i
].base
<< TOPA_SHIFT
,
484 sizes(topa
->table
[i
].size
),
485 topa
->table
[i
].end
? 'E' : ' ',
486 topa
->table
[i
].intr
? 'I' : ' ',
487 topa
->table
[i
].stop
? 'S' : ' ',
488 *(u64
*)&topa
->table
[i
]);
489 if ((pt_cap_get(PT_CAP_topa_multiple_entries
) &&
490 topa
->table
[i
].stop
) ||
498 * pt_buffer_advance() - advance to the next output region
501 * Advance the current pointers in the buffer to the next ToPA entry.
503 static void pt_buffer_advance(struct pt_buffer
*buf
)
508 if (buf
->cur_idx
== buf
->cur
->last
) {
509 if (buf
->cur
== buf
->last
)
510 buf
->cur
= buf
->first
;
512 buf
->cur
= list_entry(buf
->cur
->list
.next
, struct topa
,
519 * pt_update_head() - calculate current offsets and sizes
520 * @pt: Per-cpu pt context.
522 * Update buffer's current write pointer position and data size.
524 static void pt_update_head(struct pt
*pt
)
526 struct pt_buffer
*buf
= perf_get_aux(&pt
->handle
);
527 u64 topa_idx
, base
, old
;
529 /* offset of the first region in this table from the beginning of buf */
530 base
= buf
->cur
->offset
+ buf
->output_off
;
532 /* offset of the current output region within this table */
533 for (topa_idx
= 0; topa_idx
< buf
->cur_idx
; topa_idx
++)
534 base
+= sizes(buf
->cur
->table
[topa_idx
].size
);
537 local_set(&buf
->data_size
, base
);
539 old
= (local64_xchg(&buf
->head
, base
) &
540 ((buf
->nr_pages
<< PAGE_SHIFT
) - 1));
542 base
+= buf
->nr_pages
<< PAGE_SHIFT
;
544 local_add(base
- old
, &buf
->data_size
);
549 * pt_buffer_region() - obtain current output region's address
552 static void *pt_buffer_region(struct pt_buffer
*buf
)
554 return phys_to_virt(buf
->cur
->table
[buf
->cur_idx
].base
<< TOPA_SHIFT
);
558 * pt_buffer_region_size() - obtain current output region's size
561 static size_t pt_buffer_region_size(struct pt_buffer
*buf
)
563 return sizes(buf
->cur
->table
[buf
->cur_idx
].size
);
567 * pt_handle_status() - take care of possible status conditions
568 * @pt: Per-cpu pt context.
570 static void pt_handle_status(struct pt
*pt
)
572 struct pt_buffer
*buf
= perf_get_aux(&pt
->handle
);
576 rdmsrl(MSR_IA32_RTIT_STATUS
, status
);
578 if (status
& RTIT_STATUS_ERROR
) {
579 pr_err_ratelimited("ToPA ERROR encountered, trying to recover\n");
581 status
&= ~RTIT_STATUS_ERROR
;
584 if (status
& RTIT_STATUS_STOPPED
) {
585 status
&= ~RTIT_STATUS_STOPPED
;
588 * On systems that only do single-entry ToPA, hitting STOP
589 * means we are already losing data; need to let the decoder
592 if (!pt_cap_get(PT_CAP_topa_multiple_entries
) ||
593 buf
->output_off
== sizes(TOPA_ENTRY(buf
->cur
, buf
->cur_idx
)->size
)) {
594 local_inc(&buf
->lost
);
600 * Also on single-entry ToPA implementations, interrupt will come
601 * before the output reaches its output region's boundary.
603 if (!pt_cap_get(PT_CAP_topa_multiple_entries
) && !buf
->snapshot
&&
604 pt_buffer_region_size(buf
) - buf
->output_off
<= TOPA_PMI_MARGIN
) {
605 void *head
= pt_buffer_region(buf
);
607 /* everything within this margin needs to be zeroed out */
608 memset(head
+ buf
->output_off
, 0,
609 pt_buffer_region_size(buf
) -
615 pt_buffer_advance(buf
);
617 wrmsrl(MSR_IA32_RTIT_STATUS
, status
);
621 * pt_read_offset() - translate registers into buffer pointers
624 * Set buffer's output pointers from MSR values.
626 static void pt_read_offset(struct pt_buffer
*buf
)
628 u64 offset
, base_topa
;
630 rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE
, base_topa
);
631 buf
->cur
= phys_to_virt(base_topa
);
633 rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK
, offset
);
634 /* offset within current output region */
635 buf
->output_off
= offset
>> 32;
636 /* index of current output region within this table */
637 buf
->cur_idx
= (offset
& 0xffffff80) >> 7;
641 * pt_topa_next_entry() - obtain index of the first page in the next ToPA entry
643 * @pg: Page offset in the buffer.
645 * When advancing to the next output region (ToPA entry), given a page offset
646 * into the buffer, we need to find the offset of the first page in the next
649 static unsigned int pt_topa_next_entry(struct pt_buffer
*buf
, unsigned int pg
)
651 struct topa_entry
*te
= buf
->topa_index
[pg
];
654 if (buf
->first
== buf
->last
&& buf
->first
->last
== 1)
659 pg
&= buf
->nr_pages
- 1;
660 } while (buf
->topa_index
[pg
] == te
);
666 * pt_buffer_reset_markers() - place interrupt and stop bits in the buffer
668 * @handle: Current output handle.
670 * Place INT and STOP marks to prevent overwriting old data that the consumer
671 * hasn't yet collected and waking up the consumer after a certain fraction of
672 * the buffer has filled up. Only needed and sensible for non-snapshot counters.
674 * This obviously relies on buf::head to figure out buffer markers, so it has
675 * to be called after pt_buffer_reset_offsets() and before the hardware tracing
678 static int pt_buffer_reset_markers(struct pt_buffer
*buf
,
679 struct perf_output_handle
*handle
)
682 unsigned long head
= local64_read(&buf
->head
);
683 unsigned long idx
, npages
, wakeup
;
685 /* can't stop in the middle of an output region */
686 if (buf
->output_off
+ handle
->size
+ 1 <
687 sizes(TOPA_ENTRY(buf
->cur
, buf
->cur_idx
)->size
))
691 /* single entry ToPA is handled by marking all regions STOP=1 INT=1 */
692 if (!pt_cap_get(PT_CAP_topa_multiple_entries
))
695 /* clear STOP and INT from current entry */
696 buf
->topa_index
[buf
->stop_pos
]->stop
= 0;
697 buf
->topa_index
[buf
->intr_pos
]->intr
= 0;
699 /* how many pages till the STOP marker */
700 npages
= handle
->size
>> PAGE_SHIFT
;
702 /* if it's on a page boundary, fill up one more page */
703 if (!offset_in_page(head
+ handle
->size
+ 1))
706 idx
= (head
>> PAGE_SHIFT
) + npages
;
707 idx
&= buf
->nr_pages
- 1;
710 wakeup
= handle
->wakeup
>> PAGE_SHIFT
;
712 /* in the worst case, wake up the consumer one page before hard stop */
713 idx
= (head
>> PAGE_SHIFT
) + npages
- 1;
717 idx
&= buf
->nr_pages
- 1;
720 buf
->topa_index
[buf
->stop_pos
]->stop
= 1;
721 buf
->topa_index
[buf
->intr_pos
]->intr
= 1;
727 * pt_buffer_setup_topa_index() - build topa_index[] table of regions
730 * topa_index[] references output regions indexed by offset into the
731 * buffer for purposes of quick reverse lookup.
733 static void pt_buffer_setup_topa_index(struct pt_buffer
*buf
)
735 struct topa
*cur
= buf
->first
, *prev
= buf
->last
;
736 struct topa_entry
*te_cur
= TOPA_ENTRY(cur
, 0),
737 *te_prev
= TOPA_ENTRY(prev
, prev
->last
- 1);
740 while (pg
< buf
->nr_pages
) {
743 /* pages within one topa entry */
744 for (tidx
= 0; tidx
< 1 << te_cur
->size
; tidx
++, pg
++)
745 buf
->topa_index
[pg
] = te_prev
;
749 if (idx
== cur
->last
- 1) {
750 /* advance to next topa table */
752 cur
= list_entry(cur
->list
.next
, struct topa
, list
);
756 te_cur
= TOPA_ENTRY(cur
, idx
);
762 * pt_buffer_reset_offsets() - adjust buffer's write pointers from aux_head
764 * @head: Write pointer (aux_head) from AUX buffer.
766 * Find the ToPA table and entry corresponding to given @head and set buffer's
767 * "current" pointers accordingly. This is done after we have obtained the
768 * current aux_head position from a successful call to perf_aux_output_begin()
769 * to make sure the hardware is writing to the right place.
771 * This function modifies buf::{cur,cur_idx,output_off} that will be programmed
772 * into PT msrs when the tracing is enabled and buf::head and buf::data_size,
773 * which are used to determine INT and STOP markers' locations by a subsequent
774 * call to pt_buffer_reset_markers().
776 static void pt_buffer_reset_offsets(struct pt_buffer
*buf
, unsigned long head
)
781 head
&= (buf
->nr_pages
<< PAGE_SHIFT
) - 1;
783 pg
= (head
>> PAGE_SHIFT
) & (buf
->nr_pages
- 1);
784 pg
= pt_topa_next_entry(buf
, pg
);
786 buf
->cur
= (struct topa
*)((unsigned long)buf
->topa_index
[pg
] & PAGE_MASK
);
787 buf
->cur_idx
= ((unsigned long)buf
->topa_index
[pg
] -
788 (unsigned long)buf
->cur
) / sizeof(struct topa_entry
);
789 buf
->output_off
= head
& (sizes(buf
->cur
->table
[buf
->cur_idx
].size
) - 1);
791 local64_set(&buf
->head
, head
);
792 local_set(&buf
->data_size
, 0);
796 * pt_buffer_fini_topa() - deallocate ToPA structure of a buffer
799 static void pt_buffer_fini_topa(struct pt_buffer
*buf
)
801 struct topa
*topa
, *iter
;
803 list_for_each_entry_safe(topa
, iter
, &buf
->tables
, list
) {
805 * right now, this is in free_aux() path only, so
806 * no need to unlink this table from the list
813 * pt_buffer_init_topa() - initialize ToPA table for pt buffer
815 * @size: Total size of all regions within this ToPA.
816 * @gfp: Allocation flags.
818 static int pt_buffer_init_topa(struct pt_buffer
*buf
, unsigned long nr_pages
,
824 topa
= topa_alloc(buf
->cpu
, gfp
);
828 topa_insert_table(buf
, topa
);
830 while (buf
->nr_pages
< nr_pages
) {
831 err
= topa_insert_pages(buf
, gfp
);
833 pt_buffer_fini_topa(buf
);
838 pt_buffer_setup_topa_index(buf
);
840 /* link last table to the first one, unless we're double buffering */
841 if (pt_cap_get(PT_CAP_topa_multiple_entries
)) {
842 TOPA_ENTRY(buf
->last
, -1)->base
= buf
->first
->phys
>> TOPA_SHIFT
;
843 TOPA_ENTRY(buf
->last
, -1)->end
= 1;
851 * pt_buffer_setup_aux() - set up topa tables for a PT buffer
852 * @cpu: Cpu on which to allocate, -1 means current.
853 * @pages: Array of pointers to buffer pages passed from perf core.
854 * @nr_pages: Number of pages in the buffer.
855 * @snapshot: If this is a snapshot/overwrite counter.
857 * This is a pmu::setup_aux callback that sets up ToPA tables and all the
858 * bookkeeping for an AUX buffer.
860 * Return: Our private PT buffer structure.
863 pt_buffer_setup_aux(int cpu
, void **pages
, int nr_pages
, bool snapshot
)
865 struct pt_buffer
*buf
;
872 cpu
= raw_smp_processor_id();
873 node
= cpu_to_node(cpu
);
875 buf
= kzalloc_node(offsetof(struct pt_buffer
, topa_index
[nr_pages
]),
881 buf
->snapshot
= snapshot
;
882 buf
->data_pages
= pages
;
884 INIT_LIST_HEAD(&buf
->tables
);
886 ret
= pt_buffer_init_topa(buf
, nr_pages
, GFP_KERNEL
);
896 * pt_buffer_free_aux() - perf AUX deallocation path callback
899 static void pt_buffer_free_aux(void *data
)
901 struct pt_buffer
*buf
= data
;
903 pt_buffer_fini_topa(buf
);
908 * pt_buffer_is_full() - check if the buffer is full
910 * @pt: Per-cpu pt handle.
912 * If the user hasn't read data from the output region that aux_head
913 * points to, the buffer is considered full: the user needs to read at
914 * least this region and update aux_tail to point past it.
916 static bool pt_buffer_is_full(struct pt_buffer
*buf
, struct pt
*pt
)
921 if (local_read(&buf
->data_size
) >= pt
->handle
.size
)
928 * intel_pt_interrupt() - PT PMI handler
930 void intel_pt_interrupt(void)
932 struct pt
*pt
= this_cpu_ptr(&pt_ctx
);
933 struct pt_buffer
*buf
;
934 struct perf_event
*event
= pt
->handle
.event
;
937 * There may be a dangling PT bit in the interrupt status register
938 * after PT has been disabled by pt_event_stop(). Make sure we don't
939 * do anything (particularly, re-enable) for this event here.
941 if (!ACCESS_ONCE(pt
->handle_nmi
))
944 pt_config_start(false);
949 buf
= perf_get_aux(&pt
->handle
);
955 pt_handle_status(pt
);
959 perf_aux_output_end(&pt
->handle
, local_xchg(&buf
->data_size
, 0),
960 local_xchg(&buf
->lost
, 0));
962 if (!event
->hw
.state
) {
965 buf
= perf_aux_output_begin(&pt
->handle
, event
);
967 event
->hw
.state
= PERF_HES_STOPPED
;
971 pt_buffer_reset_offsets(buf
, pt
->handle
.head
);
972 /* snapshot counters don't use PMI, so it's safe */
973 ret
= pt_buffer_reset_markers(buf
, &pt
->handle
);
975 perf_aux_output_end(&pt
->handle
, 0, true);
979 pt_config_buffer(buf
->cur
->table
, buf
->cur_idx
,
989 static void pt_event_start(struct perf_event
*event
, int mode
)
991 struct pt
*pt
= this_cpu_ptr(&pt_ctx
);
992 struct pt_buffer
*buf
= perf_get_aux(&pt
->handle
);
994 if (!buf
|| pt_buffer_is_full(buf
, pt
)) {
995 event
->hw
.state
= PERF_HES_STOPPED
;
999 ACCESS_ONCE(pt
->handle_nmi
) = 1;
1000 event
->hw
.state
= 0;
1002 pt_config_buffer(buf
->cur
->table
, buf
->cur_idx
,
1007 static void pt_event_stop(struct perf_event
*event
, int mode
)
1009 struct pt
*pt
= this_cpu_ptr(&pt_ctx
);
1012 * Protect against the PMI racing with disabling wrmsr,
1013 * see comment in intel_pt_interrupt().
1015 ACCESS_ONCE(pt
->handle_nmi
) = 0;
1016 pt_config_start(false);
1018 if (event
->hw
.state
== PERF_HES_STOPPED
)
1021 event
->hw
.state
= PERF_HES_STOPPED
;
1023 if (mode
& PERF_EF_UPDATE
) {
1024 struct pt_buffer
*buf
= perf_get_aux(&pt
->handle
);
1029 if (WARN_ON_ONCE(pt
->handle
.event
!= event
))
1032 pt_read_offset(buf
);
1034 pt_handle_status(pt
);
1040 static void pt_event_del(struct perf_event
*event
, int mode
)
1042 struct pt
*pt
= this_cpu_ptr(&pt_ctx
);
1043 struct pt_buffer
*buf
;
1045 pt_event_stop(event
, PERF_EF_UPDATE
);
1047 buf
= perf_get_aux(&pt
->handle
);
1052 local_xchg(&buf
->data_size
,
1053 buf
->nr_pages
<< PAGE_SHIFT
);
1054 perf_aux_output_end(&pt
->handle
, local_xchg(&buf
->data_size
, 0),
1055 local_xchg(&buf
->lost
, 0));
1059 static int pt_event_add(struct perf_event
*event
, int mode
)
1061 struct pt_buffer
*buf
;
1062 struct pt
*pt
= this_cpu_ptr(&pt_ctx
);
1063 struct hw_perf_event
*hwc
= &event
->hw
;
1066 if (pt
->handle
.event
)
1069 buf
= perf_aux_output_begin(&pt
->handle
, event
);
1074 pt_buffer_reset_offsets(buf
, pt
->handle
.head
);
1075 if (!buf
->snapshot
) {
1076 ret
= pt_buffer_reset_markers(buf
, &pt
->handle
);
1081 if (mode
& PERF_EF_START
) {
1082 pt_event_start(event
, 0);
1084 if (hwc
->state
== PERF_HES_STOPPED
)
1087 hwc
->state
= PERF_HES_STOPPED
;
1093 perf_aux_output_end(&pt
->handle
, 0, true);
1095 hwc
->state
= PERF_HES_STOPPED
;
1100 static void pt_event_read(struct perf_event
*event
)
1104 static void pt_event_destroy(struct perf_event
*event
)
1106 x86_del_exclusive(x86_lbr_exclusive_pt
);
1109 static int pt_event_init(struct perf_event
*event
)
1111 if (event
->attr
.type
!= pt_pmu
.pmu
.type
)
1114 if (!pt_event_valid(event
))
1117 if (x86_add_exclusive(x86_lbr_exclusive_pt
))
1120 event
->destroy
= pt_event_destroy
;
1125 static __init
int pt_init(void)
1127 int ret
, cpu
, prior_warn
= 0;
1129 BUILD_BUG_ON(sizeof(struct topa
) > PAGE_SIZE
);
1131 if (!test_cpu_cap(&boot_cpu_data
, X86_FEATURE_INTEL_PT
))
1135 for_each_online_cpu(cpu
) {
1138 ret
= rdmsrl_safe_on_cpu(cpu
, MSR_IA32_RTIT_CTL
, &ctl
);
1139 if (!ret
&& (ctl
& RTIT_CTL_TRACEEN
))
1145 x86_add_exclusive(x86_lbr_exclusive_pt
);
1146 pr_warn("PT is enabled at boot time, doing nothing\n");
1151 ret
= pt_pmu_hw_init();
1155 if (!pt_cap_get(PT_CAP_topa_output
)) {
1156 pr_warn("ToPA output is not supported on this CPU\n");
1160 if (!pt_cap_get(PT_CAP_topa_multiple_entries
))
1161 pt_pmu
.pmu
.capabilities
=
1162 PERF_PMU_CAP_AUX_NO_SG
| PERF_PMU_CAP_AUX_SW_DOUBLEBUF
;
1164 pt_pmu
.pmu
.capabilities
|= PERF_PMU_CAP_EXCLUSIVE
| PERF_PMU_CAP_ITRACE
;
1165 pt_pmu
.pmu
.attr_groups
= pt_attr_groups
;
1166 pt_pmu
.pmu
.task_ctx_nr
= perf_sw_context
;
1167 pt_pmu
.pmu
.event_init
= pt_event_init
;
1168 pt_pmu
.pmu
.add
= pt_event_add
;
1169 pt_pmu
.pmu
.del
= pt_event_del
;
1170 pt_pmu
.pmu
.start
= pt_event_start
;
1171 pt_pmu
.pmu
.stop
= pt_event_stop
;
1172 pt_pmu
.pmu
.read
= pt_event_read
;
1173 pt_pmu
.pmu
.setup_aux
= pt_buffer_setup_aux
;
1174 pt_pmu
.pmu
.free_aux
= pt_buffer_free_aux
;
1175 ret
= perf_pmu_register(&pt_pmu
.pmu
, "intel_pt", -1);
1179 arch_initcall(pt_init
);