arch/x86/kernel/devicetree.c

   1 /*
   2  * Architecture specific OF callbacks.
   3  */
   4 #include <linux/bootmem.h>
   5 #include <linux/export.h>
   6 #include <linux/io.h>
   7 #include <linux/irqdomain.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/list.h>
  10 #include <linux/of.h>
  11 #include <linux/of_fdt.h>
  12 #include <linux/of_address.h>
  13 #include <linux/of_platform.h>
  14 #include <linux/of_irq.h>
  15 #include <linux/slab.h>
  16 #include <linux/pci.h>
  17 #include <linux/of_pci.h>
  18 #include <linux/initrd.h>
  19
  20 #include <asm/hpet.h>
  21 #include <asm/apic.h>
  22 #include <asm/pci_x86.h>
  23 #include <asm/setup.h>
  24 #include <asm/i8259.h>
  25
  26 __initdata u64 initial_dtb;
  27 char __initdata cmd_line[COMMAND_LINE_SIZE];
  28
  29 int __initdata of_ioapic;
  30
  31 void __init early_init_dt_scan_chosen_arch(unsigned long node)
  32 {
  33         BUG();
  34 }
  35
  36 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
  37 {
  38         BUG();
  39 }
  40
  41 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
  42 {
  43         return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
  44 }
  45
  46 void __init add_dtb(u64 data)
  47 {
  48         initial_dtb = data + offsetof(struct setup_data, data);
  49 }
  50
  51 /*
  52  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
  53  */
  54 static struct of_device_id __initdata ce4100_ids[] = {
  55         { .compatible = "intel,ce4100-cp", },
  56         { .compatible = "isa", },
  57         { .compatible = "pci", },
  58         {},
  59 };
  60
  61 static int __init add_bus_probe(void)
  62 {
  63         if (!of_have_populated_dt())
  64                 return 0;
  65
  66         return of_platform_bus_probe(NULL, ce4100_ids, NULL);
  67 }
  68 module_init(add_bus_probe);
  69
  70 #ifdef CONFIG_PCI
  71 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
  72 {
  73         struct device_node *np;
  74
  75         for_each_node_by_type(np, "pci") {
  76                 const void *prop;
  77                 unsigned int bus_min;
  78
  79                 prop = of_get_property(np, "bus-range", NULL);
  80                 if (!prop)
  81                         continue;
  82                 bus_min = be32_to_cpup(prop);
  83                 if (bus->number == bus_min)
  84                         return np;
  85         }
  86         return NULL;
  87 }
  88
  89 static int x86_of_pci_irq_enable(struct pci_dev *dev)
  90 {
  91         u32 virq;
  92         int ret;
  93         u8 pin;
  94
  95         ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
  96         if (ret)
  97                 return ret;
  98         if (!pin)
  99                 return 0;
 100
 101         virq = of_irq_parse_and_map_pci(dev, 0, 0);
 102         if (virq == 0)
 103                 return -EINVAL;
 104         dev->irq = virq;
 105         return 0;
 106 }
 107
 108 static void x86_of_pci_irq_disable(struct pci_dev *dev)
 109 {
 110 }
 111
 112 void x86_of_pci_init(void)
 113 {
 114         pcibios_enable_irq = x86_of_pci_irq_enable;
 115         pcibios_disable_irq = x86_of_pci_irq_disable;
 116 }
 117 #endif
 118
 119 static void __init dtb_setup_hpet(void)
 120 {
 121 #ifdef CONFIG_HPET_TIMER
 122         struct device_node *dn;
 123         struct resource r;
 124         int ret;
 125
 126         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
 127         if (!dn)
 128                 return;
 129         ret = of_address_to_resource(dn, 0, &r);
 130         if (ret) {
 131                 WARN_ON(1);
 132                 return;
 133         }
 134         hpet_address = r.start;
 135 #endif
 136 }
 137
 138 static void __init dtb_lapic_setup(void)
 139 {
 140 #ifdef CONFIG_X86_LOCAL_APIC
 141         struct device_node *dn;
 142         struct resource r;
 143         int ret;
 144
 145         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
 146         if (!dn)
 147                 return;
 148
 149         ret = of_address_to_resource(dn, 0, &r);
 150         if (WARN_ON(ret))
 151                 return;
 152
 153         /* Did the boot loader setup the local APIC ? */
 154         if (!cpu_has_apic) {
 155                 if (apic_force_enable(r.start))
 156                         return;
 157         }
 158         smp_found_config = 1;
 159         pic_mode = 1;
 160         register_lapic_address(r.start);
 161         generic_processor_info(boot_cpu_physical_apicid,
 162                                GET_APIC_VERSION(apic_read(APIC_LVR)));
 163 #endif
 164 }
 165
 166 #ifdef CONFIG_X86_IO_APIC
 167 static unsigned int ioapic_id;
 168
 169 static void __init dtb_add_ioapic(struct device_node *dn)
 170 {
 171         struct resource r;
 172         int ret;
 173
 174         ret = of_address_to_resource(dn, 0, &r);
 175         if (ret) {
 176                 printk(KERN_ERR "Can't obtain address from node %s.\n",
 177                                 dn->full_name);
 178                 return;
 179         }
 180         mp_register_ioapic(++ioapic_id, r.start, gsi_top);
 181 }
 182
 183 static void __init dtb_ioapic_setup(void)
 184 {
 185         struct device_node *dn;
 186
 187         for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
 188                 dtb_add_ioapic(dn);
 189
 190         if (nr_ioapics) {
 191                 of_ioapic = 1;
 192                 return;
 193         }
 194         printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
 195 }
 196 #else
 197 static void __init dtb_ioapic_setup(void) {}
 198 #endif
 199
 200 static void __init dtb_apic_setup(void)
 201 {
 202         dtb_lapic_setup();
 203         dtb_ioapic_setup();
 204 }
 205
 206 #ifdef CONFIG_OF_FLATTREE
 207 static void __init x86_flattree_get_config(void)
 208 {
 209         u32 size, map_len;
 210         void *dt;
 211
 212         if (!initial_dtb)
 213                 return;
 214
 215         map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128);
 216
 217         initial_boot_params = dt = early_memremap(initial_dtb, map_len);
 218         size = of_get_flat_dt_size();
 219         if (map_len < size) {
 220                 early_iounmap(dt, map_len);
 221                 initial_boot_params = dt = early_memremap(initial_dtb, size);
 222                 map_len = size;
 223         }
 224
 225         unflatten_and_copy_device_tree();
 226         early_iounmap(dt, map_len);
 227 }
 228 #else
 229 static inline void x86_flattree_get_config(void) { }
 230 #endif
 231
 232 void __init x86_dtb_init(void)
 233 {
 234         x86_flattree_get_config();
 235
 236         if (!of_have_populated_dt())
 237                 return;
 238
 239         dtb_setup_hpet();
 240         dtb_apic_setup();
 241 }
 242
 243 #ifdef CONFIG_X86_IO_APIC
 244
 245 struct of_ioapic_type {
 246         u32 out_type;
 247         u32 trigger;
 248         u32 polarity;
 249 };
 250
 251 static struct of_ioapic_type of_ioapic_type[] =
 252 {
 253         {
 254                 .out_type       = IRQ_TYPE_EDGE_RISING,
 255                 .trigger        = IOAPIC_EDGE,
 256                 .polarity       = 1,
 257         },
 258         {
 259                 .out_type       = IRQ_TYPE_LEVEL_LOW,
 260                 .trigger        = IOAPIC_LEVEL,
 261                 .polarity       = 0,
 262         },
 263         {
 264                 .out_type       = IRQ_TYPE_LEVEL_HIGH,
 265                 .trigger        = IOAPIC_LEVEL,
 266                 .polarity       = 1,
 267         },
 268         {
 269                 .out_type       = IRQ_TYPE_EDGE_FALLING,
 270                 .trigger        = IOAPIC_EDGE,
 271                 .polarity       = 0,
 272         },
 273 };
 274
 275 static int ioapic_xlate(struct irq_domain *domain,
 276                         struct device_node *controller,
 277                         const u32 *intspec, u32 intsize,
 278                         irq_hw_number_t *out_hwirq, u32 *out_type)
 279 {
 280         struct io_apic_irq_attr attr;
 281         struct of_ioapic_type *it;
 282         u32 line, idx;
 283         int rc;
 284
 285         if (WARN_ON(intsize < 2))
 286                 return -EINVAL;
 287
 288         line = intspec[0];
 289
 290         if (intspec[1] >= ARRAY_SIZE(of_ioapic_type))
 291                 return -EINVAL;
 292
 293         it = &of_ioapic_type[intspec[1]];
 294
 295         idx = (u32) domain->host_data;
 296         set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
 297
 298         rc = io_apic_setup_irq_pin_once(irq_find_mapping(domain, line),
 299                                         cpu_to_node(0), &attr);
 300         if (rc)
 301                 return rc;
 302
 303         *out_hwirq = line;
 304         *out_type = it->out_type;
 305         return 0;
 306 }
 307
 308 const struct irq_domain_ops ioapic_irq_domain_ops = {
 309         .xlate = ioapic_xlate,
 310 };
 311
 312 static void dt_add_ioapic_domain(unsigned int ioapic_num,
 313                 struct device_node *np)
 314 {
 315         struct irq_domain *id;
 316         struct mp_ioapic_gsi *gsi_cfg;
 317         int ret;
 318         int num, legacy_irqs = nr_legacy_irqs();
 319
 320         gsi_cfg = mp_ioapic_gsi_routing(ioapic_num);
 321         num = gsi_cfg->gsi_end - gsi_cfg->gsi_base + 1;
 322
 323         id = irq_domain_add_linear(np, num, &ioapic_irq_domain_ops,
 324                         (void *)ioapic_num);
 325         BUG_ON(!id);
 326         if (gsi_cfg->gsi_base == 0) {
 327                 /*
 328                  * The first nr_legacy_irqs() irq descs are allocated in
 329                  * early_irq_init() and need just a mapping. The
 330                  * remaining irqs need both. All of them are preallocated
 331                  * and assigned so we can keep the 1:1 mapping which the ioapic
 332                  * is having.
 333                  */
 334                 irq_domain_associate_many(id, 0, 0, legacy_irqs);
 335
 336                 if (num > legacy_irqs) {
 337                         ret = irq_create_strict_mappings(id, legacy_irqs,
 338                                         legacy_irqs, num - legacy_irqs);
 339                         if (ret)
 340                                 pr_err("Error creating mapping for the "
 341                                                 "remaining IRQs: %d\n", ret);
 342                 }
 343                 irq_set_default_host(id);
 344         } else {
 345                 ret = irq_create_strict_mappings(id, gsi_cfg->gsi_base, 0, num);
 346                 if (ret)
 347                         pr_err("Error creating IRQ mapping: %d\n", ret);
 348         }
 349 }
 350
 351 static void __init ioapic_add_ofnode(struct device_node *np)
 352 {
 353         struct resource r;
 354         int i, ret;
 355
 356         ret = of_address_to_resource(np, 0, &r);
 357         if (ret) {
 358                 printk(KERN_ERR "Failed to obtain address for %s\n",
 359                                 np->full_name);
 360                 return;
 361         }
 362
 363         for (i = 0; i < nr_ioapics; i++) {
 364                 if (r.start == mpc_ioapic_addr(i)) {
 365                         dt_add_ioapic_domain(i, np);
 366                         return;
 367                 }
 368         }
 369         printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
 370 }
 371
 372 void __init x86_add_irq_domains(void)
 373 {
 374         struct device_node *dp;
 375
 376         if (!of_have_populated_dt())
 377                 return;
 378
 379         for_each_node_with_property(dp, "interrupt-controller") {
 380                 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
 381                         ioapic_add_ofnode(dp);
 382         }
 383 }
 384 #else
 385 void __init x86_add_irq_domains(void) { }
 386 #endif