2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
10 * entry.S contains the system-call and fault low-level handling routines.
12 * Some of this is documented in Documentation/x86/entry_64.txt
14 * NOTE: This code handles signal-recognition, which happens every time
15 * after an interrupt and after each system call.
17 * A note on terminology:
18 * - iret frame: Architecture defined interrupt frame from SS to RIP
19 * at the top of the kernel process stack.
22 * - CFI macros are used to generate dwarf2 unwind information for better
23 * backtraces. They don't change any code.
24 * - ENTRY/END Define functions in the symbol table.
25 * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.
26 * - idtentry - Define exception entry points.
29 #include <linux/linkage.h>
30 #include <asm/segment.h>
31 #include <asm/cache.h>
32 #include <asm/errno.h>
33 #include <asm/dwarf2.h>
34 #include <asm/calling.h>
35 #include <asm/asm-offsets.h>
37 #include <asm/unistd.h>
38 #include <asm/thread_info.h>
39 #include <asm/hw_irq.h>
40 #include <asm/page_types.h>
41 #include <asm/irqflags.h>
42 #include <asm/paravirt.h>
43 #include <asm/percpu.h>
45 #include <asm/context_tracking.h>
47 #include <asm/pgtable_types.h>
48 #include <linux/err.h>
50 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
51 #include <linux/elf-em.h>
52 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
53 #define __AUDIT_ARCH_64BIT 0x80000000
54 #define __AUDIT_ARCH_LE 0x40000000
57 .section .entry.text, "ax"
60 #ifdef CONFIG_PARAVIRT
61 ENTRY(native_usergs_sysret64)
64 ENDPROC(native_usergs_sysret64)
65 #endif /* CONFIG_PARAVIRT */
68 .macro TRACE_IRQS_IRETQ
69 #ifdef CONFIG_TRACE_IRQFLAGS
70 bt $9,EFLAGS(%rsp) /* interrupts off? */
78 * When dynamic function tracer is enabled it will add a breakpoint
79 * to all locations that it is about to modify, sync CPUs, update
80 * all the code, sync CPUs, then remove the breakpoints. In this time
81 * if lockdep is enabled, it might jump back into the debug handler
82 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
84 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
85 * make sure the stack pointer does not get reset back to the top
86 * of the debug stack, and instead just reuses the current stack.
88 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
90 .macro TRACE_IRQS_OFF_DEBUG
91 call debug_stack_set_zero
93 call debug_stack_reset
96 .macro TRACE_IRQS_ON_DEBUG
97 call debug_stack_set_zero
99 call debug_stack_reset
102 .macro TRACE_IRQS_IRETQ_DEBUG
103 bt $9,EFLAGS(%rsp) /* interrupts off? */
110 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
111 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
112 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
118 .macro EMPTY_FRAME start=1 offset=0
122 CFI_DEF_CFA rsp,8+\offset
124 CFI_DEF_CFA_OFFSET 8+\offset
129 * initial frame state for interrupts (and exceptions without error code)
131 .macro INTR_FRAME start=1 offset=0
132 EMPTY_FRAME \start, 5*8+\offset
133 /*CFI_REL_OFFSET ss, 4*8+\offset*/
134 CFI_REL_OFFSET rsp, 3*8+\offset
135 /*CFI_REL_OFFSET rflags, 2*8+\offset*/
136 /*CFI_REL_OFFSET cs, 1*8+\offset*/
137 CFI_REL_OFFSET rip, 0*8+\offset
141 * initial frame state for exceptions with error code (and interrupts
142 * with vector already pushed)
144 .macro XCPT_FRAME start=1 offset=0
145 INTR_FRAME \start, 1*8+\offset
149 * frame that enables passing a complete pt_regs to a C function.
151 .macro DEFAULT_FRAME start=1 offset=0
152 XCPT_FRAME \start, ORIG_RAX+\offset
153 CFI_REL_OFFSET rdi, RDI+\offset
154 CFI_REL_OFFSET rsi, RSI+\offset
155 CFI_REL_OFFSET rdx, RDX+\offset
156 CFI_REL_OFFSET rcx, RCX+\offset
157 CFI_REL_OFFSET rax, RAX+\offset
158 CFI_REL_OFFSET r8, R8+\offset
159 CFI_REL_OFFSET r9, R9+\offset
160 CFI_REL_OFFSET r10, R10+\offset
161 CFI_REL_OFFSET r11, R11+\offset
162 CFI_REL_OFFSET rbx, RBX+\offset
163 CFI_REL_OFFSET rbp, RBP+\offset
164 CFI_REL_OFFSET r12, R12+\offset
165 CFI_REL_OFFSET r13, R13+\offset
166 CFI_REL_OFFSET r14, R14+\offset
167 CFI_REL_OFFSET r15, R15+\offset
171 * 64bit SYSCALL instruction entry. Up to 6 arguments in registers.
173 * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
174 * then loads new ss, cs, and rip from previously programmed MSRs.
175 * rflags gets masked by a value from another MSR (so CLD and CLAC
176 * are not needed). SYSCALL does not save anything on the stack
177 * and does not change rsp.
179 * Registers on entry:
180 * rax system call number
182 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
186 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
189 * (note: r12-r15,rbp,rbx are callee-preserved in C ABI)
191 * Only called from user space.
193 * When user can change pt_regs->foo always force IRET. That is because
194 * it deals with uncanonical addresses better. SYSRET has trouble
195 * with them due to bugs in both AMD and Intel CPUs.
203 /*CFI_REGISTER rflags,r11*/
206 * Interrupts are off on entry.
207 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
208 * it is too small to ever cause noticeable irq latency.
212 * A hypervisor implementation might want to use a label
213 * after the swapgs, so that it can do the swapgs
214 * for the guest and jump here on syscall.
216 GLOBAL(system_call_after_swapgs)
218 movq %rsp,PER_CPU_VAR(rsp_scratch)
219 movq PER_CPU_VAR(cpu_current_top_of_stack),%rsp
221 /* Construct struct pt_regs on stack */
222 pushq_cfi $__USER_DS /* pt_regs->ss */
223 pushq_cfi PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
225 * Re-enable interrupts.
226 * We use 'rsp_scratch' as a scratch space, hence irq-off block above
227 * must execute atomically in the face of possible interrupt-driven
228 * task preemption. We must enable interrupts only after we're done
229 * with using rsp_scratch:
231 ENABLE_INTERRUPTS(CLBR_NONE)
232 pushq_cfi %r11 /* pt_regs->flags */
233 pushq_cfi $__USER_CS /* pt_regs->cs */
234 pushq_cfi %rcx /* pt_regs->ip */
236 pushq_cfi_reg rax /* pt_regs->orig_ax */
237 pushq_cfi_reg rdi /* pt_regs->di */
238 pushq_cfi_reg rsi /* pt_regs->si */
239 pushq_cfi_reg rdx /* pt_regs->dx */
240 pushq_cfi_reg rcx /* pt_regs->cx */
241 pushq_cfi $-ENOSYS /* pt_regs->ax */
242 pushq_cfi_reg r8 /* pt_regs->r8 */
243 pushq_cfi_reg r9 /* pt_regs->r9 */
244 pushq_cfi_reg r10 /* pt_regs->r10 */
245 pushq_cfi_reg r11 /* pt_regs->r11 */
246 sub $(6*8),%rsp /* pt_regs->bp,bx,r12-15 not saved */
247 CFI_ADJUST_CFA_OFFSET 6*8
249 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
251 system_call_fastpath:
252 #if __SYSCALL_MASK == ~0
253 cmpq $__NR_syscall_max,%rax
255 andl $__SYSCALL_MASK,%eax
256 cmpl $__NR_syscall_max,%eax
258 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
260 call *sys_call_table(,%rax,8)
264 * Syscall return path ending with SYSRET (fast path).
265 * Has incompletely filled pt_regs.
269 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
270 * it is too small to ever cause noticeable irq latency.
272 DISABLE_INTERRUPTS(CLBR_NONE)
275 * We must check ti flags with interrupts (or at least preemption)
276 * off because we must *never* return to userspace without
277 * processing exit work that is enqueued if we're preempted here.
278 * In particular, returning to userspace with any of the one-shot
279 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
282 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
283 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */
287 RESTORE_C_REGS_EXCEPT_RCX_R11
290 movq EFLAGS(%rsp),%r11
291 /*CFI_REGISTER rflags,r11*/
294 * 64bit SYSRET restores rip from rcx,
295 * rflags from r11 (but RF and VM bits are forced to 0),
296 * cs and ss are loaded from MSRs.
297 * Restoration of rflags re-enables interrupts.
299 * NB: On AMD CPUs with the X86_BUG_SYSRET_SS_ATTRS bug, the ss
300 * descriptor is not reinitialized. This means that we should
301 * avoid SYSRET with SS == NULL, which could happen if we schedule,
302 * exit the kernel, and re-enter using an interrupt vector. (All
303 * interrupt entries on x86_64 set SS to NULL.) We prevent that
304 * from happening by reloading SS in __switch_to. (Actually
305 * detecting the failure in 64-bit userspace is tricky but can be
312 /* Do syscall entry tracing */
315 movl $AUDIT_ARCH_X86_64, %esi
316 call syscall_trace_enter_phase1
318 jnz tracesys_phase2 /* if needed, run the slow path */
319 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
320 movq ORIG_RAX(%rsp), %rax
321 jmp system_call_fastpath /* and return to the fast path */
326 movl $AUDIT_ARCH_X86_64, %esi
328 call syscall_trace_enter_phase2
331 * Reload registers from stack in case ptrace changed them.
332 * We don't reload %rax because syscall_trace_entry_phase2() returned
333 * the value it wants us to use in the table lookup.
335 RESTORE_C_REGS_EXCEPT_RAX
337 #if __SYSCALL_MASK == ~0
338 cmpq $__NR_syscall_max,%rax
340 andl $__SYSCALL_MASK,%eax
341 cmpl $__NR_syscall_max,%eax
343 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
344 movq %r10,%rcx /* fixup for C */
345 call *sys_call_table(,%rax,8)
348 /* Use IRET because user could have changed pt_regs->foo */
351 * Syscall return path ending with IRET.
352 * Has correct iret frame.
354 GLOBAL(int_ret_from_sys_call)
355 DISABLE_INTERRUPTS(CLBR_NONE)
356 int_ret_from_sys_call_irqs_off: /* jumps come here from the irqs-off SYSRET path */
358 movl $_TIF_ALLWORK_MASK,%edi
359 /* edi: mask to check */
360 GLOBAL(int_with_check)
362 GET_THREAD_INFO(%rcx)
363 movl TI_flags(%rcx),%edx
366 andl $~TS_COMPAT,TI_status(%rcx)
369 /* Either reschedule or signal or syscall exit tracking needed. */
370 /* First do a reschedule test. */
371 /* edx: work, edi: workmask */
373 bt $TIF_NEED_RESCHED,%edx
376 ENABLE_INTERRUPTS(CLBR_NONE)
380 DISABLE_INTERRUPTS(CLBR_NONE)
384 /* handle signals and tracing -- both require a full pt_regs */
387 ENABLE_INTERRUPTS(CLBR_NONE)
389 /* Check for syscall exit trace */
390 testl $_TIF_WORK_SYSCALL_EXIT,%edx
393 leaq 8(%rsp),%rdi # &ptregs -> arg1
394 call syscall_trace_leave
396 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
400 testl $_TIF_DO_NOTIFY_MASK,%edx
402 movq %rsp,%rdi # &ptregs -> arg1
403 xorl %esi,%esi # oldset -> arg2
404 call do_notify_resume
405 1: movl $_TIF_WORK_MASK,%edi
408 DISABLE_INTERRUPTS(CLBR_NONE)
413 /* The IRETQ could re-enable interrupts: */
414 DISABLE_INTERRUPTS(CLBR_ANY)
418 * Try to use SYSRET instead of IRET if we're returning to
419 * a completely clean 64-bit userspace context.
423 cmpq %rcx,%r11 /* RCX == RIP */
424 jne opportunistic_sysret_failed
427 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
428 * in kernel space. This essentially lets the user take over
429 * the kernel, since userspace controls RSP.
431 * If width of "canonical tail" ever becomes variable, this will need
432 * to be updated to remain correct on both old and new CPUs.
434 .ifne __VIRTUAL_MASK_SHIFT - 47
435 .error "virtual address width changed -- SYSRET checks need update"
437 /* Change top 16 bits to be the sign-extension of 47th bit */
438 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
439 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
440 /* If this changed %rcx, it was not canonical */
442 jne opportunistic_sysret_failed
444 cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */
445 jne opportunistic_sysret_failed
448 cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */
449 jne opportunistic_sysret_failed
452 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
453 * restoring TF results in a trap from userspace immediately after
454 * SYSRET. This would cause an infinite loop whenever #DB happens
455 * with register state that satisfies the opportunistic SYSRET
456 * conditions. For example, single-stepping this user code:
458 * movq $stuck_here,%rcx
463 * would never get past 'stuck_here'.
465 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
466 jnz opportunistic_sysret_failed
468 /* nothing to check for RSP */
470 cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */
471 jne opportunistic_sysret_failed
474 * We win! This label is here just for ease of understanding
475 * perf profiles. Nothing jumps here.
477 syscall_return_via_sysret:
479 /* rcx and r11 are already restored (see code above) */
480 RESTORE_C_REGS_EXCEPT_RCX_R11
485 opportunistic_sysret_failed:
487 jmp restore_c_regs_and_iret
492 .macro FORK_LIKE func
495 DEFAULT_FRAME 0, 8 /* offset 8: return address */
513 /* exec failed, can use fast SYSRET code path in this case */
516 /* must use IRET code path (pt_regs->cs may have changed) */
518 CFI_ADJUST_CFA_OFFSET -8
521 jmp int_ret_from_sys_call
525 * Remaining execve stubs are only 7 bytes long.
526 * ENTRY() often aligns to 16 bytes, which in this case has no benefits.
529 GLOBAL(stub_execveat)
533 jmp return_from_execve
537 #if defined(CONFIG_X86_X32_ABI) || defined(CONFIG_IA32_EMULATION)
539 GLOBAL(stub_x32_execve)
540 GLOBAL(stub32_execve)
543 call compat_sys_execve
544 jmp return_from_execve
549 GLOBAL(stub_x32_execveat)
550 GLOBAL(stub32_execveat)
553 call compat_sys_execveat
554 jmp return_from_execve
557 END(stub_x32_execveat)
561 * sigreturn is special because it needs to restore all registers on return.
562 * This cannot be done with SYSRET, so use the IRET return path instead.
564 ENTRY(stub_rt_sigreturn)
568 * SAVE_EXTRA_REGS result is not normally needed:
569 * sigreturn overwrites all pt_regs->GPREGS.
570 * But sigreturn can fail (!), and there is no easy way to detect that.
571 * To make sure RESTORE_EXTRA_REGS doesn't restore garbage on error,
572 * we SAVE_EXTRA_REGS here.
575 call sys_rt_sigreturn
578 CFI_ADJUST_CFA_OFFSET -8
581 jmp int_ret_from_sys_call
583 END(stub_rt_sigreturn)
585 #ifdef CONFIG_X86_X32_ABI
586 ENTRY(stub_x32_rt_sigreturn)
590 call sys32_x32_rt_sigreturn
593 END(stub_x32_rt_sigreturn)
597 * A newly forked process directly context switches into this address.
599 * rdi: prev task we switched from
604 LOCK ; btr $TIF_FORK,TI_flags(%r8)
607 popfq_cfi # reset kernel eflags
609 call schedule_tail # rdi: 'prev' task parameter
613 testb $3, CS(%rsp) # from kernel_thread?
616 * By the time we get here, we have no idea whether our pt_regs,
617 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
618 * the slow path, or one of the ia32entry paths.
619 * Use IRET code path to return, since it can safely handle
622 jnz int_ret_from_sys_call
624 /* We came from kernel_thread */
625 /* nb: we depend on RESTORE_EXTRA_REGS above */
630 jmp int_ret_from_sys_call
635 * Build the entry stubs with some assembler magic.
636 * We pack 1 stub into every 8-byte block.
639 ENTRY(irq_entries_start)
641 vector=FIRST_EXTERNAL_VECTOR
642 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
643 pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
646 CFI_ADJUST_CFA_OFFSET -8
650 END(irq_entries_start)
653 * Interrupt entry/exit.
655 * Interrupt entry points save only callee clobbered registers in fast path.
657 * Entry runs with interrupts off.
660 /* 0(%rsp): ~(interrupt number) */
661 .macro interrupt func
664 * Since nothing in interrupt handling code touches r12...r15 members
665 * of "struct pt_regs", and since interrupts can nest, we can save
666 * four stack slots and simultaneously provide
667 * an unwind-friendly stack layout by saving "truncated" pt_regs
668 * exactly up to rbp slot, without these members.
670 ALLOC_PT_GPREGS_ON_STACK -RBP
672 /* this goes to 0(%rsp) for unwinder, not for saving the value: */
673 SAVE_EXTRA_REGS_RBP -RBP
675 leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */
677 testb $3, CS-RBP(%rsp)
682 * Save previous stack pointer, optionally switch to interrupt stack.
683 * irq_count is used to check if a CPU is already on an interrupt stack
684 * or not. While this is essentially redundant with preempt_count it is
685 * a little cheaper to use a separate counter in the PDA (short of
686 * moving irq_enter into assembly, which would be too much work)
689 incl PER_CPU_VAR(irq_count)
690 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
691 CFI_DEF_CFA_REGISTER rsi
695 * "CFA (Current Frame Address) is the value on stack + offset"
697 CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
698 0x77 /* DW_OP_breg7 (rsp) */, 0, \
699 0x06 /* DW_OP_deref */, \
700 0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \
701 0x22 /* DW_OP_plus */
702 /* We entered an interrupt context - irqs are off: */
709 * The interrupt stubs push (~vector+0x80) onto the stack and
710 * then jump to common_interrupt.
712 .p2align CONFIG_X86_L1_CACHE_SHIFT
716 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
718 /* 0(%rsp): old RSP */
720 DISABLE_INTERRUPTS(CLBR_NONE)
722 decl PER_CPU_VAR(irq_count)
724 /* Restore saved previous stack */
726 CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */
727 /* return code expects complete pt_regs - adjust rsp accordingly: */
729 CFI_DEF_CFA_REGISTER rsp
730 CFI_ADJUST_CFA_OFFSET RBP
734 /* Interrupt came from user space */
736 GET_THREAD_INFO(%rcx)
738 * %rcx: thread info. Interrupts off.
740 retint_with_reschedule:
741 movl $_TIF_WORK_MASK,%edi
744 movl TI_flags(%rcx),%edx
749 retint_swapgs: /* return to user-space */
751 * The iretq could re-enable interrupts:
753 DISABLE_INTERRUPTS(CLBR_ANY)
757 jmp restore_c_regs_and_iret
759 /* Returning to kernel space */
761 #ifdef CONFIG_PREEMPT
762 /* Interrupts are off */
763 /* Check if we need preemption */
764 bt $9,EFLAGS(%rsp) /* interrupts were off? */
766 0: cmpl $0,PER_CPU_VAR(__preempt_count)
768 call preempt_schedule_irq
773 * The iretq could re-enable interrupts:
778 * At this label, code paths which return to kernel and to user,
779 * which come from interrupts/exception and from syscalls, merge.
781 restore_c_regs_and_iret:
783 REMOVE_PT_GPREGS_FROM_STACK 8
790 * Are we returning to a stack segment from the LDT? Note: in
791 * 64-bit mode SS:RSP on the exception stack is always valid.
793 #ifdef CONFIG_X86_ESPFIX64
794 testb $4,(SS-RIP)(%rsp)
795 jnz native_irq_return_ldt
798 .global native_irq_return_iret
799 native_irq_return_iret:
801 * This may fault. Non-paranoid faults on return to userspace are
802 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
803 * Double-faults due to espfix64 are handled in do_double_fault.
804 * Other faults here are fatal.
808 #ifdef CONFIG_X86_ESPFIX64
809 native_irq_return_ldt:
813 movq PER_CPU_VAR(espfix_waddr),%rdi
814 movq %rax,(0*8)(%rdi) /* RAX */
815 movq (2*8)(%rsp),%rax /* RIP */
816 movq %rax,(1*8)(%rdi)
817 movq (3*8)(%rsp),%rax /* CS */
818 movq %rax,(2*8)(%rdi)
819 movq (4*8)(%rsp),%rax /* RFLAGS */
820 movq %rax,(3*8)(%rdi)
821 movq (6*8)(%rsp),%rax /* SS */
822 movq %rax,(5*8)(%rdi)
823 movq (5*8)(%rsp),%rax /* RSP */
824 movq %rax,(4*8)(%rdi)
825 andl $0xffff0000,%eax
827 orq PER_CPU_VAR(espfix_stack),%rax
831 jmp native_irq_return_iret
834 /* edi: workmask, edx: work */
837 bt $TIF_NEED_RESCHED,%edx
840 ENABLE_INTERRUPTS(CLBR_NONE)
844 GET_THREAD_INFO(%rcx)
845 DISABLE_INTERRUPTS(CLBR_NONE)
850 testl $_TIF_DO_NOTIFY_MASK,%edx
853 ENABLE_INTERRUPTS(CLBR_NONE)
855 movq $-1,ORIG_RAX(%rsp)
856 xorl %esi,%esi # oldset
857 movq %rsp,%rdi # &pt_regs
858 call do_notify_resume
860 DISABLE_INTERRUPTS(CLBR_NONE)
862 GET_THREAD_INFO(%rcx)
863 jmp retint_with_reschedule
866 END(common_interrupt)
871 .macro apicinterrupt3 num sym do_sym
883 #ifdef CONFIG_TRACING
884 #define trace(sym) trace_##sym
885 #define smp_trace(sym) smp_trace_##sym
887 .macro trace_apicinterrupt num sym
888 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
891 .macro trace_apicinterrupt num sym do_sym
895 .macro apicinterrupt num sym do_sym
896 apicinterrupt3 \num \sym \do_sym
897 trace_apicinterrupt \num \sym
901 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \
902 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
903 apicinterrupt3 REBOOT_VECTOR \
904 reboot_interrupt smp_reboot_interrupt
908 apicinterrupt3 UV_BAU_MESSAGE \
909 uv_bau_message_intr1 uv_bau_message_interrupt
911 apicinterrupt LOCAL_TIMER_VECTOR \
912 apic_timer_interrupt smp_apic_timer_interrupt
913 apicinterrupt X86_PLATFORM_IPI_VECTOR \
914 x86_platform_ipi smp_x86_platform_ipi
916 #ifdef CONFIG_HAVE_KVM
917 apicinterrupt3 POSTED_INTR_VECTOR \
918 kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
919 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR \
920 kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
923 #ifdef CONFIG_X86_MCE_THRESHOLD
924 apicinterrupt THRESHOLD_APIC_VECTOR \
925 threshold_interrupt smp_threshold_interrupt
928 #ifdef CONFIG_X86_MCE_AMD
929 apicinterrupt DEFERRED_ERROR_VECTOR \
930 deferred_error_interrupt smp_deferred_error_interrupt
933 #ifdef CONFIG_X86_THERMAL_VECTOR
934 apicinterrupt THERMAL_APIC_VECTOR \
935 thermal_interrupt smp_thermal_interrupt
939 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
940 call_function_single_interrupt smp_call_function_single_interrupt
941 apicinterrupt CALL_FUNCTION_VECTOR \
942 call_function_interrupt smp_call_function_interrupt
943 apicinterrupt RESCHEDULE_VECTOR \
944 reschedule_interrupt smp_reschedule_interrupt
947 apicinterrupt ERROR_APIC_VECTOR \
948 error_interrupt smp_error_interrupt
949 apicinterrupt SPURIOUS_APIC_VECTOR \
950 spurious_interrupt smp_spurious_interrupt
952 #ifdef CONFIG_IRQ_WORK
953 apicinterrupt IRQ_WORK_VECTOR \
954 irq_work_interrupt smp_irq_work_interrupt
958 * Exception entry points.
960 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
962 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
965 .if \shift_ist != -1 && \paranoid == 0
966 .error "using shift_ist requires paranoid=1"
976 PARAVIRT_ADJUST_EXCEPTION_FRAME
978 .ifeq \has_error_code
979 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
982 ALLOC_PT_GPREGS_ON_STACK
987 testb $3, CS(%rsp) /* If coming from userspace, switch */
994 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
1000 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
1006 movq %rsp,%rdi /* pt_regs pointer */
1009 movq ORIG_RAX(%rsp),%rsi /* get error code */
1010 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1012 xorl %esi,%esi /* no error code */
1015 .if \shift_ist != -1
1016 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1021 .if \shift_ist != -1
1022 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1025 /* these procedures expect "no swapgs" flag in ebx */
1035 * Paranoid entry from userspace. Switch stacks and treat it
1036 * as a normal entry. This means that paranoid handlers
1037 * run in real process context if user_mode(regs).
1044 movq %rsp,%rdi /* pt_regs pointer */
1046 movq %rax,%rsp /* switch stack */
1048 movq %rsp,%rdi /* pt_regs pointer */
1051 movq ORIG_RAX(%rsp),%rsi /* get error code */
1052 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1054 xorl %esi,%esi /* no error code */
1059 jmp error_exit /* %ebx: no swapgs flag */
1066 #ifdef CONFIG_TRACING
1067 .macro trace_idtentry sym do_sym has_error_code:req
1068 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
1069 idtentry \sym \do_sym has_error_code=\has_error_code
1072 .macro trace_idtentry sym do_sym has_error_code:req
1073 idtentry \sym \do_sym has_error_code=\has_error_code
1077 idtentry divide_error do_divide_error has_error_code=0
1078 idtentry overflow do_overflow has_error_code=0
1079 idtentry bounds do_bounds has_error_code=0
1080 idtentry invalid_op do_invalid_op has_error_code=0
1081 idtentry device_not_available do_device_not_available has_error_code=0
1082 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1083 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1084 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1085 idtentry segment_not_present do_segment_not_present has_error_code=1
1086 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1087 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1088 idtentry alignment_check do_alignment_check has_error_code=1
1089 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1092 /* Reload gs selector with exception handling */
1093 /* edi: new selector */
1094 ENTRY(native_load_gs_index)
1097 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1101 2: mfence /* workaround */
1106 END(native_load_gs_index)
1108 _ASM_EXTABLE(gs_change,bad_gs)
1109 .section .fixup,"ax"
1110 /* running with kernelgs */
1112 SWAPGS /* switch back to user gs */
1118 /* Call softirq on interrupt stack. Interrupts are off. */
1119 ENTRY(do_softirq_own_stack)
1122 CFI_REL_OFFSET rbp,0
1124 CFI_DEF_CFA_REGISTER rbp
1125 incl PER_CPU_VAR(irq_count)
1126 cmove PER_CPU_VAR(irq_stack_ptr),%rsp
1127 push %rbp # backlink for old unwinder
1131 CFI_DEF_CFA_REGISTER rsp
1132 CFI_ADJUST_CFA_OFFSET -8
1133 decl PER_CPU_VAR(irq_count)
1136 END(do_softirq_own_stack)
1139 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1142 * A note on the "critical region" in our callback handler.
1143 * We want to avoid stacking callback handlers due to events occurring
1144 * during handling of the last event. To do this, we keep events disabled
1145 * until we've done all processing. HOWEVER, we must enable events before
1146 * popping the stack frame (can't be done atomically) and so it would still
1147 * be possible to get enough handler activations to overflow the stack.
1148 * Although unlikely, bugs of that kind are hard to track down, so we'd
1149 * like to avoid the possibility.
1150 * So, on entry to the handler we detect whether we interrupted an
1151 * existing activation in its critical region -- if so, we pop the current
1152 * activation and restart the handler using the previous one.
1154 ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1157 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1158 * see the correct pointer to the pt_regs
1160 movq %rdi, %rsp # we don't return, adjust the stack frame
1163 11: incl PER_CPU_VAR(irq_count)
1165 CFI_DEF_CFA_REGISTER rbp
1166 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
1167 pushq %rbp # backlink for old unwinder
1168 call xen_evtchn_do_upcall
1170 CFI_DEF_CFA_REGISTER rsp
1171 decl PER_CPU_VAR(irq_count)
1172 #ifndef CONFIG_PREEMPT
1173 call xen_maybe_preempt_hcall
1177 END(xen_do_hypervisor_callback)
1180 * Hypervisor uses this for application faults while it executes.
1181 * We get here for two reasons:
1182 * 1. Fault while reloading DS, ES, FS or GS
1183 * 2. Fault while executing IRET
1184 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1185 * registers that could be reloaded and zeroed the others.
1186 * Category 2 we fix up by killing the current process. We cannot use the
1187 * normal Linux return path in this case because if we use the IRET hypercall
1188 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1189 * We distinguish between categories by comparing each saved segment register
1190 * with its current contents: any discrepancy means we in category 1.
1192 ENTRY(xen_failsafe_callback)
1194 /*CFI_REL_OFFSET gs,GS*/
1195 /*CFI_REL_OFFSET fs,FS*/
1196 /*CFI_REL_OFFSET es,ES*/
1197 /*CFI_REL_OFFSET ds,DS*/
1198 CFI_REL_OFFSET r11,8
1199 CFI_REL_OFFSET rcx,0
1213 /* All segments match their saved values => Category 2 (Bad IRET). */
1219 CFI_ADJUST_CFA_OFFSET -0x30
1220 pushq_cfi $0 /* RIP */
1223 jmp general_protection
1225 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1231 CFI_ADJUST_CFA_OFFSET -0x30
1232 pushq_cfi $-1 /* orig_ax = -1 => not a system call */
1233 ALLOC_PT_GPREGS_ON_STACK
1238 END(xen_failsafe_callback)
1240 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1241 xen_hvm_callback_vector xen_evtchn_do_upcall
1243 #endif /* CONFIG_XEN */
1245 #if IS_ENABLED(CONFIG_HYPERV)
1246 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1247 hyperv_callback_vector hyperv_vector_handler
1248 #endif /* CONFIG_HYPERV */
1250 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1251 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1252 idtentry stack_segment do_stack_segment has_error_code=1
1254 idtentry xen_debug do_debug has_error_code=0
1255 idtentry xen_int3 do_int3 has_error_code=0
1256 idtentry xen_stack_segment do_stack_segment has_error_code=1
1258 idtentry general_protection do_general_protection has_error_code=1
1259 trace_idtentry page_fault do_page_fault has_error_code=1
1260 #ifdef CONFIG_KVM_GUEST
1261 idtentry async_page_fault do_async_page_fault has_error_code=1
1263 #ifdef CONFIG_X86_MCE
1264 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1268 * Save all registers in pt_regs, and switch gs if needed.
1269 * Use slow, but surefire "are we in kernel?" check.
1270 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1272 ENTRY(paranoid_entry)
1278 movl $MSR_GS_BASE,%ecx
1281 js 1f /* negative -> in kernel */
1289 * "Paranoid" exit path from exception stack. This is invoked
1290 * only on return from non-NMI IST interrupts that came
1291 * from kernel space.
1293 * We may be returning to very strange contexts (e.g. very early
1294 * in syscall entry), so checking for preemption here would
1295 * be complicated. Fortunately, we there's no good reason
1296 * to try to handle preemption here.
1298 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1299 ENTRY(paranoid_exit)
1301 DISABLE_INTERRUPTS(CLBR_NONE)
1302 TRACE_IRQS_OFF_DEBUG
1303 testl %ebx,%ebx /* swapgs needed? */
1304 jnz paranoid_exit_no_swapgs
1307 jmp paranoid_exit_restore
1308 paranoid_exit_no_swapgs:
1309 TRACE_IRQS_IRETQ_DEBUG
1310 paranoid_exit_restore:
1313 REMOVE_PT_GPREGS_FROM_STACK 8
1319 * Save all registers in pt_regs, and switch gs if needed.
1320 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1328 testb $3, CS+8(%rsp)
1329 jz error_kernelspace
1337 * There are two places in the kernel that can potentially fault with
1338 * usergs. Handle them here. B stepping K8s sometimes report a
1339 * truncated RIP for IRET exceptions returning to compat mode. Check
1340 * for these here too.
1343 CFI_REL_OFFSET rcx, RCX+8
1345 leaq native_irq_return_iret(%rip),%rcx
1346 cmpq %rcx,RIP+8(%rsp)
1348 movl %ecx,%eax /* zero extend */
1349 cmpq %rax,RIP+8(%rsp)
1351 cmpq $gs_change,RIP+8(%rsp)
1356 /* Fix truncated RIP */
1357 movq %rcx,RIP+8(%rsp)
1365 decl %ebx /* Return to usergs */
1371 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1376 DISABLE_INTERRUPTS(CLBR_NONE)
1378 GET_THREAD_INFO(%rcx)
1381 LOCKDEP_SYS_EXIT_IRQ
1382 movl TI_flags(%rcx),%edx
1383 movl $_TIF_WORK_MASK,%edi
1390 /* Runs on exception stack */
1393 PARAVIRT_ADJUST_EXCEPTION_FRAME
1395 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1396 * the iretq it performs will take us out of NMI context.
1397 * This means that we can have nested NMIs where the next
1398 * NMI is using the top of the stack of the previous NMI. We
1399 * can't let it execute because the nested NMI will corrupt the
1400 * stack of the previous NMI. NMI handlers are not re-entrant
1403 * To handle this case we do the following:
1404 * Check the a special location on the stack that contains
1405 * a variable that is set when NMIs are executing.
1406 * The interrupted task's stack is also checked to see if it
1408 * If the variable is not set and the stack is not the NMI
1410 * o Set the special variable on the stack
1411 * o Copy the interrupt frame into a "saved" location on the stack
1412 * o Copy the interrupt frame into a "copy" location on the stack
1413 * o Continue processing the NMI
1414 * If the variable is set or the previous stack is the NMI stack:
1415 * o Modify the "copy" location to jump to the repeate_nmi
1416 * o return back to the first NMI
1418 * Now on exit of the first NMI, we first clear the stack variable
1419 * The NMI stack will tell any nested NMIs at that point that it is
1420 * nested. Then we pop the stack normally with iret, and if there was
1421 * a nested NMI that updated the copy interrupt stack frame, a
1422 * jump will be made to the repeat_nmi code that will handle the second
1426 /* Use %rdx as our temp variable throughout */
1428 CFI_REL_OFFSET rdx, 0
1431 * If %cs was not the kernel segment, then the NMI triggered in user
1432 * space, which means it is definitely not nested.
1434 cmpl $__KERNEL_CS, 16(%rsp)
1438 * Check the special variable on the stack to see if NMIs are
1445 * Now test if the previous stack was an NMI stack.
1446 * We need the double check. We check the NMI stack to satisfy the
1447 * race when the first NMI clears the variable before returning.
1448 * We check the variable because the first NMI could be in a
1449 * breakpoint routine using a breakpoint stack.
1452 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1453 cmpq %rdx, 4*8(%rsp)
1454 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1456 subq $EXCEPTION_STKSZ, %rdx
1457 cmpq %rdx, 4*8(%rsp)
1458 /* If it is below the NMI stack, it is a normal NMI */
1460 /* Ah, it is within the NMI stack, treat it as nested */
1466 * Do nothing if we interrupted the fixup in repeat_nmi.
1467 * It's about to repeat the NMI handler, so we are fine
1468 * with ignoring this one.
1470 movq $repeat_nmi, %rdx
1473 movq $end_repeat_nmi, %rdx
1478 /* Set up the interrupted NMIs stack to jump to repeat_nmi */
1479 leaq -1*8(%rsp), %rdx
1481 CFI_ADJUST_CFA_OFFSET 1*8
1482 leaq -10*8(%rsp), %rdx
1483 pushq_cfi $__KERNEL_DS
1486 pushq_cfi $__KERNEL_CS
1487 pushq_cfi $repeat_nmi
1489 /* Put stack back */
1491 CFI_ADJUST_CFA_OFFSET -6*8
1497 /* No need to check faults here */
1503 * Because nested NMIs will use the pushed location that we
1504 * stored in rdx, we must keep that space available.
1505 * Here's what our stack frame will look like:
1506 * +-------------------------+
1508 * | original Return RSP |
1509 * | original RFLAGS |
1512 * +-------------------------+
1513 * | temp storage for rdx |
1514 * +-------------------------+
1515 * | NMI executing variable |
1516 * +-------------------------+
1518 * | copied Return RSP |
1522 * +-------------------------+
1524 * | Saved Return RSP |
1528 * +-------------------------+
1530 * +-------------------------+
1532 * The saved stack frame is used to fix up the copied stack frame
1533 * that a nested NMI may change to make the interrupted NMI iret jump
1534 * to the repeat_nmi. The original stack frame and the temp storage
1535 * is also used by nested NMIs and can not be trusted on exit.
1537 /* Do not pop rdx, nested NMIs will corrupt that part of the stack */
1541 /* Set the NMI executing variable on the stack. */
1545 * Leave room for the "copied" frame
1548 CFI_ADJUST_CFA_OFFSET 5*8
1550 /* Copy the stack frame to the Saved frame */
1552 pushq_cfi 11*8(%rsp)
1554 CFI_DEF_CFA_OFFSET 5*8
1556 /* Everything up to here is safe from nested NMIs */
1559 * If there was a nested NMI, the first NMI's iret will return
1560 * here. But NMIs are still enabled and we can take another
1561 * nested NMI. The nested NMI checks the interrupted RIP to see
1562 * if it is between repeat_nmi and end_repeat_nmi, and if so
1563 * it will just return, as we are about to repeat an NMI anyway.
1564 * This makes it safe to copy to the stack frame that a nested
1569 * Update the stack variable to say we are still in NMI (the update
1570 * is benign for the non-repeat case, where 1 was pushed just above
1571 * to this very stack slot).
1575 /* Make another copy, this one may be modified by nested NMIs */
1577 CFI_ADJUST_CFA_OFFSET -10*8
1579 pushq_cfi -6*8(%rsp)
1582 CFI_DEF_CFA_OFFSET 5*8
1586 * Everything below this point can be preempted by a nested
1587 * NMI if the first NMI took an exception and reset our iret stack
1588 * so that we repeat another NMI.
1590 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1591 ALLOC_PT_GPREGS_ON_STACK
1594 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1595 * as we should not be calling schedule in NMI context.
1596 * Even with normal interrupts enabled. An NMI should not be
1597 * setting NEED_RESCHED or anything that normal interrupts and
1598 * exceptions might do.
1604 * Save off the CR2 register. If we take a page fault in the NMI then
1605 * it could corrupt the CR2 value. If the NMI preempts a page fault
1606 * handler before it was able to read the CR2 register, and then the
1607 * NMI itself takes a page fault, the page fault that was preempted
1608 * will read the information from the NMI page fault and not the
1609 * origin fault. Save it off and restore it if it changes.
1610 * Use the r12 callee-saved register.
1614 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1619 /* Did the NMI take a page fault? Restore cr2 if it did */
1625 testl %ebx,%ebx /* swapgs needed? */
1632 /* Pop the extra iret frame at once */
1633 REMOVE_PT_GPREGS_FROM_STACK 6*8
1635 /* Clear the NMI executing stack variable */
1641 ENTRY(ignore_sysret)