2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
10 * entry.S contains the system-call and fault low-level handling routines.
12 * Some of this is documented in Documentation/x86/entry_64.txt
14 * NOTE: This code handles signal-recognition, which happens every time
15 * after an interrupt and after each system call.
17 * A note on terminology:
18 * - iret frame: Architecture defined interrupt frame from SS to RIP
19 * at the top of the kernel process stack.
22 * - CFI macros are used to generate dwarf2 unwind information for better
23 * backtraces. They don't change any code.
24 * - ENTRY/END Define functions in the symbol table.
25 * - FIXUP_TOP_OF_STACK/RESTORE_TOP_OF_STACK - Fix up the hardware stack
26 * frame that is otherwise undefined after a SYSCALL
27 * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.
28 * - idtentry - Define exception entry points.
31 #include <linux/linkage.h>
32 #include <asm/segment.h>
33 #include <asm/cache.h>
34 #include <asm/errno.h>
35 #include <asm/dwarf2.h>
36 #include <asm/calling.h>
37 #include <asm/asm-offsets.h>
39 #include <asm/unistd.h>
40 #include <asm/thread_info.h>
41 #include <asm/hw_irq.h>
42 #include <asm/page_types.h>
43 #include <asm/irqflags.h>
44 #include <asm/paravirt.h>
45 #include <asm/percpu.h>
47 #include <asm/context_tracking.h>
49 #include <asm/pgtable_types.h>
50 #include <linux/err.h>
52 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
53 #include <linux/elf-em.h>
54 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
55 #define __AUDIT_ARCH_64BIT 0x80000000
56 #define __AUDIT_ARCH_LE 0x40000000
59 .section .entry.text, "ax"
62 #ifndef CONFIG_PREEMPT
63 #define retint_kernel retint_restore_args
66 #ifdef CONFIG_PARAVIRT
67 ENTRY(native_usergs_sysret64)
70 ENDPROC(native_usergs_sysret64)
71 #endif /* CONFIG_PARAVIRT */
74 .macro TRACE_IRQS_IRETQ
75 #ifdef CONFIG_TRACE_IRQFLAGS
76 bt $9,EFLAGS(%rsp) /* interrupts off? */
84 * When dynamic function tracer is enabled it will add a breakpoint
85 * to all locations that it is about to modify, sync CPUs, update
86 * all the code, sync CPUs, then remove the breakpoints. In this time
87 * if lockdep is enabled, it might jump back into the debug handler
88 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
90 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
91 * make sure the stack pointer does not get reset back to the top
92 * of the debug stack, and instead just reuses the current stack.
94 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
96 .macro TRACE_IRQS_OFF_DEBUG
97 call debug_stack_set_zero
99 call debug_stack_reset
102 .macro TRACE_IRQS_ON_DEBUG
103 call debug_stack_set_zero
105 call debug_stack_reset
108 .macro TRACE_IRQS_IRETQ_DEBUG
109 bt $9,EFLAGS(%rsp) /* interrupts off? */
116 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
117 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
118 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
122 * C code is not supposed to know that the iret frame is not populated.
123 * Every time a C function with an pt_regs argument is called from
124 * the SYSCALL based fast path FIXUP_TOP_OF_STACK is needed.
125 * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs
128 .macro FIXUP_TOP_OF_STACK tmp offset=0
129 movq $__USER_DS,SS+\offset(%rsp)
130 movq $__USER_CS,CS+\offset(%rsp)
131 movq RIP+\offset(%rsp),\tmp /* get rip */
132 movq \tmp,RCX+\offset(%rsp) /* copy it to rcx as sysret would do */
133 movq EFLAGS+\offset(%rsp),\tmp /* ditto for rflags->r11 */
134 movq \tmp,R11+\offset(%rsp)
137 .macro RESTORE_TOP_OF_STACK tmp offset=0
144 .macro EMPTY_FRAME start=1 offset=0
148 CFI_DEF_CFA rsp,8+\offset
150 CFI_DEF_CFA_OFFSET 8+\offset
155 * initial frame state for interrupts (and exceptions without error code)
157 .macro INTR_FRAME start=1 offset=0
158 EMPTY_FRAME \start, 5*8+\offset
159 /*CFI_REL_OFFSET ss, 4*8+\offset*/
160 CFI_REL_OFFSET rsp, 3*8+\offset
161 /*CFI_REL_OFFSET rflags, 2*8+\offset*/
162 /*CFI_REL_OFFSET cs, 1*8+\offset*/
163 CFI_REL_OFFSET rip, 0*8+\offset
167 * initial frame state for exceptions with error code (and interrupts
168 * with vector already pushed)
170 .macro XCPT_FRAME start=1 offset=0
171 INTR_FRAME \start, 1*8+\offset
175 * frame that enables passing a complete pt_regs to a C function.
177 .macro DEFAULT_FRAME start=1 offset=0
178 XCPT_FRAME \start, ORIG_RAX+\offset
179 CFI_REL_OFFSET rdi, RDI+\offset
180 CFI_REL_OFFSET rsi, RSI+\offset
181 CFI_REL_OFFSET rdx, RDX+\offset
182 CFI_REL_OFFSET rcx, RCX+\offset
183 CFI_REL_OFFSET rax, RAX+\offset
184 CFI_REL_OFFSET r8, R8+\offset
185 CFI_REL_OFFSET r9, R9+\offset
186 CFI_REL_OFFSET r10, R10+\offset
187 CFI_REL_OFFSET r11, R11+\offset
188 CFI_REL_OFFSET rbx, RBX+\offset
189 CFI_REL_OFFSET rbp, RBP+\offset
190 CFI_REL_OFFSET r12, R12+\offset
191 CFI_REL_OFFSET r13, R13+\offset
192 CFI_REL_OFFSET r14, R14+\offset
193 CFI_REL_OFFSET r15, R15+\offset
197 * 64bit SYSCALL instruction entry. Up to 6 arguments in registers.
199 * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
200 * then loads new ss, cs, and rip from previously programmed MSRs.
201 * rflags gets masked by a value from another MSR (so CLD and CLAC
202 * are not needed). SYSCALL does not save anything on the stack
203 * and does not change rsp.
205 * Registers on entry:
206 * rax system call number
208 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
212 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
215 * (note: r12-r15,rbp,rbx are callee-preserved in C ABI)
217 * Interrupts are off on entry.
218 * Only called from user space.
220 * When user can change pt_regs->foo always force IRET. That is because
221 * it deals with uncanonical addresses better. SYSRET has trouble
222 * with them due to bugs in both AMD and Intel CPUs.
228 CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET
230 /*CFI_REGISTER rflags,r11*/
233 * A hypervisor implementation might want to use a label
234 * after the swapgs, so that it can do the swapgs
235 * for the guest and jump here on syscall.
237 GLOBAL(system_call_after_swapgs)
240 * We use 'rsp_scratch' as a scratch register, hence this block must execute
241 * atomically in the face of possible interrupt-driven task preemption,
242 * so we can enable interrupts only after we're done with using rsp_scratch:
244 movq %rsp,PER_CPU_VAR(rsp_scratch)
245 /* kernel_stack is set so that 5 slots (iret frame) are preallocated */
246 movq PER_CPU_VAR(kernel_stack),%rsp
247 ALLOC_PT_GPREGS_ON_STACK 8 /* +8: space for orig_ax */
249 movq PER_CPU_VAR(rsp_scratch),%rcx
250 movq %r11,EFLAGS(%rsp)
253 * No need to follow this irqs off/on section - it's straight
256 ENABLE_INTERRUPTS(CLBR_NONE)
257 movq_cfi rax,ORIG_RAX
258 SAVE_C_REGS_EXCEPT_RAX_RCX_R11
259 movq $-ENOSYS,RAX(%rsp)
260 CFI_REL_OFFSET rip,RIP
261 testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,SIZEOF_PTREGS)
263 system_call_fastpath:
264 #if __SYSCALL_MASK == ~0
265 cmpq $__NR_syscall_max,%rax
267 andl $__SYSCALL_MASK,%eax
268 cmpl $__NR_syscall_max,%eax
270 ja ret_from_sys_call /* and return regs->ax */
272 call *sys_call_table(,%rax,8) # XXX: rip relative
275 * Syscall return path ending with SYSRET (fast path)
276 * Has incompletely filled pt_regs, iret frame is also incomplete.
279 testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,SIZEOF_PTREGS)
280 jnz int_ret_from_sys_call_fixup /* Go the the slow path */
283 DISABLE_INTERRUPTS(CLBR_NONE)
287 * sysretq will re-enable interrupts:
290 RESTORE_C_REGS_EXCEPT_RCX_R11
293 movq EFLAGS(%rsp),%r11
294 /*CFI_REGISTER rflags,r11*/
297 * 64bit SYSRET restores rip from rcx,
298 * rflags from r11 (but RF and VM bits are forced to 0),
299 * cs and ss are loaded from MSRs.
305 int_ret_from_sys_call_fixup:
306 FIXUP_TOP_OF_STACK %r11
307 jmp int_ret_from_sys_call
309 /* Do syscall entry tracing */
312 movq $AUDIT_ARCH_X86_64, %rsi
313 call syscall_trace_enter_phase1
315 jnz tracesys_phase2 /* if needed, run the slow path */
316 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
317 movq ORIG_RAX(%rsp), %rax
318 jmp system_call_fastpath /* and return to the fast path */
322 FIXUP_TOP_OF_STACK %rdi
324 movq $AUDIT_ARCH_X86_64, %rsi
326 call syscall_trace_enter_phase2
329 * Reload registers from stack in case ptrace changed them.
330 * We don't reload %rax because syscall_trace_entry_phase2() returned
331 * the value it wants us to use in the table lookup.
333 RESTORE_C_REGS_EXCEPT_RAX
335 #if __SYSCALL_MASK == ~0
336 cmpq $__NR_syscall_max,%rax
338 andl $__SYSCALL_MASK,%eax
339 cmpl $__NR_syscall_max,%eax
341 ja int_ret_from_sys_call /* RAX(%rsp) is already set */
342 movq %r10,%rcx /* fixup for C */
343 call *sys_call_table(,%rax,8)
345 /* Use IRET because user could have changed pt_regs->foo */
348 * Syscall return path ending with IRET.
349 * Has correct iret frame.
351 GLOBAL(int_ret_from_sys_call)
352 DISABLE_INTERRUPTS(CLBR_NONE)
354 movl $_TIF_ALLWORK_MASK,%edi
355 /* edi: mask to check */
356 GLOBAL(int_with_check)
358 GET_THREAD_INFO(%rcx)
359 movl TI_flags(%rcx),%edx
362 andl $~TS_COMPAT,TI_status(%rcx)
365 /* Either reschedule or signal or syscall exit tracking needed. */
366 /* First do a reschedule test. */
367 /* edx: work, edi: workmask */
369 bt $TIF_NEED_RESCHED,%edx
372 ENABLE_INTERRUPTS(CLBR_NONE)
376 DISABLE_INTERRUPTS(CLBR_NONE)
380 /* handle signals and tracing -- both require a full pt_regs */
383 ENABLE_INTERRUPTS(CLBR_NONE)
385 /* Check for syscall exit trace */
386 testl $_TIF_WORK_SYSCALL_EXIT,%edx
389 leaq 8(%rsp),%rdi # &ptregs -> arg1
390 call syscall_trace_leave
392 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
396 testl $_TIF_DO_NOTIFY_MASK,%edx
398 movq %rsp,%rdi # &ptregs -> arg1
399 xorl %esi,%esi # oldset -> arg2
400 call do_notify_resume
401 1: movl $_TIF_WORK_MASK,%edi
404 DISABLE_INTERRUPTS(CLBR_NONE)
410 .macro FORK_LIKE func
413 DEFAULT_FRAME 0, 8 /* offset 8: return address */
415 FIXUP_TOP_OF_STACK %r11, 8
417 RESTORE_TOP_OF_STACK %r11, 8
432 FIXUP_TOP_OF_STACK %r11
436 jmp int_ret_from_sys_call
445 FIXUP_TOP_OF_STACK %r11
447 RESTORE_TOP_OF_STACK %r11
450 jmp int_ret_from_sys_call
455 * sigreturn is special because it needs to restore all registers on return.
456 * This cannot be done with SYSRET, so use the IRET return path instead.
458 ENTRY(stub_rt_sigreturn)
463 FIXUP_TOP_OF_STACK %r11
464 call sys_rt_sigreturn
465 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
467 jmp int_ret_from_sys_call
469 END(stub_rt_sigreturn)
471 #ifdef CONFIG_X86_X32_ABI
472 ENTRY(stub_x32_rt_sigreturn)
477 FIXUP_TOP_OF_STACK %r11
478 call sys32_x32_rt_sigreturn
479 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
481 jmp int_ret_from_sys_call
483 END(stub_x32_rt_sigreturn)
485 ENTRY(stub_x32_execve)
490 FIXUP_TOP_OF_STACK %r11
491 call compat_sys_execve
492 RESTORE_TOP_OF_STACK %r11
495 jmp int_ret_from_sys_call
499 ENTRY(stub_x32_execveat)
504 FIXUP_TOP_OF_STACK %r11
505 call compat_sys_execveat
506 RESTORE_TOP_OF_STACK %r11
509 jmp int_ret_from_sys_call
511 END(stub_x32_execveat)
516 * A newly forked process directly context switches into this address.
518 * rdi: prev task we switched from
523 LOCK ; btr $TIF_FORK,TI_flags(%r8)
526 popfq_cfi # reset kernel eflags
528 call schedule_tail # rdi: 'prev' task parameter
530 GET_THREAD_INFO(%rcx)
534 testl $3,CS(%rsp) # from kernel_thread?
538 * By the time we get here, we have no idea whether our pt_regs,
539 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
540 * the slow path, or one of the ia32entry paths.
541 * Use int_ret_from_sys_call to return, since it can safely handle
544 jmp int_ret_from_sys_call
551 jmp int_ret_from_sys_call
556 * Build the entry stubs and pointer table with some assembler magic.
557 * We pack 7 stubs into a single 32-byte chunk, which will fit in a
558 * single cache line on all modern x86 implementations.
560 .section .init.rodata,"a"
564 .p2align CONFIG_X86_L1_CACHE_SHIFT
565 ENTRY(irq_entries_start)
567 vector=FIRST_EXTERNAL_VECTOR
568 .rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7
571 .if vector < FIRST_SYSTEM_VECTOR
572 .if vector <> FIRST_EXTERNAL_VECTOR
573 CFI_ADJUST_CFA_OFFSET -8
575 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
576 .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
585 2: jmp common_interrupt
588 END(irq_entries_start)
595 * Interrupt entry/exit.
597 * Interrupt entry points save only callee clobbered registers in fast path.
599 * Entry runs with interrupts off.
602 /* 0(%rsp): ~(interrupt number) */
603 .macro interrupt func
606 * Since nothing in interrupt handling code touches r12...r15 members
607 * of "struct pt_regs", and since interrupts can nest, we can save
608 * four stack slots and simultaneously provide
609 * an unwind-friendly stack layout by saving "truncated" pt_regs
610 * exactly up to rbp slot, without these members.
612 ALLOC_PT_GPREGS_ON_STACK -RBP
614 /* this goes to 0(%rsp) for unwinder, not for saving the value: */
615 SAVE_EXTRA_REGS_RBP -RBP
617 leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */
619 testl $3, CS-RBP(%rsp)
624 * Save previous stack pointer, optionally switch to interrupt stack.
625 * irq_count is used to check if a CPU is already on an interrupt stack
626 * or not. While this is essentially redundant with preempt_count it is
627 * a little cheaper to use a separate counter in the PDA (short of
628 * moving irq_enter into assembly, which would be too much work)
631 incl PER_CPU_VAR(irq_count)
632 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
633 CFI_DEF_CFA_REGISTER rsi
637 * "CFA (Current Frame Address) is the value on stack + offset"
639 CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
640 0x77 /* DW_OP_breg7 (rsp) */, 0, \
641 0x06 /* DW_OP_deref */, \
642 0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \
643 0x22 /* DW_OP_plus */
644 /* We entered an interrupt context - irqs are off: */
651 * The interrupt stubs push (~vector+0x80) onto the stack and
652 * then jump to common_interrupt.
654 .p2align CONFIG_X86_L1_CACHE_SHIFT
658 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
660 /* 0(%rsp): old RSP */
662 DISABLE_INTERRUPTS(CLBR_NONE)
664 decl PER_CPU_VAR(irq_count)
666 /* Restore saved previous stack */
668 CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */
669 /* return code expects complete pt_regs - adjust rsp accordingly: */
671 CFI_DEF_CFA_REGISTER rsp
672 CFI_ADJUST_CFA_OFFSET RBP
675 GET_THREAD_INFO(%rcx)
679 /* Interrupt came from user space */
681 * Has a correct top of stack.
682 * %rcx: thread info. Interrupts off.
684 retint_with_reschedule:
685 movl $_TIF_WORK_MASK,%edi
688 movl TI_flags(%rcx),%edx
693 retint_swapgs: /* return to user-space */
695 * The iretq could re-enable interrupts:
697 DISABLE_INTERRUPTS(CLBR_ANY)
701 * Try to use SYSRET instead of IRET if we're returning to
702 * a completely clean 64-bit userspace context.
705 cmpq %rcx,RIP(%rsp) /* RCX == RIP */
706 jne opportunistic_sysret_failed
709 * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP
710 * in kernel space. This essentially lets the user take over
711 * the kernel, since userspace controls RSP. It's not worth
712 * testing for canonicalness exactly -- this check detects any
713 * of the 17 high bits set, which is true for non-canonical
714 * or kernel addresses. (This will pessimize vsyscall=native.
717 * If virtual addresses ever become wider, this will need
718 * to be updated to remain correct on both old and new CPUs.
720 .ifne __VIRTUAL_MASK_SHIFT - 47
721 .error "virtual address width changed -- sysret checks need update"
723 shr $__VIRTUAL_MASK_SHIFT, %rcx
724 jnz opportunistic_sysret_failed
726 cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */
727 jne opportunistic_sysret_failed
730 cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */
731 jne opportunistic_sysret_failed
733 testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */
734 jnz opportunistic_sysret_failed
736 /* nothing to check for RSP */
738 cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */
739 jne opportunistic_sysret_failed
742 * We win! This label is here just for ease of understanding
743 * perf profiles. Nothing jumps here.
745 irq_return_via_sysret:
747 /* r11 is already restored (see code above) */
748 RESTORE_C_REGS_EXCEPT_R11
753 opportunistic_sysret_failed:
757 retint_restore_args: /* return to kernel space */
758 DISABLE_INTERRUPTS(CLBR_ANY)
760 * The iretq could re-enable interrupts:
765 REMOVE_PT_GPREGS_FROM_STACK 8
772 * Are we returning to a stack segment from the LDT? Note: in
773 * 64-bit mode SS:RSP on the exception stack is always valid.
775 #ifdef CONFIG_X86_ESPFIX64
776 testb $4,(SS-RIP)(%rsp)
777 jnz native_irq_return_ldt
780 .global native_irq_return_iret
781 native_irq_return_iret:
783 * This may fault. Non-paranoid faults on return to userspace are
784 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
785 * Double-faults due to espfix64 are handled in do_double_fault.
786 * Other faults here are fatal.
790 #ifdef CONFIG_X86_ESPFIX64
791 native_irq_return_ldt:
795 movq PER_CPU_VAR(espfix_waddr),%rdi
796 movq %rax,(0*8)(%rdi) /* RAX */
797 movq (2*8)(%rsp),%rax /* RIP */
798 movq %rax,(1*8)(%rdi)
799 movq (3*8)(%rsp),%rax /* CS */
800 movq %rax,(2*8)(%rdi)
801 movq (4*8)(%rsp),%rax /* RFLAGS */
802 movq %rax,(3*8)(%rdi)
803 movq (6*8)(%rsp),%rax /* SS */
804 movq %rax,(5*8)(%rdi)
805 movq (5*8)(%rsp),%rax /* RSP */
806 movq %rax,(4*8)(%rdi)
807 andl $0xffff0000,%eax
809 orq PER_CPU_VAR(espfix_stack),%rax
813 jmp native_irq_return_iret
816 /* edi: workmask, edx: work */
819 bt $TIF_NEED_RESCHED,%edx
822 ENABLE_INTERRUPTS(CLBR_NONE)
826 GET_THREAD_INFO(%rcx)
827 DISABLE_INTERRUPTS(CLBR_NONE)
832 testl $_TIF_DO_NOTIFY_MASK,%edx
835 ENABLE_INTERRUPTS(CLBR_NONE)
837 movq $-1,ORIG_RAX(%rsp)
838 xorl %esi,%esi # oldset
839 movq %rsp,%rdi # &pt_regs
840 call do_notify_resume
842 DISABLE_INTERRUPTS(CLBR_NONE)
844 GET_THREAD_INFO(%rcx)
845 jmp retint_with_reschedule
847 #ifdef CONFIG_PREEMPT
848 /* Returning to kernel space. Check if we need preemption */
849 /* rcx: threadinfo. interrupts off. */
851 cmpl $0,PER_CPU_VAR(__preempt_count)
852 jnz retint_restore_args
853 bt $9,EFLAGS(%rsp) /* interrupts off? */
854 jnc retint_restore_args
855 call preempt_schedule_irq
859 END(common_interrupt)
864 .macro apicinterrupt3 num sym do_sym
876 #ifdef CONFIG_TRACING
877 #define trace(sym) trace_##sym
878 #define smp_trace(sym) smp_trace_##sym
880 .macro trace_apicinterrupt num sym
881 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
884 .macro trace_apicinterrupt num sym do_sym
888 .macro apicinterrupt num sym do_sym
889 apicinterrupt3 \num \sym \do_sym
890 trace_apicinterrupt \num \sym
894 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \
895 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
896 apicinterrupt3 REBOOT_VECTOR \
897 reboot_interrupt smp_reboot_interrupt
901 apicinterrupt3 UV_BAU_MESSAGE \
902 uv_bau_message_intr1 uv_bau_message_interrupt
904 apicinterrupt LOCAL_TIMER_VECTOR \
905 apic_timer_interrupt smp_apic_timer_interrupt
906 apicinterrupt X86_PLATFORM_IPI_VECTOR \
907 x86_platform_ipi smp_x86_platform_ipi
909 #ifdef CONFIG_HAVE_KVM
910 apicinterrupt3 POSTED_INTR_VECTOR \
911 kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
914 #ifdef CONFIG_X86_MCE_THRESHOLD
915 apicinterrupt THRESHOLD_APIC_VECTOR \
916 threshold_interrupt smp_threshold_interrupt
919 #ifdef CONFIG_X86_THERMAL_VECTOR
920 apicinterrupt THERMAL_APIC_VECTOR \
921 thermal_interrupt smp_thermal_interrupt
925 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
926 call_function_single_interrupt smp_call_function_single_interrupt
927 apicinterrupt CALL_FUNCTION_VECTOR \
928 call_function_interrupt smp_call_function_interrupt
929 apicinterrupt RESCHEDULE_VECTOR \
930 reschedule_interrupt smp_reschedule_interrupt
933 apicinterrupt ERROR_APIC_VECTOR \
934 error_interrupt smp_error_interrupt
935 apicinterrupt SPURIOUS_APIC_VECTOR \
936 spurious_interrupt smp_spurious_interrupt
938 #ifdef CONFIG_IRQ_WORK
939 apicinterrupt IRQ_WORK_VECTOR \
940 irq_work_interrupt smp_irq_work_interrupt
944 * Exception entry points.
946 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
948 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
951 .if \shift_ist != -1 && \paranoid == 0
952 .error "using shift_ist requires paranoid=1"
962 PARAVIRT_ADJUST_EXCEPTION_FRAME
964 .ifeq \has_error_code
965 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
968 ALLOC_PT_GPREGS_ON_STACK
973 testl $3, CS(%rsp) /* If coming from userspace, switch */
980 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
986 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
992 movq %rsp,%rdi /* pt_regs pointer */
995 movq ORIG_RAX(%rsp),%rsi /* get error code */
996 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
998 xorl %esi,%esi /* no error code */
1001 .if \shift_ist != -1
1002 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1007 .if \shift_ist != -1
1008 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1011 /* these procedures expect "no swapgs" flag in ebx */
1021 * Paranoid entry from userspace. Switch stacks and treat it
1022 * as a normal entry. This means that paranoid handlers
1023 * run in real process context if user_mode(regs).
1030 movq %rsp,%rdi /* pt_regs pointer */
1032 movq %rax,%rsp /* switch stack */
1034 movq %rsp,%rdi /* pt_regs pointer */
1037 movq ORIG_RAX(%rsp),%rsi /* get error code */
1038 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1040 xorl %esi,%esi /* no error code */
1045 jmp error_exit /* %ebx: no swapgs flag */
1052 #ifdef CONFIG_TRACING
1053 .macro trace_idtentry sym do_sym has_error_code:req
1054 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
1055 idtentry \sym \do_sym has_error_code=\has_error_code
1058 .macro trace_idtentry sym do_sym has_error_code:req
1059 idtentry \sym \do_sym has_error_code=\has_error_code
1063 idtentry divide_error do_divide_error has_error_code=0
1064 idtentry overflow do_overflow has_error_code=0
1065 idtentry bounds do_bounds has_error_code=0
1066 idtentry invalid_op do_invalid_op has_error_code=0
1067 idtentry device_not_available do_device_not_available has_error_code=0
1068 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1069 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1070 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1071 idtentry segment_not_present do_segment_not_present has_error_code=1
1072 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1073 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1074 idtentry alignment_check do_alignment_check has_error_code=1
1075 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1078 /* Reload gs selector with exception handling */
1079 /* edi: new selector */
1080 ENTRY(native_load_gs_index)
1083 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1087 2: mfence /* workaround */
1092 END(native_load_gs_index)
1094 _ASM_EXTABLE(gs_change,bad_gs)
1095 .section .fixup,"ax"
1096 /* running with kernelgs */
1098 SWAPGS /* switch back to user gs */
1104 /* Call softirq on interrupt stack. Interrupts are off. */
1105 ENTRY(do_softirq_own_stack)
1108 CFI_REL_OFFSET rbp,0
1110 CFI_DEF_CFA_REGISTER rbp
1111 incl PER_CPU_VAR(irq_count)
1112 cmove PER_CPU_VAR(irq_stack_ptr),%rsp
1113 push %rbp # backlink for old unwinder
1117 CFI_DEF_CFA_REGISTER rsp
1118 CFI_ADJUST_CFA_OFFSET -8
1119 decl PER_CPU_VAR(irq_count)
1122 END(do_softirq_own_stack)
1125 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1128 * A note on the "critical region" in our callback handler.
1129 * We want to avoid stacking callback handlers due to events occurring
1130 * during handling of the last event. To do this, we keep events disabled
1131 * until we've done all processing. HOWEVER, we must enable events before
1132 * popping the stack frame (can't be done atomically) and so it would still
1133 * be possible to get enough handler activations to overflow the stack.
1134 * Although unlikely, bugs of that kind are hard to track down, so we'd
1135 * like to avoid the possibility.
1136 * So, on entry to the handler we detect whether we interrupted an
1137 * existing activation in its critical region -- if so, we pop the current
1138 * activation and restart the handler using the previous one.
1140 ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1143 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1144 * see the correct pointer to the pt_regs
1146 movq %rdi, %rsp # we don't return, adjust the stack frame
1149 11: incl PER_CPU_VAR(irq_count)
1151 CFI_DEF_CFA_REGISTER rbp
1152 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
1153 pushq %rbp # backlink for old unwinder
1154 call xen_evtchn_do_upcall
1156 CFI_DEF_CFA_REGISTER rsp
1157 decl PER_CPU_VAR(irq_count)
1158 #ifndef CONFIG_PREEMPT
1159 call xen_maybe_preempt_hcall
1163 END(xen_do_hypervisor_callback)
1166 * Hypervisor uses this for application faults while it executes.
1167 * We get here for two reasons:
1168 * 1. Fault while reloading DS, ES, FS or GS
1169 * 2. Fault while executing IRET
1170 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1171 * registers that could be reloaded and zeroed the others.
1172 * Category 2 we fix up by killing the current process. We cannot use the
1173 * normal Linux return path in this case because if we use the IRET hypercall
1174 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1175 * We distinguish between categories by comparing each saved segment register
1176 * with its current contents: any discrepancy means we in category 1.
1178 ENTRY(xen_failsafe_callback)
1180 /*CFI_REL_OFFSET gs,GS*/
1181 /*CFI_REL_OFFSET fs,FS*/
1182 /*CFI_REL_OFFSET es,ES*/
1183 /*CFI_REL_OFFSET ds,DS*/
1184 CFI_REL_OFFSET r11,8
1185 CFI_REL_OFFSET rcx,0
1199 /* All segments match their saved values => Category 2 (Bad IRET). */
1205 CFI_ADJUST_CFA_OFFSET -0x30
1206 pushq_cfi $0 /* RIP */
1209 jmp general_protection
1211 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1217 CFI_ADJUST_CFA_OFFSET -0x30
1218 pushq_cfi $-1 /* orig_ax = -1 => not a system call */
1219 ALLOC_PT_GPREGS_ON_STACK
1224 END(xen_failsafe_callback)
1226 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1227 xen_hvm_callback_vector xen_evtchn_do_upcall
1229 #endif /* CONFIG_XEN */
1231 #if IS_ENABLED(CONFIG_HYPERV)
1232 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1233 hyperv_callback_vector hyperv_vector_handler
1234 #endif /* CONFIG_HYPERV */
1236 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1237 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1238 idtentry stack_segment do_stack_segment has_error_code=1
1240 idtentry xen_debug do_debug has_error_code=0
1241 idtentry xen_int3 do_int3 has_error_code=0
1242 idtentry xen_stack_segment do_stack_segment has_error_code=1
1244 idtentry general_protection do_general_protection has_error_code=1
1245 trace_idtentry page_fault do_page_fault has_error_code=1
1246 #ifdef CONFIG_KVM_GUEST
1247 idtentry async_page_fault do_async_page_fault has_error_code=1
1249 #ifdef CONFIG_X86_MCE
1250 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1254 * Save all registers in pt_regs, and switch gs if needed.
1255 * Use slow, but surefire "are we in kernel?" check.
1256 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1258 ENTRY(paranoid_entry)
1264 movl $MSR_GS_BASE,%ecx
1267 js 1f /* negative -> in kernel */
1275 * "Paranoid" exit path from exception stack. This is invoked
1276 * only on return from non-NMI IST interrupts that came
1277 * from kernel space.
1279 * We may be returning to very strange contexts (e.g. very early
1280 * in syscall entry), so checking for preemption here would
1281 * be complicated. Fortunately, we there's no good reason
1282 * to try to handle preemption here.
1284 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1285 ENTRY(paranoid_exit)
1287 DISABLE_INTERRUPTS(CLBR_NONE)
1288 TRACE_IRQS_OFF_DEBUG
1289 testl %ebx,%ebx /* swapgs needed? */
1290 jnz paranoid_exit_no_swapgs
1293 jmp paranoid_exit_restore
1294 paranoid_exit_no_swapgs:
1295 TRACE_IRQS_IRETQ_DEBUG
1296 paranoid_exit_restore:
1299 REMOVE_PT_GPREGS_FROM_STACK 8
1305 * Save all registers in pt_regs, and switch gs if needed.
1306 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1315 je error_kernelspace
1323 * There are two places in the kernel that can potentially fault with
1324 * usergs. Handle them here. B stepping K8s sometimes report a
1325 * truncated RIP for IRET exceptions returning to compat mode. Check
1326 * for these here too.
1329 CFI_REL_OFFSET rcx, RCX+8
1331 leaq native_irq_return_iret(%rip),%rcx
1332 cmpq %rcx,RIP+8(%rsp)
1334 movl %ecx,%eax /* zero extend */
1335 cmpq %rax,RIP+8(%rsp)
1337 cmpq $gs_change,RIP+8(%rsp)
1342 /* Fix truncated RIP */
1343 movq %rcx,RIP+8(%rsp)
1351 decl %ebx /* Return to usergs */
1357 /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
1362 DISABLE_INTERRUPTS(CLBR_NONE)
1364 GET_THREAD_INFO(%rcx)
1367 LOCKDEP_SYS_EXIT_IRQ
1368 movl TI_flags(%rcx),%edx
1369 movl $_TIF_WORK_MASK,%edi
1377 * Test if a given stack is an NMI stack or not.
1379 .macro test_in_nmi reg stack nmi_ret normal_ret
1382 subq $EXCEPTION_STKSZ, %\reg
1388 /* runs on exception stack */
1391 PARAVIRT_ADJUST_EXCEPTION_FRAME
1393 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1394 * the iretq it performs will take us out of NMI context.
1395 * This means that we can have nested NMIs where the next
1396 * NMI is using the top of the stack of the previous NMI. We
1397 * can't let it execute because the nested NMI will corrupt the
1398 * stack of the previous NMI. NMI handlers are not re-entrant
1401 * To handle this case we do the following:
1402 * Check the a special location on the stack that contains
1403 * a variable that is set when NMIs are executing.
1404 * The interrupted task's stack is also checked to see if it
1406 * If the variable is not set and the stack is not the NMI
1408 * o Set the special variable on the stack
1409 * o Copy the interrupt frame into a "saved" location on the stack
1410 * o Copy the interrupt frame into a "copy" location on the stack
1411 * o Continue processing the NMI
1412 * If the variable is set or the previous stack is the NMI stack:
1413 * o Modify the "copy" location to jump to the repeate_nmi
1414 * o return back to the first NMI
1416 * Now on exit of the first NMI, we first clear the stack variable
1417 * The NMI stack will tell any nested NMIs at that point that it is
1418 * nested. Then we pop the stack normally with iret, and if there was
1419 * a nested NMI that updated the copy interrupt stack frame, a
1420 * jump will be made to the repeat_nmi code that will handle the second
1424 /* Use %rdx as out temp variable throughout */
1426 CFI_REL_OFFSET rdx, 0
1429 * If %cs was not the kernel segment, then the NMI triggered in user
1430 * space, which means it is definitely not nested.
1432 cmpl $__KERNEL_CS, 16(%rsp)
1436 * Check the special variable on the stack to see if NMIs are
1443 * Now test if the previous stack was an NMI stack.
1444 * We need the double check. We check the NMI stack to satisfy the
1445 * race when the first NMI clears the variable before returning.
1446 * We check the variable because the first NMI could be in a
1447 * breakpoint routine using a breakpoint stack.
1450 test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi
1455 * Do nothing if we interrupted the fixup in repeat_nmi.
1456 * It's about to repeat the NMI handler, so we are fine
1457 * with ignoring this one.
1459 movq $repeat_nmi, %rdx
1462 movq $end_repeat_nmi, %rdx
1467 /* Set up the interrupted NMIs stack to jump to repeat_nmi */
1468 leaq -1*8(%rsp), %rdx
1470 CFI_ADJUST_CFA_OFFSET 1*8
1471 leaq -10*8(%rsp), %rdx
1472 pushq_cfi $__KERNEL_DS
1475 pushq_cfi $__KERNEL_CS
1476 pushq_cfi $repeat_nmi
1478 /* Put stack back */
1480 CFI_ADJUST_CFA_OFFSET -6*8
1486 /* No need to check faults here */
1492 * Because nested NMIs will use the pushed location that we
1493 * stored in rdx, we must keep that space available.
1494 * Here's what our stack frame will look like:
1495 * +-------------------------+
1497 * | original Return RSP |
1498 * | original RFLAGS |
1501 * +-------------------------+
1502 * | temp storage for rdx |
1503 * +-------------------------+
1504 * | NMI executing variable |
1505 * +-------------------------+
1507 * | copied Return RSP |
1511 * +-------------------------+
1513 * | Saved Return RSP |
1517 * +-------------------------+
1519 * +-------------------------+
1521 * The saved stack frame is used to fix up the copied stack frame
1522 * that a nested NMI may change to make the interrupted NMI iret jump
1523 * to the repeat_nmi. The original stack frame and the temp storage
1524 * is also used by nested NMIs and can not be trusted on exit.
1526 /* Do not pop rdx, nested NMIs will corrupt that part of the stack */
1530 /* Set the NMI executing variable on the stack. */
1534 * Leave room for the "copied" frame
1537 CFI_ADJUST_CFA_OFFSET 5*8
1539 /* Copy the stack frame to the Saved frame */
1541 pushq_cfi 11*8(%rsp)
1543 CFI_DEF_CFA_OFFSET 5*8
1545 /* Everything up to here is safe from nested NMIs */
1548 * If there was a nested NMI, the first NMI's iret will return
1549 * here. But NMIs are still enabled and we can take another
1550 * nested NMI. The nested NMI checks the interrupted RIP to see
1551 * if it is between repeat_nmi and end_repeat_nmi, and if so
1552 * it will just return, as we are about to repeat an NMI anyway.
1553 * This makes it safe to copy to the stack frame that a nested
1558 * Update the stack variable to say we are still in NMI (the update
1559 * is benign for the non-repeat case, where 1 was pushed just above
1560 * to this very stack slot).
1564 /* Make another copy, this one may be modified by nested NMIs */
1566 CFI_ADJUST_CFA_OFFSET -10*8
1568 pushq_cfi -6*8(%rsp)
1571 CFI_DEF_CFA_OFFSET 5*8
1575 * Everything below this point can be preempted by a nested
1576 * NMI if the first NMI took an exception and reset our iret stack
1577 * so that we repeat another NMI.
1579 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
1580 ALLOC_PT_GPREGS_ON_STACK
1583 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1584 * as we should not be calling schedule in NMI context.
1585 * Even with normal interrupts enabled. An NMI should not be
1586 * setting NEED_RESCHED or anything that normal interrupts and
1587 * exceptions might do.
1593 * Save off the CR2 register. If we take a page fault in the NMI then
1594 * it could corrupt the CR2 value. If the NMI preempts a page fault
1595 * handler before it was able to read the CR2 register, and then the
1596 * NMI itself takes a page fault, the page fault that was preempted
1597 * will read the information from the NMI page fault and not the
1598 * origin fault. Save it off and restore it if it changes.
1599 * Use the r12 callee-saved register.
1603 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1608 /* Did the NMI take a page fault? Restore cr2 if it did */
1615 testl %ebx,%ebx /* swapgs needed? */
1622 /* Pop the extra iret frame at once */
1623 REMOVE_PT_GPREGS_FROM_STACK 6*8
1625 /* Clear the NMI executing stack variable */
1631 ENTRY(ignore_sysret)